3 Commits

Author	SHA1	Message	Date
Laxman Dewangan	b3a3865d8c	ARM: tegra: define valid function names in DT document ... List valid values for the property "nvidia,function" in DT binding document of Tegra pincontrol. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> [swarren, whitespace fixes, grammar consistency fixes, section ordering fixes] Signed-off-by: Stephen Warren <swarren@nvidia.com>	2013-07-30 12:12:08 -06:00
Pritesh Raithatha	d6ec6b60a5	dt: Document: correct tegra20/30 pinctrl slew-rate name ... change nvidia,slew_rate* to nvidia,slew-rate* Cc: stable@kernel.org Signed-off-by: Pritesh Raithatha <praithatha@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2012-10-17 19:45:35 +02:00
Stephen Warren	a3c9454e53	dt: Document Tegra20/30 pinctrl binding ... Define a new binding for the Tegra pin controller, which is capable of defining all aspects of desired pin multiplexing and pin configuration. This is all based on the new common pinctrl bindings. Add Tegra30 binding based on Tegra20 binding. Add some basic stuff that was missing before: * How many and what reg property entries must be provided. * An example. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Dong Aisheng <dong.aisheng@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>	2012-04-18 13:53:12 +02:00