Commit Graph

3229 Commits

Author SHA1 Message Date
Tobias Klauser
38e548ee1a [PATCH] arch/i386: Use ARRAY_SIZE macro
Use ARRAY_SIZE macro instead of sizeof(x)/sizeof(x[0])

Signed-off-by: Tobias Klauser <tklauser@nuerscht.ch>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:28 -08:00
Paul Mundt
0d6d82b671 [PATCH] sh: Use pfn_valid() for lazy dcache write-back on SH7705
SH7705 in extended cache mode has some left-over VALID_PAGE() cruft that it
checks when doing lazy dcache write-back.  This has been gone for some time
(the last bits were in the discontig code, which should now also be gone --
this also fixes up a build error in the non-discontig case).

pfn_valid() gives the desired behaviour, so we switch to that.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:28 -08:00
Paul Mundt
65463b73b1 [PATCH] sh: Drop hp690 discontig support
There was only one board using this (hp690 specifically), and it just so
happens that it's only physically discontiguous at the "normal" P1 offset.  If
we bump up the P1 offset, it's possible to hit a shadowed region of memory
where we suddenly become magically contiguous.

As people have been using this shadowed region workaround for quite some time
(and without any adverse effects), it's time to drop the left over discontig
bits that no longer have any practical use (it was always very much
hp690-centric to begin with).

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:28 -08:00
Paul Mundt
d5cb978353 [PATCH] sh: SuperHyway support for SH4-202
This adds support for the relatively quirky (ie, not in line with any known
documentation, and amazed it works at all) SuperHyway implementation on
SH4-202.  This depends on the earlier SuperHyway patch for multiple block
support and VCR refactoring.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:28 -08:00
Paul Mundt
72777373b3 [PATCH] sh: Drop deprecated support for custom ramdisk embedding
sh had its own support for embedding ramdisk images in to the kernel binary,
but people are using initramfs for this now, so we drop the ramdisk embedding.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:27 -08:00
Pantelis Antoniou
de672e4ade [PATCH] ppc32: Add CPM1 config option
Kconfig patch needed by fs_enet to work.  Works like CONFIG_CPM2.

Cc: Kumar <kumar.gala@freescale.com>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:27 -08:00
Matt Porter
634e67ff91 [PATCH] ppc32: Add missing initrd header on ppc440
This missing initrd header slipped though last time.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:27 -08:00
Matt Porter
7869ec6d73 [PATCH] ppc32: Remove internal PCI arbiter check on PPC40x
On PPC405GP/GPR it should be possible to enable PCI support, even when the
internal PCI arbiter is disabled (e.g.  when using an external PCI
arbiter).  The removed code didn't allow this, and also generated a warning
on PPC405EP platforms.

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:27 -08:00
Matt Porter
3e9e7c1d0b [PATCH] ppc32: cleanup AMCC PPC40x eval boards to support U-Boot
Cleanup PPC40x eval boards (bubinga, walnut and sycamore) to support U-Boot
as bootloader.  The OpenBIOS bd_info struct is not used in the kernel
anymore (only U-Boot now).

uImage (U-Boot) tested on walnut, sycamore and bubinga
zImage (OpenBIOS) tested on sycamore, bubinga and ebony

Signed-off-by: Stefan Roese <sr@denx.de>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Roland Dreier
90eb266584 [PATCH] ppc32: Add Yucca (440SPe eval board) platform
Add support for AMCC PowerPC 440SPe "Yucca" eval board platform.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Roland Dreier
b0f7b8bc57 [PATCH] ppc32: Add 440SPe support
Add support for the AMCC PowerPC 440SPe SoC, including PCI Express in root
port mode.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Roland Dreier
41aace4fe8 [PATCH] ppc32: Dump error status for both PLB segments on 440SP
The PowerPC 440SP SoC has two Processor Local Bus (PLB) segments (a
high-throughput segment and a low-latency segment).  Fix our PLB register
definitions to cope with this, and add code to dump the status of both
segments when a machine check occurs.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Cc: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Roland Dreier
fcc188e7fd [PATCH] ppc32: Allow ERPN for early serial to depend on CPU type
The PowerPC 440SPe supports up to 16 GB of RAM, and therefore its IO registers
are at 0x4_xxxx_xxxx instead of being at 0x1_xxxx_xxxx like most other PPC 440
chips.  To allow for this, this patch moves the definition of the ERPN used
for mapping UART0 from being hard-coded in the head_44x.S assembly code to
being defined in ibm44x.h.

Signed-off-by: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Matt Porter <mporter@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Lee Nicks
2104da90a9 [PATCH] ppc32: add watchdog & RTC support for Marvell EV64360BP board
This patch adds watchdog, RTC support for Marvell EV64360BP board.

Signed-off-by: Lee Nicks <allinux@gmail.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:26 -08:00
Benjamin Herrenschmidt
863c84b97c [PATCH] ppc: Fix ppc32 build after 64K pages
Oops, some last minute changes caused the 64K pages patch to break ppc32
build, this fixes it.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:23 -08:00
Benjamin Herrenschmidt
c8e3c8b21b [PATCH] ppc64: Fix zImage boot
The zImage wrapper has a bug where it doesn't claim() the memory for the
kernel properly, it forgets to take into account the offset between the ELF
header and the kernel itself.  This results on some machines, like G5s,
into a kernel that crashes at boot when clearing the BSS.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:23 -08:00
Olof Johansson
732ee21f28 [PATCH] POWERPC/PPC64: Fix CONFIG_SMP=n build for ppc64
Two CONFIG_SMP=n build fixes due to missing <asm/smp.h> includes.

Signed-off-by: Olof Johansson <olof@lixom.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:23 -08:00
John W. Linville
e1531b4218 [PATCH] ia64: re-implement dma_get_cache_alignment to avoid EXPORT_SYMBOL
The current ia64 implementation of dma_get_cache_alignment does not work
for modules because it relies on a symbol which is not exported.  Direct
access to a global is a little ugly anyway, so this patch re-implements
dma_get_cache_alignment in a manner similar to what is currently used for
x86_64.

Signed-off-by: John W. Linville <linville@tuxdriver.com>
Cc: "Luck, Tony" <tony.luck@intel.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:23 -08:00
David Gibson
7d24f0b8a5 [PATCH] ppc64: Fix bug in SLB miss handler for hugepages
This patch, however, should be applied on top of the 64k-page-size patch to
fix some problems with hugepage (some pre-existing, another introduced by
this patch).

The patch fixes a bug in the SLB miss handler for hugepages on ppc64
introduced by the dynamic hugepage patch (commit id
c594adad56) due to a misunderstanding of the
srd instruction's behaviour (mea culpa).  The problem arises when a 64-bit
process maps some hugepages in the low 4GB of the address space (unusual).
In this case, as well as the 256M segment in question being marked for
hugepages, other segments at 32G intervals will be incorrectly marked for
hugepages.

In the process, this patch tweaks the semantics of the hugepage bitmaps to
be more sensible.  Previously, an address below 4G was marked for hugepages
if the appropriate segment bit in the "low areas" bitmask was set *or* if
the low bit in the "high areas" bitmap was set (which would mark all
addresses below 1TB for hugepage).  With this patch, any given address is
governed by a single bitmap.  Addresses below 4GB are marked for hugepage
if and only if their bit is set in the "low areas" bitmap (256M
granularity).  Addresses between 4GB and 1TB are marked for hugepage iff
the low bit in the "high areas" bitmap is set.  Higher addresses are marked
for hugepage iff their bit in the "high areas" bitmap is set (1TB
granularity).

To avoid conflicts, this patch must be applied on top of BenH's pending
patch for 64k base page size [0].  As such, this patch also addresses a
hugepage problem introduced by that patch.  That patch allows hugepages of
1MB in size on hardware which supports it, however, that won't work when
using 4k pages (4 level pagetable), because in that case hugepage PTEs are
stored at the PMD level, and each PMD entry maps 2MB.  This patch simply
disallows hugepages in that case (we can do something cleverer to re-enable
them some other day).

Built, booted, and a handful of hugepage related tests passed on POWER5
LPAR (both ARCH=powerpc and ARCH=ppc64).

[0] http://gate.crashing.org/~benh/ppc64-64k-pages.diff

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Paul Mackerras <paulus@samba.org>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-07 07:53:23 -08:00
Linus Torvalds
b54a063df4 Merge master.kernel.org:/home/rmk/linux-2.6-arm 2005-11-06 16:58:11 -08:00
Benjamin Herrenschmidt
3c726f8dee [PATCH] ppc64: support 64k pages
Adds a new CONFIG_PPC_64K_PAGES which, when enabled, changes the kernel
base page size to 64K.  The resulting kernel still boots on any
hardware.  On current machines with 4K pages support only, the kernel
will maintain 16 "subpages" for each 64K page transparently.

Note that while real 64K capable HW has been tested, the current patch
will not enable it yet as such hardware is not released yet, and I'm
still verifying with the firmware architects the proper to get the
information from the newer hypervisors.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-06 16:56:47 -08:00
Russell King
1555972231 [ARM] Fix /proc/cpuinfo format for ARM SMP
glibc expects to count lines beginning with "processor" to determine
the number of processors, not lines beginning with "Processor".  So,
give glibc the format it expects.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 21:41:08 +00:00
Russell King
32f8b97ca3 [ARM] Don't call dump_cpu_info unless we're booting
We don't want to call dump_cpu_info() from cpu_init() after boot since
it produces a lot of unnecessary noise - since cpu_init() gets called
on resume and hotplug cpu insertion events.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 19:49:21 +00:00
Russell King
4fe15ba08f [ARM] Fix second missing declaration of cache_is_vivt()
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 19:47:04 +00:00
Russell King
4299051ebe [ARM] Fix missing declaration of cache_is_vivt()
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 15:46:57 +00:00
Richard Purdie
756c7b7489 [ARM] 3113/1: PXA: Allow machines to override (and also reuse) pxa pm functions
Patch from Richard Purdie

Update the PXA pm.c file to allow machines (such as the Sharp
Zaurus) to override the standard pm functions but reuse/wrap them
where needed.

The init call is made slightly earlier to give machine code an init
level to override them in removing any race.

Signed-off-by: Richard Purdie
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 15:03:23 +00:00
Nicolas Pitre
b7ec479553 [ARM] 3115/1: small optimizations to exception vector entry code
Patch from Nicolas Pitre

Since we know the value of cpsr on entry, we can replace the bic+orr with
a single eor.  Also remove a possible result delay (at least on XScale).

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 14:42:37 +00:00
Lennert Buytenhek
7240f1f183 [ARM] 3114/1: use ixp2000_reg_wrb in ixp2000 uengine loader
Patch from Lennert Buytenhek

Make the uengine loader use ixp2000_reg_wrb in the right places.

Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 14:34:13 +00:00
Alessandro Zummo
84613387cb [ARM] 3089/1: ixp4xx AHB/PCI endianness fix
Patch from Alessandro Zummo

  This patch fixes AHB/PCI endianness problems when the
 processor is in little-endian mode.

 The patch configures the CSR register closely following the directives
 in [1], paragraph 4.1, page 19.

 According to the considerations in [1], page 11, while the AHB bus
 supports both endian modes, on the IXP4XX it always uses big-endian.

 The PCI bus is connected to the South AHB. A wrong setting in the CSR
 register will thus cause a malfunctional PCI bus.

 A schematic diagram of the bus interconnections on the IXP4XX
 can be found in [1], page 18.

 The patch has been verified to work on the NSLU2 in
 both LE and BE modes.

 The author is Peter Korsgaard.

 [1] Intel IXP4XX Product Line of Network Processors and IXC1100
 Control Plane Processor:
 Understanding Big Endian and Little Endian Modes

 http://www.intel.com/design/network/applnots/25423701.pdf

Signed-off-by: Alessandro Zummo <a.zummo@towertech.it>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 14:34:12 +00:00
Dirk Opfer
8459c159f7 [ARM] 3088/1: PXA: Add machine support for the Sharp SL-6000x series of PDAs
Patch from Dirk Opfer

This patch adds basic machine support for the Sharp SL-6000x (Tosa) PDAs.

Signed-off-by: Dirk Opfer
Signed-off-by: Richard Purdie <rpurdie@rpsys.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-06 14:27:52 +00:00
Bart Oldeman
f912696ab3 [PATCH] reset tss->io_bitmap_owner in sys_ioperm()
my patch "x86: initialise tss->io_bitmap_owner to something" (commit ID
d5cd4aadd3) introduced a problem with a
program (DOSEMU) that called ioperm after already doing some port i/o.

The problem is that a process switch return causes tss->io_bitmap_base
to be set to IO_BITMAP_OFFSET so that the fault (that *really* sets the
io bitmap) never triggers.

This fixes that regression.

Signed-off-by: Bart Oldeman <bartoldeman@users.sourceforge.net>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-11-05 16:31:36 -08:00
Linus Torvalds
602d4a7e2f Merge master.kernel.org:/pub/scm/linux/kernel/git/paulus/powerpc-merge 2005-11-04 16:27:50 -08:00
Paul Mackerras
c51e3a417b powerpc: Fix vmlinux.lds.S for 32-bit
We can't currently use asm-ppc/page.h in vmlinux.lds.S, so until
we have a merged page.h, define PAGE_SIZE and KERNELBASE locally.
Also gets rid of some dynamic executable cruft that we had for
32-bit.  With -Ttext=$(KERNELBASE) this didn't cause any problem,
but when we changed to putting . = KERNELBASE in the vmlinux.lds.S
this cruft caused the text to get linked at 0xa0 instead of
0xc0000000.  Oops.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-05 10:36:59 +11:00
Paul Mackerras
5ad5707861 powerpc: Merge smp.c and smp.h
This also moves setup_cpu_maps to setup-common.c (calling it
smp_setup_cpu_maps) and uses it on both 32-bit and 64-bit.

Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-05 10:33:55 +11:00
Russell King
d56c524afa [PATCH] ARM: Reverted 2918/1: [update] Base port of Comdial MP1000 platfrom
No longer maintained
2005-11-04 17:28:34 +00:00
Nicolas Pitre
30c2f90b68 [ARM] 3097/1: change library link ordering
Patch from Nicolas Pitre

We have an optimized sha1 routine (arch/arm/lib/sha1.S) meant to
override the generic one in lib/sha1.c.

Unfortunately lib/lib.a is listed _before_ arch/arm/lib/lib.a in the
link argument list and therefore the architecture specific lib functions
are not picked up before the generic versions.

This patch is a quick fix to change that ordering for ARM.  Here's what
the kbuild maintainer had to say about it (was also CC'd on lkml):

On Wed, 2 Nov 2005, Sam Ravnborg wrote:
> This looks like an obvious way to achive correct ordering.
> We could change it so arch defines always took precedence but
> the above is so simple that it is not worth the effort.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04 17:17:30 +00:00
Todd Poynor
74ec71e161 [ARM] 3087/1: PXA2xx flash platform device conversion
Patch from Todd Poynor

Add platform devices for flash to Lubbock and Mainstone board files.
Once in place, the two existing mtd map drivers for the boards will be
converted to use a single pxa2xx map driver in the linux-mtd tree.
Take 4: flash_platform_data .map_name vs. .name cleaned up, resync with
merged irda patch context.

Signed-off-by: Todd Poynor <tpoynor@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04 17:15:45 +00:00
Dave Jiang
7866f64928 [ARM] 3086/1: ixp2xxx error irq handling
Patch from Dave Jiang

This provides support for IXP2xxx error interrupt handling. Previously there was a patch to remove this (although the original stuff was broken). Well, now the error bits are needed again. These are used extensively by the micro-engine drivers according to Deepak and also we will need it for the new EDAC code that Alan Cox is trying to push into the main kernel.

Re-submit of 3072/1, generated against git tree pulled today. AFAICT, this git tree pulled in all the ARM changes that's in arm.diff. Please let me know if there are additional changes. Thx!

Signed-off-by: Dave Jiang <djiang@mvista.com>
Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04 17:15:44 +00:00
Nicolas Pitre
73f0f7c79b [ARM] 3094/1: remove PLD stuff from old uaccess code
Patch from Nicolas Pitre

ARM processors that have pld instructions are not using those copy_user
implementation anymore.  Let's remove the useless PLD lines which were
half wrong anyway.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-04 17:15:43 +00:00
Paul Mackerras
292a6c58e9 Merge branch 'for-paulus' of git://kernel/home/michael/src/work/ 2005-11-04 16:17:32 +11:00
Paul Mackerras
8ad200d7b7 powerpc: Merge smp-tbsync.c (the generic timebase sync routine)
Signed-off-by: Paul Mackerras <paulus@samba.org>
2005-11-04 13:28:58 +11:00
Michael Ellerman
dc3a9efb5e Merge with Paulus 2005-11-04 12:12:52 +11:00
Michael Ellerman
b8f510219e powerpc: Implement smp_release_cpus() in C not asm
There's no reason for smp_release_cpus() to be asm, and most people can make
more sense of C code. Add an extern declaration to smp.h and remove the custom
one in machine_kexec.c

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>

Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
2005-11-04 12:09:42 +11:00
Deepak Saxena
8b5f4f06ee [ARM] Fix IXDP2x01 config files
IXDP2401 config file has wrong baudrate and both boards have 3 UARTs.

Signed-off-by: Deepak Saxena <dsaxena@plexity.net>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03 21:05:39 +00:00
Russell King
5f8b1178e2 [ARM] Merge SMP tree 2005-11-03 21:02:39 +00:00
Nicolas Pitre
24bcc2f46c [ARM] 3092/1: remove excessive print format padding
Patch from Nicolas Pitre

Using a llx format to print addresses that might possibly be (only) 36
bits wide make sense.  However making it a zero padded 16 char wide
field is a bit excessive and useless.

Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03 20:40:50 +00:00
Russell King
4a5f79e7e6 [ARM SMP] Add configuration option for ARMv6K processors
The 'K' extension adds several new instructions to the ARMv6 ISA
which are primerily useful for SMP.

Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03 15:48:21 +00:00
Russell King
0dcc7474b2 [ARM] Add Realview default configuration file
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03 10:17:44 +00:00
Russell King
ca82d85bc2 [ARM] Fix more 3016/1 breakage
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
2005-11-03 10:06:35 +00:00
Michael Ellerman
40765d2b8b powerpc: Cleanup vpa code
register_vpa() doesn't actually do a VPA register call it just uses the flags
you pass it, so rename it to vpa_call() to be clearer.

We can then define register_vpa() and unregister_vpa() which are both simple
wrappers around vpa_call(). (we'll need unregister_vpa() for kexec soon)

We can then cleanup vpa_init(), and because vpa_init() is only called from
platforms/pseries we remove the definition in asm-ppc64/smp.h.

Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
2005-11-03 19:34:38 +11:00