- New SoC support: i.MX8 ULP.
- New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
i.MX8 ULP EVK.
- A series from Adam Ford to enable Camera and USB support for
imx8mm-beacon device.
- Add overlays for various serdes protocols on LS1028A QDS board using
different PHY cards.
- A series from Biwen Li to update LS1028A devices around RTC, flextimer
and PWM support.
- A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
devices.
- A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
PHY and I2C1 pad configuration.
- A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
dtsi for Librem5 devices.
- Add cache descriptions for i.MX8 SoCs.
- A series from Vladimir Oltean to update ls1028a-rdb device tree in
order to share the DTS between Linux and U-Boot.
- Random device addtion to various i.MX8 and LX2160A based devices.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9hc4UHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM5tZAf/chwOQUH6gwyc76vb2mzcMlYq4jPN
vMxJZ6fJBf+QglOrGfSznl11SHNCGs+NBDvRkJt9JLKj1fHh/jUTZf5HCRnK62lH
YB+w2XxlthufTPujkVXM10Dsx65Up67Mo3ZN5/3M6Fd+w/P8YUzPEL0jD2dm7CDM
rKqe57kcJ6ZaJgASuPdVh51fwpmbCNOQZCRgg4Y+sunXzUVyjA/jOUaeQojg+m2e
TTe80CH+3fugipWkotAa8ypxAJEbeEsPvVB711UxTY28rE2BqDkcPMyOiq+9HW+M
AoqPeyeZffyJGwLblLCQTZzMEuWU9G87H+fda7b8sg7yFPvjefaj+4DbdA==
=ARjB
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAm/QACgkQmmx57+YA
GNk/4g/9GG9YYbOHzLDSit6I92eAwMhIxCE7ls2RrB/JBIi1v13qZ85YTPw9w1Bc
klRXP46fI6dVl7R7t0Vt2zt5MpuNnKAMZsHQR+UvB/Zll4RC7n29NEpWyFW0i4Yv
/G28Whmp1sQs8szrWwvOlxWMY3fSlQMKM4vrtJUU6Che5ec+PwgsRL2rWf5/cnJh
E9HqQ3eJMyP8cdayRnlUCI8yWAdXHkeDQhl7Mu97eX4l7Ka2OkDseEZY+HgRmQSv
Ee3X1EPxFHau9f842NtIwNz54Vdibfh+UHCzMeWOtDZXF8bhWVYp13joPNDM7AWM
0oYMh966t/JuU4cPCQxed61C9Laxg42TkCbfuU7dC5pqKlCdSZSKOmLe7c6vw3Vf
IGQwVgMh8/c3oJAbbPqWz+kfCg3O2KNzA3MnsQuizoLEwa5R4msqtk6FZ5uqR6d/
RYL9eZKzeZWPXwth1KCEx+qLFWuRxC5cdK181Hc/Srm3bzNf/6vfCcReRCvlfOiE
lU1kzHLOKtfUeWSEK3WFnWuTbU68NaH8rUZXpuTlV1kYEeBf/mD4aTOUW9hOh0v6
EYwpk2QYPBcUUYR2KC6gfyJTTwihn3FR8+RiJR+VFjlhNrNHbrNmp3Vo19yjgu/Y
brbFPEitQPnvXdrGAIfck9vHhO9VJ3xygo9SMowGsaRuFLunW/0=
=zQ1O
-----END PGP SIGNATURE-----
Merge tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm64 device tree change for 5.17:
- New SoC support: i.MX8 ULP.
- New board support: i.MX8MM/MN based TQMa8Mx boards, iMX8MN BSH SMM S2,
i.MX8 ULP EVK.
- A series from Adam Ford to enable Camera and USB support for
imx8mm-beacon device.
- Add overlays for various serdes protocols on LS1028A QDS board using
different PHY cards.
- A series from Biwen Li to update LS1028A devices around RTC, flextimer
and PWM support.
- A series from Joakim Zhang to update ENET/FEC suppport on i.MX8M
devices.
- A couple of changes from Lucas Stach to update nitrogen8-som Ethernet
PHY and I2C1 pad configuration.
- A series from Martin Kepplinger to split out a shared imx8mq-librem5-r3
dtsi for Librem5 devices.
- Add cache descriptions for i.MX8 SoCs.
- A series from Vladimir Oltean to update ls1028a-rdb device tree in
order to share the DTS between Linux and U-Boot.
- Random device addtion to various i.MX8 and LX2160A based devices.
* tag 'imx-dt64-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (56 commits)
arm64: dts: imx8mp-evk: configure multiple queues on eqos
arm64: dts: ls1028a-qds: add overlays for various serdes protocols
arm64: dts: ls1028a-qds: enable lpuart1
arm64: dts: ls1028a-qds: move rtc node to the correct i2c bus
arm64: dts: ls1028a-rdb: enable pwm0
arm64: dts: ls1028a: add flextimer based pwm nodes
arm64: dts: ls1028a: add ftm_alarm1 node to be used as wakeup source
arm64: dts: ls1028a: Add PCIe EP nodes
arm64: dts: lx2162a-qds: add interrupt line for RTC node
arm64: dts: lx2162a-qds: support SD UHS-I and eMMC HS400 modes
arm64: dts: lx2160a: enable usb3-lpm-capable for usb3 nodes
arm64: dts: lx2160a-qds: Add mdio mux nodes
arm64: dts: lx2160a: add optee-tz node
arm64: dts: lx2160a-rdb: Add Inphi PHY node
arm64: dts: imx8mm: don't assign PLL2 in SoC dtsi
arm64: dts: nitrogen8-som: correct i2c1 pad-ctrl
arm64: dts: nitrogen8-som: correct network PHY reset
arm64: dts: imx8mn-bsh-smm-s2/pro: Add iMX8MN BSH SMM S2 boards
arm64: dts: imx8mm/n: Remove the 'pm-ignore-notify' property
arm64: dts: imx8ulp: add power domain entry for usdhc
...
Link: https://lore.kernel.org/r/20211218071427.26745-5-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board,
JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ
SystemMaster.
- Update SPBA bus node name to match binding schema.
- A series from Christoph Niedermaier to update imx6qdl-dhcom board
around Ethernet and USB support.
- A series from Giulio Benetti to clean up undocumented/unused fixed
clock compatibles.
- A series from Laurent Pinchart to update i.MX7 MIPI_CSI support.
- A couple of changes from Russell to update phy-mode for
vf610-zii-dev-rev-b board.
- Add Wacom digitizer support for imx7d-remarkable2 device.
-----BEGIN PGP SIGNATURE-----
iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmG9f3QUHHNoYXduZ3Vv
QGtlcm5lbC5vcmcACgkQUFdYWoewfM6v0Qf9EgOkEu4fn/GBbOXBBuh3bWMdw4vB
bJLQ4Ry6iqo/EDscbTWyjjVxlnIYRDa1D8d9ndZcs2wHY0TQhG87/KmH43iHmOAw
vdvIHoe3cgQuFrk15k/bgi2MQm9g8MayugK5xshiLQvOOpSUCBQHuk4oLyRACR3q
m1dpwe5CNaVABjuwZKHlmZq0DNGvN2QJosUbKyl6j8Bxo98I3sjHno0uNHfNaoPP
B7XUOozHf1mAoTBHVb22Ej0Zbpy5FiprOYZKhP7rvuQOnRhg7NcByIhd/s8uQAjA
t3Owq1VCZVEC98sHaZcN2qdAs8n42S+hPHT0WuV0v7SaV4hDCGxXipvxfg==
=uwuV
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAm5kACgkQmmx57+YA
GNnxRhAAuIK0GcrbM4v2jOnXUCBLRrJXZSPqI0Z1DrHIq5JPgqzR7jUcDnoV7T54
Q6b+Bt6XvRJPZlkr9M4p166Qd62KnzSZyxg23Wb0feF6R9TFCrXUeQjmGiBZqB1O
wNDm41Pv6EX7OOBPdRMfhbhPP+ezstJiMRxO99JfupwSPrcMJkgj6KzVdOwgvAg+
J1n33COkczYXJlt7LLADdaucBlB1IerKfRSPy0+mZszC2js2dJqCzVNwkwMXjBTy
5qmB5oBEoUQzeISgPjxp7xMQi57XBhk2UP5c2XWMvZ/OhgRpbWRZU5kBfTlRKXBV
VbdvEUpGHbAghXFwUnxQx/OC465wAgYyN+Rek7ZfWQ7VnD5XM1t2nYjCKOZPujcL
Kfe3HE8ssKyEp0gE3/ZfmMZehwzhXVf6r2wvqEiJAp7Nhigy4pE4A6AGNswVEY/i
Et/MLVOwhdOVlj7dCZfVg7SdlQouhFm8EmrR0zRCJKsdMid2l3MkU/eo7Zl8Slzu
LS6MyCs1T/2+i+HdZgoSFnqvBLqIUtqeTIvhw5zggar/i/nH2JXkJV4A7CuAWB6h
inUJAB9/2B5egqdTIPATI4T6nTu37wZOBl9ZGuijXyRa9wMVtwPr4lySkFFJyFIK
0a3TnHxQjdbDHFoO0kvfB4Yk65Z+rtpnZlPPJgVMn3GSz4ND1tw=
=cSJH
-----END PGP SIGNATURE-----
Merge tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt
i.MX arm device tree change for 5.17:
- New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board,
JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ
SystemMaster.
- Update SPBA bus node name to match binding schema.
- A series from Christoph Niedermaier to update imx6qdl-dhcom board
around Ethernet and USB support.
- A series from Giulio Benetti to clean up undocumented/unused fixed
clock compatibles.
- A series from Laurent Pinchart to update i.MX7 MIPI_CSI support.
- A couple of changes from Russell to update phy-mode for
vf610-zii-dev-rev-b board.
- Add Wacom digitizer support for imx7d-remarkable2 device.
* tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (36 commits)
ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
ARM: dts: imx6qdl: phytec: Add support for optional PEB-AV-02 LCD adapter
ARM: dts: imx6qdl: phytec: Add support for optional PEB-EVAL-01 board
ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer
ARM: dts: imx7d-remarkable2: add wacom digitizer device
ARM: dts: imx6ulz-bsh-smm-m2: Add BSH SMM-M2 IMX6ULZ SystemMaster
ARM: dts: imx6qdl-dhcom: Identify the PHY by ethernet-phy-id0007.c0f0
ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
ARM: dts: imx6qdl: drop "fsl,imx-ckih1"
ARM: dts: imx6qdl: drop "fsl,imx-ckil"
ARM: dts: imx6qdl: drop "fsl,imx-osc"
ARM: dts: imx53: drop "fsl,imx-ckih2"
ARM: dts: imx53: drop "fsl,imx-ckih1"
ARM: dts: imx53: drop "fsl,imx-ckil"
ARM: dts: imx53: drop "fsl,imx-osc"
ARM: dts: imx51: drop "fsl,imx-ckih2"
ARM: dts: imx51: drop "fsl,imx-ckih1"
ARM: dts: imx51: drop "fsl,imx-ckil"
ARM: dts: imx51: drop "fsl,imx-osc"
ARM: dts: imx50: drop "fsl,imx-ckih2"
...
Link: https://lore.kernel.org/r/20211218071427.26745-4-shawnguo@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
"spidev" is not a real device, but a Linux implementation detail. It has
never been documented either. The kernel has WARNed on the use of it for
over 6 years. Time to remove its usage from the tree.
Signed-off-by: Rob Herring <robh@kernel.org>
Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20211217221232.3664417-1-robh@kernel.org'
Reviwed-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
* New Platforms:
- J721s2 SoC, SoM and Common Processor Board support
* New features:
- CAN support on AM64 EVM and SK
- TimeSync Router on AM64
* Fixes:
- Correct d-cache-sets info on J7200
- Fix L2 cache-sets value for J721e/J7200/AM64
- Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
- Disable McASP on IoT2050 board to fix dtbs_check warnings
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEEyRC2zAhGcGjrhiNExEYeRXyRFuMFAmG8nQoQHHZpZ25lc2hy
QHRpLmNvbQAKCRDERh5FfJEW423oB/wMWRML3F6+LKGkDpm6Dme6oV24NzhnACBl
CQ0me3NpQEq4QELPasRwc9E4WOLGCGtDS1HByCrpCELFI7ET9ebwgo7yxl9nvJm+
nzSGwWY9/n3wtXhEc68r0if12WRuu59YTrhf+Q5GNF6uh4iv5aSmAfdSQmUljER5
hs1mZVAQflbxhsG5XR+OUGUvxQZ6Uy8F0OjW++a+ci3QtmQ9y+FUCIMdeLMvXD4C
efaWtFtselePPqN3AJMRddAgo/rbzXWBaX57LG8oMz4a223Ima7FpVB0sgzsnYh8
+qG1JqFC88SR9Prjp7n8oaBdopL+ZXOZvernLWonFIGvvodK57ZM
=DYkC
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAmXgACgkQmmx57+YA
GNlR3g/+MjiqccCspohN8BRhsOTpDtq7NBM+F/oqwKzr9sktpwWeMz6dI1hjPihz
spyixzw10lcHdO3me1B8jOV2+Cek8zZzhDHK0tBXZU4AO+lNmgsjyxWs953TMcg8
eklBb3TpocHfGEuJSzPfTAD1B9QRB3Bl7kMztwE9uNKUCJiXCToIs63i/8QaCjIG
kNzJOCdndw07h4Ms+6MTlDLbpivFnedU43YyrtYGCovg5tlv02B8452KpbfHAIUf
MuuCAIYHm/ZAZa8aOfQ3ZsxwwXCYVu77uG14CTQKChOJeOZ9xzf5WFsRtY4EjJFW
bixwAQ9ZxFuFm8vXPz5vHkNh0nDGdHV2LJ7SVCoFZ/zcxXROH8+ol9/XtHsaShRh
C5+Ekz8GWvWnVCaeon53vzMXneVRoK6YvxtS1P87uuaM8IH3U8lktmHaJMlD/qdl
mGLyJs4GRt3tKdqlLB3FvUb1tWSLSZ84fuRHVb/FXY9M/driZYgGymH7axTWJtSE
m3rB2EMvbYWfdV69J8T0JSPmLwRY9lkJxSvnJulXB/J0yuvqHesrXoZHbiqxkZiM
adYT/ub6a03yRwoCFowTtOfBGyHOG7SLwrdHQ5dam0dCHjc0SGgJZj+gnHWh0asC
+/JMhePTxD1fH0UmElRHY1L1of6iWguWXTFgNZhHUxbCj/z+dSU=
=R9bG
-----END PGP SIGNATURE-----
Merge tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt
Devicetree changes for TI K3 platforms for v5.17 merge window:
* New Platforms:
- J721s2 SoC, SoM and Common Processor Board support
* New features:
- CAN support on AM64 EVM and SK
- TimeSync Router on AM64
* Fixes:
- Correct d-cache-sets info on J7200
- Fix L2 cache-sets value for J721e/J7200/AM64
- Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
- Disable McASP on IoT2050 board to fix dtbs_check warnings
* tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
arch: arm64: ti: Add support J721S2 Common Processor Board
arm64: dts: ti: Add initial support for J721S2 System on Module
arm64: dts: ti: Add initial support for J721S2 SoC
dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
dt-bindings: arm: ti: Add bindings for J721s2 SoC
arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level
arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK
arm64: dts: ti: k3-am64-main: Add support for MCAN
arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes
arm64: dts: ti: k3-j721e: Add support for MCAN nodes
arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes
arm64: dts: ti: k3-am65-mcu: Add Support for MCAN
arm64: dts: ti: k3-am64-main: add timesync router node
arm64: dts: ti: k3-j7200: Correct the d-cache-sets info
arm64: dts: ti: k3-j721e: Fix the L2 cache sets
arm64: dts: ti: k3-j7200: Fix the L2 cache sets
arm64: dts: ti: k3-am642: Fix the L2 cache sets
arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node
arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node
arm64: dts: ti: k3-j721e: correct cache-sets info
Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The vast majority of this contains various updates and cleanups to the
Tegra device trees that will eventually help validate all of them using
the dt-schema infrastructure.
Another notable chunk of this contains additional Tegra234 support as
well as support for the new Jetson AGX Orin Developer Kit.
-----BEGIN PGP SIGNATURE-----
iQJHBAABCAAxFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmG8sbwTHHRyZWRpbmdA
bnZpZGlhLmNvbQAKCRDdI6zXfz6zob2pEACAt4T5USKGU6CR8Zv0A2drxxpPejhI
ph4KMl1+YPwlxP9knZlEKns1XXFc4XXX5CaQK9ndiYRvpOVpa95WPcReLZoi9veh
PBXgNAtryx+IePVkmQWqQ9R9Y7IZ8qOoVRxCgV9xwbRTEEQiwf9FdKQg8A4TV7i5
vq4LYurUV/b6PoXX5U7zlFnWfd5MU4K4ledWW9/6cGKW1vTjlZPiKian5NfGdgpX
sQGR6zXSpiRKgTJCB+CKU3s9aaHHENNfjrop6upEo/G2nETp4EdGCsQn8KguOtf5
KUcZzOxeUow99I25V1y0fFKkOfGWsSnOYUoEzoZ97H1kCIFCzeYChV7RJ0uxPsdK
jzUXh8xRl++Y/C/DfKnN/sIicqyVr1H9qyNZ00LCbCMWcYb3B8wwIjCOMG1YIJV7
5bhvmH0wVeNZYdwaynkfZUpKYsirz6IrMeWBsCb85zC5efuWS5oI/MB2JhezlH4A
AJR9ZZ5OgqYNvnm0khNtU1tzkeoEzzHK2E12PVcCztvACyhCArkCIS/ctyS4kLkL
BC/KWHuVb9SNIKXQYPv+mql5PHz5urcCaDSBZ2JM1D6pKZmp0MlEeR5IDsRF8MBJ
4qhFvBrGC0p4byvLi4doXnvzJKeZDHTaHOpfr0cmQlXiG6XgJioxFIW9LGb8e4fL
12152x5QFWoa5A==
=/fm0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmHAl+0ACgkQmmx57+YA
GNn1KBAAkbKi5H+qUJYMwsKfoobIAs3x40vkm1k0QVei4fa/1NLbwb2lP4yS/Us3
jUQqaa5XtnMRXfeScpc/Nw6o80llgwVyxZbxbdJ+0ffkthLHoCryBPAVe5o45z8d
4ZtHKpJSe9APBjDYi1JKBWWq0dqR/o7BWgxasoqdZ/xs2WwufKt+4P7YMtSRVXfo
QyW4f4c2R5QX7ITfYZpNvMYgk6Bd1eoqZzwAUNoXP8urOUEOqse3/3V7ZbFAivCO
V8CPZDhDE3mcC0nM1RxlBmeBbLAWRpr+JLcasEfYJS82wet3C/9HQCwB2UUZ+MKQ
3I+Os6k6y8qZnfYHFeL5CiPW/oq2SWukykrFYKdLs0RwP13Ekaj5pR43xOj9IGTP
lVu1pcN1sZWxqT5Q3XyilEZTeaTt8bseScJuEm2fCrBrSX+H7ioOwlteM9UGfrzE
tDjIeZQcyTwT7/54cNQzhyuw1mF8G51YZqmXfTLb+wgblK8ZgyvlA9y1DzONpiDA
w08+TTc3X6r6zM1Sd06PSyRauiGwIO1kouEN22UewTmQmRmsrTX8OOm4lw8ZXbcX
xPwMHl60Np3dYYzNawFEkswKHwVPXyvmMtJGsn/zZtwdozT78k24nkKz1aClt+td
M1IyQjCWRdV052zBQ8EM+2iFfPbT9EfMKiIIPsZAxOVhpztpjv4=
=vtaC
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-5.17-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt
arm64: tegra: Device tree changes for v5.17-rc1
The vast majority of this contains various updates and cleanups to the
Tegra device trees that will eventually help validate all of them using
the dt-schema infrastructure.
Another notable chunk of this contains additional Tegra234 support as
well as support for the new Jetson AGX Orin Developer Kit.
* tag 'tegra-for-5.17-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: (47 commits)
arm64: tegra: Add host1x hotflush reset on Tegra210
arm64: tegra: Hook up MMC and BPMP to memory controller
arm64: tegra: Add memory controller on Tegra234
arm64: tegra: Add EMC general interrupt on Tegra194
arm64: tegra: Update SDMMC4 speeds for Tegra194
arm64: tegra: Add dma-coherent for Tegra194 VIC
arm64: tegra: Rename Ethernet PHY nodes
arm64: tegra: Remove unused only-1-8-v properties
arm64: tegra: Sort Tegra210 XUSB clocks correctly
arm64: tegra: Add missing TSEC properties on Tegra210
arm64: tegra: jetson-nano: Remove extra PLL power supplies for PCIe and XUSB
arm64: tegra: smaug: Remove extra PLL power supplies for XUSB
arm64: tegra: jetson-tx1: Remove extra PLL power supplies for PCIe and XUSB
arm64: tegra: Rename GPIO hog nodes to match schema
arm64: tegra: Remove unsupported regulator properties
arm64: tegra: Rename TCU node to "serial"
arm64: tegra: Remove undocumented Tegra194 PCIe "core_m" clock
arm64: tegra: Drop unused properties for Tegra194 PCIe
arm64: tegra: Fix Tegra194 HSP compatible string
arm64: tegra: Drop unsupported nvidia,lpdr property
...
Link: https://lore.kernel.org/r/20211217162253.1801077-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add generic compatible string "ns16550a" to serial port nodes of Armada
38x.
This makes it possible to use earlycon.
Fixes: 0d3d96ab00 ("ARM: mvebu: add Device Tree description of the Armada 380/385 SoCs")
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
CN9130 has a built-in CP115 which has 2 GPIO controllers, but unlike in
Armada 7k and 8k both are left disabled by the SoC DTSI.
This first of all makes no sense as they are always present due to being
SoC built-in and its an issue as boards like CN9130-CRB use the CPO GPIO2
pins for regulators and SD card support without enabling them first.
So, enable both of them like Armada 7k and 8k do.
Fixes: 6b8970bd8d ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
CN9130 has one CP115 built in, which like the CP110 has 2 GPIO and 2 SPI
controllers built-in.
However, unlike the Armada 7k and 8k the SoC DTSI doesn't add the required
aliases as both the Orion SPI driver and MVEBU GPIO drivers require the
aliases to be present.
So add the required aliases for GPIO and SPI controllers.
Fixes: 6b8970bd8d ("arm64: dts: marvell: Add support for Marvell CN9130 SoC support")
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Kernel driver phy-mvebu-a3700-comphy.c needs to know the rate of the
reference xtal clock. So add missing xtal clock source into comphy device
tree node. If the property is not present, the driver defaults to 25 MHz
xtal rate (which, as far as we know, is used by all the existing boards).
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
The CN9130-CRB boards have a MV88E6393X switch connected to eth0. Add
the necessary dts nodes and properties for this.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Enable the CP0 GPIO devices for the CN9130-CRB. This is needed for a
number of the peripheral devices to function.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
BreakOut boards,
- MIPI DSI display support for the R-Car V3u SoC and the Falcon board
stack,
- Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
development board,
- Miscellaneous fixes and improvements.
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYbxhigAKCRCKwlD9ZEnx
cOG8AQCFiS+sBx/X7GiG6fshCBhGw4f+9+jsNl2ucQMmUe9YqAEA83HjBLSQ/DnP
h/VI9JfeGdcyTseWFJwXzm8XChcdWwI=
=sQeE
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmG8pGoACgkQmmx57+YA
GNkDuQ//TMzztwB+sv9Wd/6fItpqlKN6V80YX89bm4ePEsp6EDtaCAxw7/9+G7+A
q9iaAHlukyodkMFea0CIOu7yvEUGM/+vuw501KGhIZ2fUR/GxQTZHw84hsQWDd/r
dRm69sKQsaY/Wu+Rr5Z/0sQJRMbaIbY/fIWGFtKBbDFidJo545xX9ysMbLgSxiR3
3TxPXeUI9MvGUZvmaRuQ3PdjULDb0y6iEN8rLGjEksQy/5G51V6WrYjGRlN855e2
bSPHrY1ybYPpRxXYLbFTYD6DZFDj4YnF6sTSoG7w/G0DepFrHMzbI9bSkxFD0DtJ
+eLvRDwBRQNdlbq/pnCESY4tvFXWKm4cxvSyTn2NjLaEDB2hk+TkeSfCBIJGv5Ao
/dFOYAEhFUz8D3BD6ocFxDbJGoJhXDvb8J/D6BPaqTppLqdo2VbtOgKnjb99Y0GS
Ss+uK25+Bmm6SXvpwWkT3GlpjFZ5R4faMuDupddU5Z461WUUXot5EmU3MG8zXjE3
epC/ElsaxmsgKuMVqt7lrPV0fseJC+ElpXBEnJ9LArhmEoHeo6y0tzoYijuPfgcE
wjizEw3AotVzeLKgoKFYqVVmvXFvOyocA3KbvwQ3doLxyvcQgXBBYdzSBYwTzOaB
0ixsdOqwFPqjF12ycRlvMGVbUJPxmyo33XWI29voem83Mpzxdqk=
=1udU
-----END PGP SIGNATURE-----
Merge tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.17 (take two)
- Initial support for the R-Car S4-8 SoC on the Spider CPU and
BreakOut boards,
- MIPI DSI display support for the R-Car V3u SoC and the Falcon board
stack,
- Thermal and GPU support for the RZ/G2L SoC and the RZ/G2L SMARC EVK
development board,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.17-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: Fix pin controller node names
arm64: dts: renesas: rzg2l-smarc-som: Add vdd core regulator
arm64: dts: renesas: r9a07g044: Add Mali-G31 GPU node
arm64: dts: renesas: r9a07g044: Create thermal zone to support IPA
arm64: dts: renesas: r9a07g044: Add TSU node
arm64: dts: renesas: falcon-cpu: Add DSI display output
arm64: dts: renesas: r8a779a0: Add DSI encoders
arm64: dts: renesas: Add Renesas Spider boards support
arm64: dts: renesas: Add Renesas R8A779F0 SoC support
dt-bindings: clock: Add r8a779f0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779f0 SYSC power domain definitions
arm64: dts: renesas: Fix thermal bindings
Link: https://lore.kernel.org/r/cover.1639736718.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Document new OPP table and power domain properties of the video decoder
hardware.
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Memory Client should be blocked before hardware reset is asserted in order
to prevent memory corruption and hanging of memory controller.
Document Memory Client resets of Host1x, GR2D and GR3D hardware units.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Document new DVFS OPP table and power domain properties of the Host1x bus
and devices sitting on the bus.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Document sub-nodes which describe Tegra SoC clocks that require a higher
voltage of the core power domain in order to operate properly on a higher
clock rates. Each node contains a phandle to OPP table and power domain.
The root PLLs and system clocks don't have any specific device dedicated
to them, clock controller is in charge of managing power for them.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Document Tegra20/30/114-based ASUS Transformer Series tablet devices.
This group includes EeePad TF101, Prime TF201, Pad TF300T, TF300TG
Infinity TF700T, TF701T.
Signed-off-by: David Heidelberg <david@ixit.cz>
Signed-off-by: Anton Bambura <jenneron@protonmail.com>
Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the interconnects, interconnect-names and iommus properties to the
device tree bindings for the Tegra XUDC controller. These are used to
describe the device's paths to and from memory.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the compatible string for the TCU found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the Tegra TCU device tree bindings to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the Tegra186 (and later) BPMP thermal device tree bindings from
the free-form text format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra186 (and later) BPMP bindings from the free-form
text format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra186 (and later) PMC bindings from the free-form
text format to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the compatible string for the UART found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the compatible string for the SDHCI block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the compatible string for the FUSE block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra FUSE bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the compatible string for the RTC block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra RTC bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the compatible string for the HSP block found on the Tegra234 SoC.
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra HSP bindings from the free-form text format to
json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Convert the NVIDIA Tegra SDHCI bindings from the free-form text format
to json-schema.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add the DT binding for the i.MX8MN DISP blk-ctrl.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The PEB-WLBT-05 is equipped with a Sterling-LWB radio module, which is
capable of Wi-Fi 802.11 b/g/n and Bluetooth 4.2.
Signed-off-by: Yunus Bas <y.bas@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Use the interconnects property to hook up the MMC and BPMP to the memory
controller. This is needed to set the correct bus-level DMA mask, which
is a prerequisite for adding IOMMU support.
Signed-off-by: Thierry Reding <treding@nvidia.com>
This adds the memory controller and the embedded external memory
controller found on the Tegra234 SoC.
Signed-off-by: Thierry Reding <treding@nvidia.com>
DMA operations for the Tegra194 Video Image Compositor (VIC) are
coherent and so populate the 'dma-coherent' property.
Signed-off-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
