Commit Graph

63432 Commits

Author SHA1 Message Date
dillon min
40ddb53769 ARM: stm32: Add a new SoC - STM32H750
The STM32H750 is a Cortex-M7 MCU running at 480MHz
and containing 128KBytes internal flash, 1MiB SRAM.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:54:45 +02:00
dillon min
2aaa41eea3 ARM: dts: stm32: add support for art-pi board based on stm32h750xbh6
This patchset has following changes:

- introduce stm32h750.dtsi to support stm32h750 value line
- add pin groups for usart3/uart4/spi1/sdmmc2
- add stm32h750i-art-pi.dtb (arch/arm/boot/dts/Makefile)
- add stm32h750-art-pi.dts to support art-pi board

art-pi board component:
- 8MiB qspi flash
- 16MiB spi flash
- 32MiB sdram
- ap6212 wifi&bt&fm

the detail board information can be found at:
https://art-pi.gitee.io/website/

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:51:41 +02:00
Alexandre Torgue
978783f90a ARM: dts: stm32: fix i2c node typo in stm32h743
Replace upper case by lower case in i2c nodes name.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:47:08 +02:00
Alexandre Torgue
4e1593391f ARM: dts: stm32: add new instances for stm32h743 MCU
Some instances are missing in current support of stm32h743 MCU. This commit
adds usart3/uart4 and sdmmc2 support.

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:46:55 +02:00
dillon min
d3f715e63f ARM: dts: stm32: introduce stm32h7-pinctrl.dtsi to support stm32h750
This patch is intend to add support stm32h750 value line,
just add stm32h7-pinctrl.dtsi for extending, with following changes:

- rename stm32h743-pinctrl.dtsi to stm32h7-pinctrl.dtsi
- move 'pin-controller' from stm32h7-pinctrl.dtsi to stm32h743.dtsi, to
  fix make dtbs_check warrnings
  arch/arm/boot/dts/stm32h750i-art-pi.dt.yaml: soc: 'i2c@40005C00',
  'i2c@58001C00' do not match any of the regexes:
  '@(0|[1-9a-f][0-9a-f]*)$', '^[^@]+$', 'pinctrl-[0-9]+'

Signed-off-by: dillon min <dillon.minfei@gmail.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-04-01 09:33:33 +02:00
Heiner Kallweit
0a0b5f4b43 ARM: iop32x: disable N2100 PCI parity reporting
On the N2100, instead of just marking the r8169 chips as having
broken_parity_status, disable parity error reporting for them entirely.

This was the only relevant place that set broken_parity_status, so we no
longer need to check for it in the r8169 error interrupt handler.

[bhelgaas: squash into one patch, commit log]
Link: https://lore.kernel.org/r/20210330174318.1289680-4-helgaas@kernel.org
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-03-31 12:29:40 -05:00
Will Deacon
6e085e0ac9 arm/arm64: Probe for the presence of KVM hypervisor
Although the SMCCC specification provides some limited functionality for
describing the presence of hypervisor and firmware services, this is
generally applicable only to functions designated as "Arm Architecture
Service Functions" and no portable discovery mechanism is provided for
standard hypervisor services, despite having a designated range of
function identifiers reserved by the specification.

In an attempt to avoid the need for additional firmware changes every
time a new function is added, introduce a UID to identify the service
provider as being compatible with KVM. Once this has been established,
additional services can be discovered via a feature bitmap.

Reviewed-by: Steven Price <steven.price@arm.com>
Signed-off-by: Will Deacon <will@kernel.org>
Signed-off-by: Jianyong Wu <jianyong.wu@arm.com>
[maz: move code to its own file, plug it into PSCI]
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20201209060932.212364-2-jianyong.wu@arm.com
2021-03-31 09:16:55 +01:00
Tony Lindgren
fc85dc42a3 ARM: OMAP2+: Fix uninitialized sr_inst
Fix uninitialized sr_inst.

Fixes: fbfa463be8 ("ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-31 09:27:41 +03:00
Aditya Srivastava
206fa766ca ARM: OMAP1: fix incorrect kernel-doc comment syntax in file
The opening comment mark '/**' is used for highlighting the beginning of
kernel-doc comments.
The header for arch/arm/mach-omap1/timer.c follows this syntax, but the
content inside does not comply with kernel-doc.

This line was probably not meant for kernel-doc parsing, but is parsed
due to the presence of kernel-doc like comment syntax(i.e, '/**'), which
causes unexpected warning from kernel-doc:
"warning: expecting prototype for OMAP1 Dual(). Prototype was for OMAP1610_GPTIMER1_BASE() instead"

Provide a simple fix by replacing this occurrence with general comment
format, i.e. '/*', to prevent kernel-doc from parsing it.

Signed-off-by: Aditya Srivastava <yashsri421@gmail.com>
Acked-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-31 09:05:42 +03:00
Aditya Srivastava
7c4a0b3e5c ARM: OMAP2+: fix incorrect kernel-doc comment syntax in file
The opening comment mark '/**' is used for highlighting the beginning of
kernel-doc comments.
The header for arch/arm/mach-omap2/omap_twl.c follows this syntax, but the
content inside does not comply with kernel-doc.

This line was probably not meant for kernel-doc parsing, but is parsed
due to the presence of kernel-doc like comment syntax(i.e, '/**'), which
causes unexpected warning from kernel-doc:
"warning: wrong kernel-doc identifier on line:
 * OMAP and TWL PMIC specific initializations."

Provide a simple fix by replacing this occurrence with general comment
format, i.e. '/*', to prevent kernel-doc from parsing it.

Signed-off-by: Aditya Srivastava <yashsri421@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-31 09:04:22 +03:00
Lifu Chen
235e384526 ARM: OMAP2+: Use DEFINE_SPINLOCK() for spinlock
spinlock can be initialized automatically with DEFINE_SPINLOCK()
rather than explicitly calling spin_lock_init().

Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Lifu Chen <chenlifu@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-31 08:58:42 +03:00
Drew Fustini
ee368a10d0 ARM: dts: am335x-boneblack.dts: unique gpio-line-names
Based on linux-gpio discussion [1], it is best practice to make the
gpio-line-names unique. Generic names like "[ethernet]" are replaced
with the name of the unique signal on the AM3358 SoC ball corresponding
to the gpio line. "[NC]" is also renamed to the standard "NC" name to
represent "not connected".

[1] https://lore.kernel.org/linux-gpio/20201216195357.GA2583366@x1/

Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-31 08:54:45 +03:00
Boris Lysov
562f818dea arm: mediatek: dts: activate SMP for mt6589
This simple patch activates SMP for mt6589 by adding the missing
"enable-method" property. After applying this patch kernel log
indicates all cores are brought up:

[    0.070122] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.071652] Setting up static identity map for 0x80100000 - 0x80100054
[    0.072711] rcu: Hierarchical SRCU implementation.
[    0.073853] smp: Bringing up secondary CPUs ...
[    0.133675] CPU1: thread -1, cpu 1, socket 0, mpidr 80000001
[    0.193675] CPU2: thread -1, cpu 2, socket 0, mpidr 80000002
[    0.253675] CPU3: thread -1, cpu 3, socket 0, mpidr 80000003
[    0.253818] smp: Brought up 1 node, 4 CPUs
[    0.256930] SMP: Total of 4 processors activated (7982.28 BogoMIPS).
[    0.257855] CPU: All CPU(s) started in SVC mode.

Before this change CPU cores 1-3 didn't start and the following lines
were in kernel log:

[    0.070126] CPU0: thread -1, cpu 0, socket 0, mpidr 80000000
[    0.071640] Setting up static identity map for 0x80100000 - 0x80100054
[    0.072706] rcu: Hierarchical SRCU implementation.
[    0.073850] smp: Bringing up secondary CPUs ...
[    0.076052] smp: Brought up 1 node, 1 CPU
[    0.076678] SMP: Total of 1 processors activated (2000.48 BogoMIPS).
[    0.077603] CPU: All CPU(s) started in SVC mode.

Signed-off-by: Boris Lysov <arzamas-16@mail.ee>
Link: https://lore.kernel.org/r/20210314023735.052d2d35@pc
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-30 12:12:25 +02:00
Linus Walleij
fa99edd84f ARM: dts: ux500: Add Cypress CTTYSP touch to TVK UIB
The TVK1281618 R3 UIB has a Cypress CTTYSP touchscreen.
Add it to the device tree file.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-30 11:34:50 +02:00
Linus Walleij
f9bf6cb246 ARM: dts: ux500: Bump AUX1 voltage
The voltage default on the AB8500 VAUX1 regulator is way
too low and does not correspond to the setting in the
vendor tree. This should be 2.8-3.3 V not 2.5-2.9 V or
things like the HREFP520 touchscreen will not work.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-30 11:34:43 +02:00
Stefan Riedmueller
f57011e72f ARM: dts: imx6: pbab01: Set vmmc supply for both SD interfaces
Setting the vmmc supplies is crucial since otherwise the supplying
regulators get disabled and the SD interfaces are no longer powered
which leads to system failures if the system is booted from that SD
interface.

Fixes: 1e44d3f880 ("ARM i.MX6Q: dts: Enable I2C1 with EEPROM and PMIC on Phytec phyFLEX-i.MX6 Ouad module")
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-30 16:35:28 +08:00
Stefan Riedmueller
45b78dd39f ARM: dts: imx6: pbab01: Set USB OTG port to peripheral
Due to a hardware bug preventing the correct detection if the ID pin
the USB OTG port cannot be used in otg mode. It can either be set to
host or peripheral. Set it to peripheral so vbus is disabled by default.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-30 16:33:16 +08:00
Stefan Riedmueller
a255af65df ARM: dts: imx6: pfla02: Fix USB vbus enable pinmuxing
The pinmuxing for the enable pin of the usbh1 node is wrong. It needs to
be muxed as GPIO. While at it, move the pinctrl to the vbus regulator
since it is actually the regulator enable pin.

Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-30 16:29:01 +08:00
Rafał Miłecki
dcb56d61d5 ARM: dts: BCM5301X: Set Linksys EA9500 power LED
Set Linux default trigger to default on, just like it's normally done
for power LEDs.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-29 11:43:45 -07:00
Rafał Miłecki
1d3352aeed ARM: dts: BCM5301X: Fix Linksys EA9500 partitions
Partitions are basically fixed indeed but firmware ones don't have
hardcoded function ("firmware" vs "failsafe"). Actual function depends
on bootloader configuration. Use a proper binding for that.

While at it fix numbers formatting to avoid:
arch/arm/boot/dts/bcm47094-linksys-panamera.dt.yaml: partitions: 'partition@1F00000' does not match any of the regexes: '^partition@[0-9a-f]+$', 'pinctrl-[0-9]+'
        From schema: Documentation/devicetree/bindings/mtd/partitions/linksys,ns-partitions.yaml

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-29 11:41:04 -07:00
Ingo Molnar
feecb81732 Linux 5.12-rc5
-----BEGIN PGP SIGNATURE-----
 
 iQFRBAABCAA8FiEEq68RxlopcLEwq+PEeb4+QwBBGIYFAmBhB7AeHHRvcnZhbGRz
 QGxpbnV4LWZvdW5kYXRpb24ub3JnAAoJEHm+PkMAQRiGCPUH+KKkSoOlN2YNu1oc
 iy2nznwZoSQTk5ZLz7PypO/WWmmtgzudkObG7yqIURdrncsAkHR17Wu2P7rdBr1j
 Ma+VhF9MQ+xx+r86upH7c3gYfhyfdUMvzuLy0rwLQ1Yrzrb7xFcVkj3BHk54TAQA
 w05sRPuVJ3/c/HPYV2iXkkdnnMbXSTCebeDDwjFb9D3qagr4vcd/PjDHmGbfNF8R
 o6gLpbK5Ly6ww1nth9gGGUjzrW95yVItvcroP6vQWljxhuy+NE1lXRm8LsGhxqtW
 foFFptJup5nhSNJXWtQt/U3huVD6mZ3W3y9cOThPjXZRy2wva3I1IpBKoEFReUpG
 /Tq8EA==
 =tPUY
 -----END PGP SIGNATURE-----

Merge tag 'v5.12-rc5' into locking/core, to pick up fixes

Signed-off-by: Ingo Molnar <mingo@kernel.org>
2021-03-29 15:56:48 +02:00
Chunfeng Yun
617ab489aa arm: dts: mt2701: harmonize node names and compatibles
This is used to fix dtbs_check warning

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-13-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-29 15:45:34 +02:00
Chunfeng Yun
d0ec64bd67 arm: dts: mt7623: harmonize node names and compatibles
This is used to fix dtbs_check warning

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-12-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-29 15:45:34 +02:00
Chunfeng Yun
28acbc773c arm: dts: mt7629: harmonize node names and compatibles
This is used to fix dtbs_check warning

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Link: https://lore.kernel.org/r/20210316092232.9806-11-chunfeng.yun@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-03-29 15:45:33 +02:00
Nicolas Ferre
4136c4443e ARM: configs: at91: Modernize UBI defconfig part
UBI_GLUEBI is not so common and UBI_FASTMAP is used for several years.
Make them part of a modernization of UBI defconfig options.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:14 +02:00
Nicolas Ferre
48a22e1bdf ARM: configs: at91: Add USB Video webcam class
USB webcams are used during validation process, add them as modules.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:14 +02:00
Nicolas Ferre
529ab9039a ARM: configs: at91: Add mtd tests as modules
Add MTD tests as they are used in CI and for validation plan.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:13 +02:00
Codrin Ciubotariu
78529d0252 ARM: configs: at91: sama5: Add audio MIKROE PROTO board
Add this board as a module as it's useful for testing audio on multiple
AT91 boards.

Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@microchip.com>
[nicolas.ferre@microchip.com: adap to newer kernel]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:13 +02:00
Razvan Stefanescu
c016d98eb4 ARM: configs: at91: sama5: Enable LAN78XX as module
Include this driver as the USB-Ethernet chip is present on SAMA5D2-ICP
board.

Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
[nicolas.ferre@microchip.com: update commit subject and message]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:13 +02:00
Razvan Stefanescu
3133badba5 ARM: configs: at91: sama5: PIOBU as built-in
Include as built-in as it's used by multiple boards.

Signed-off-by: Razvan Stefanescu <razvan.stefanescu@microchip.com>
[nicolas.ferre@microchip.com: adap to newer kernel]
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:13 +02:00
Nicolas Ferre
759835d5aa ARM: configs: at91: sama5: MCP16502 regulator as built-in
This regulator is needed by several SoC or external peripherals on
different boards, providing required power rails.  Make it built-in
to match usual use-cases.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-29 11:27:13 +02:00
Emil Velikov
a0e6830c95 ARM: configs: at91: sama5: enable the Hantro G1 engine
The SoC features a Hantro G1 compatible engine. Enable it by default, so
people can make use of it.

Keep it a module, as suggested by Nicolas

Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210311154055.3496076-11-emil.l.velikov@gmail.com
2021-03-29 11:27:02 +02:00
Emil Velikov
7e53ba4e13 ARM: configs: at91: sama5: update with savedefconfig
While enabling an extra config, I've noticed that savedefconfig produced
a notable delta. Split out the no-op changes for clarity sake.

Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Cc: linux-arm-kernel@lists.infradead.org
Signed-off-by: Emil Velikov <emil.velikov@collabora.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Link: https://lore.kernel.org/r/20210311154055.3496076-10-emil.l.velikov@gmail.com
2021-03-29 11:25:39 +02:00
Alain Volmat
14c9e23369 ARM: dts: stm32: enable the analog filter for all I2C nodes in stm32mp151
Enable the analog filter for all I2C nodes of the stm32mp151.

Signed-off-by: Alain Volmat <alain.volmat@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-29 11:13:44 +02:00
Alistair Francis
c11d56b376 ARM: imx7d-remarkable2: Initial device tree for reMarkable2
The reMarkable2 (https://remarkable.com) is an e-ink tablet based on
the imx7d SoC.

This commit is based on the DTS provide by reMarkable but ported to the
latest kernel (instead of 4.14). I have removed references to
non-upstream devices and have changed the UART so that the console can
be accessed without having to open up the device via the OTG pogo pins.

Currently the kernel boots, but there is no support for the display.

WiFi is untested (no display or UART RX makes it hard to test), but
should work with the current upstream driver. As it's untested it's not
included in this commit.

Signed-off-by: Alistair Francis <alistair@alistair23.me>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-29 09:43:19 +08:00
Timon Baetz
7f4ebf3e4c ARM: dts: exynos: Add front camera support to I9100
Add node for Samsung S5K5BAF CMOS image sensor and enable the associated
MIPI CSI-2 receiver node.

Signed-off-by: Timon Baetz <timon.baetz@protonmail.com>
Link: https://lore.kernel.org/r/20210327200851.777327-1-timon.baetz@protonmail.com
[krzk: put csis_1 node in alphabetical order]
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-03-28 20:10:09 +02:00
Linus Walleij
8e3bcdeec7 ARM: dts: ux500: Clarify UIB version per board
Make it clear which UIB is used with each board in
comments and model text.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-27 00:37:28 +01:00
Linus Walleij
396e4dd89d ARM: dts: ux500: Totally separate TVK R2 and R3
There is no point in sharing any definitions between
the R2 and R3 versions of the TVK1281618 UIB. The
proximity sensor collides with the touchscreen etc,
it is less confusing to get rid of the overarching
TVK1281618 UIB file and just use one for each.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-27 00:36:58 +01:00
Linus Walleij
c9334538bf ARM: dts: ux500: Push TC35893 defines to each UIB
The TC35893 is connected to different GPIOs in different
UIBs so just bite the bullet and push this info down
into respective UIB so we can avoid confusion when
reading the DTS files.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-27 00:36:50 +01:00
Linus Torvalds
eb3991ef2c ARM: SoC fixes for v5.12
Too many fixes have accumulated in the soc tree, so this is a fairly
 large set. As usual, most of the fixes are for devicetree files, but
 there are also notable code changes for imx and omap regressions as
 well as some maintainer file updates.
 
 imx:
  - Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
    independent PHY reset.
 
  - Add missing `dma-coherent` property for LayerScape device trees to fix a
    kernel BUG report.
 
  - Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with
    fw_devlink=on.
 
  - Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to
    fix the broken I2C GPIO recovery support.
 
  - Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
    device tree to fix UBI filesystem mount failure.
 
 at91:
  - wrong phy address that blocks Ethernet use on boards with sama5d27 SoM1
 
  - restrictive pin possibilities for sam9x60
 
 omap:
  - Fix ocp interconnect bus access error reporting for omap_l3_noc by
    setting IRQF_NO_THREAD
 
  - Fix changed mmc slot order regression by adding mmc aliases for am335x
 
  - Fix dra7 reboot regression caused by invalid pcie reset map
 
  - Fix smartreflex init regression caused by dropped legacy data
 
  - Fix ti-sysc driver warning on unbind if reset is not deasserted
 
  - Fix flakey reset deassert for dra7 iva
 
 stm32:
  - MAINTAINER file updates
 
 broadcom:
  - brcmstb SoC ID build fix
 
  - MAINTAINER file updates
 
 Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Merge tag 'soc-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM SoC fixes from Arnd Bergmann:
 "Too many fixes have accumulated in the soc tree, so this is a fairly
  large set. As usual, most of the fixes are for devicetree files, but
  there are also notable code changes for imx and omap regressions as
  well as some maintainer file updates.

  imx:
   - Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
     independent PHY reset.

   - Add missing `dma-coherent` property for LayerScape device trees to
     fix a kernel BUG report.

   - Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25
     with fw_devlink=on.

   - Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board
     to fix the broken I2C GPIO recovery support.

   - Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
     device tree to fix UBI filesystem mount failure.

  at91:
   - wrong phy address that blocks Ethernet use on boards with sama5d27
     SoM1

   - restrictive pin possibilities for sam9x60

  omap:
   - Fix ocp interconnect bus access error reporting for omap_l3_noc by
     setting IRQF_NO_THREAD

   - Fix changed mmc slot order regression by adding mmc aliases for
     am335x

   - Fix dra7 reboot regression caused by invalid pcie reset map

   - Fix smartreflex init regression caused by dropped legacy data

   - Fix ti-sysc driver warning on unbind if reset is not deasserted

   - Fix flakey reset deassert for dra7 iva

  stm32:
   - MAINTAINER file updates

  broadcom:
   - brcmstb SoC ID build fix

   - MAINTAINER file updates"

* tag 'soc-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
  MAINTAINERS: Add Alain Volmat as STM32 I2C/SMBUS maintainer
  MAINTAINERS: Remove Vincent Abriou for STM/STI DRM drivers.
  MAINTAINERS: Update some st.com email addresses to foss.st.com
  ARM: dts: imx6ull: fix ubi filesystem mount failed
  ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently
  arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry
  arm64: dts: ls1012a: mark crypto engine dma coherent
  arm64: dts: ls1043a: mark crypto engine dma coherent
  arm64: dts: ls1046a: mark crypto engine dma coherent
  ARM: imx: avic: Convert to using IRQCHIP_DECLARE
  ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet
  ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and C
  ARM: dts: at91-sama5d27_som1: fix phy address to 7
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  MAINTAINERS: rectify BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD
2021-03-26 11:19:38 -07:00
Lee Jones
41dbf4a146 ARM: at91: pm: Move prototypes to mutually included header
Both the caller and the supplier's source file should have access to
the include file containing the prototypes.

Fixes the following W=1 kernel build warning(s):

 drivers/pinctrl/pinctrl-at91.c:1637:6: warning: no previous prototype for ‘at91_pinctrl_gpio_suspend’ [-Wmissing-prototypes]
 1637 | void at91_pinctrl_gpio_suspend(void)
 | ^~~~~~~~~~~~~~~~~~~~~~~~~
 drivers/pinctrl/pinctrl-at91.c:1661:6: warning: no previous prototype for ‘at91_pinctrl_gpio_resume’ [-Wmissing-prototypes]
 1661 | void at91_pinctrl_gpio_resume(void)
 | ^~~~~~~~~~~~~~~~~~~~~~~~

Cc: Russell King <linux@armlinux.org.uk>
Cc: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: Alexandre Belloni <alexandre.belloni@bootlin.com>
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
Link: https://lore.kernel.org/r/20210303124149.3149511-1-lee.jones@linaro.org
2021-03-26 18:20:49 +01:00
Dmitry Osipenko
3a6c267dd7 ARM: tegra: acer-a500: Add atmel,wakeup-method property
Acer A500 uses Atmel Maxtouch 1386 touchscreen controller. This controller
has WAKE line which could be connected to I2C clock lane, dedicated GPIO
or fixed to HIGH level. Controller wakes up from a deep sleep when WAKE
line is asserted low. Acer A500 has WAKE line connected to I2C clock and
Linux device driver doesn't work property without knowing what wakeup
method is used by h/w.

Add atmel,wakeup-method property to the touchscreen node.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
[treding@nvidia.com: use literal to avoid dependency on header file]
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-26 14:21:28 +01:00
Linus Walleij
aeceecd40d ARM: dts: ux500: Fix up TVK R3 sensors
The TVK1281618 R3 sensors are different from the R2 board,
some incorrectness is fixed and some new sensors added, we
also rename the nodes appropriately with accelerometer@
etc.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:45:28 +01:00
Linus Walleij
8d67f4f62c ARM: dts: ux500: Push sensors to TVK R2 board
These sensors are particular to the TVK UIB R2 board and
will conflict with the R3 board, so push them down to
the actual UIB include DTSI.

Rename the nodes appropriately to accelerometer@ etc
in the process.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:45:21 +01:00
Linus Walleij
b428648f60 ARM: dts: ux500: Move Synaptics to right include
The Synaptics RMI4 touchscreen is a property of the
TVK1281618 R2 UIB, so move it into that file instead
of the main TVK1281618 main include so we can define
another touchscreen for the R3 UIB.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:45:15 +01:00
Linus Walleij
2c276eaba3 ARM: dts: ux500: Fix touchscreen on TVK R2
The touchscreen is mounted with flipped x/y on the R2
version of TVK1281618. Push this setting to that DTS file
only.

The function nodes were named wrong so the OF properties
didn not "take". Fix the node names from "rmi-fnn" to
"rmi4-nn" so this also work.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2021-03-26 10:42:31 +01:00
Linus Walleij
2a5b057032 ARM: dts: ux500: Fix BT+WLAN on Janice
GPIO215 has a rail named WLAN_RST_N but it is actually connected
to the pin WLAN_REG_ON on the BCM4330 chip, so this should be
the WLAN regulator GPIO rather than GPIO222. The misunderstanding
comes from the erroneous naming of the rail on the schematic.

GPIO222 is indeed connected to the rail BT_VREG_EN and the pin
BT_REG_ON, and can be handled by the driver as usual.

This corrects misunderstandings and makes Janice's WLAN and BT
setup look like that of Golden and Skomer.

Add explicit BCM4330 compatible to the WLAN chip.

Cc: Stephan Gerhold <stephan@gerhold.net>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Stephan Gerhold <stephan@gerhold.net>
2021-03-26 10:41:51 +01:00
Rafał Miłecki
a872b8e94b ARM: dts: BCM5301X: Describe NVMEM NVRAM on Linksys & Luxul routers
Provide access to NVRAM which contains device environment variables.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-25 14:19:02 -07:00
Rafał Miłecki
43986f3881 ARM: dts: BCM5301X: fix "reg" formatting in /memory node
This fixes warnings/errors like:
arch/arm/boot/dts/bcm4708-buffalo-wzr-1750dhp.dt.yaml: /: memory@0:reg:0: [0, 134217728, 2281701376, 402653184] is too long
        From schema: /lib/python3.6/site-packages/dtschema/schemas/reg.yaml

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
2021-03-25 14:19:02 -07:00
Masahiro Yamada
32e9a0d5ff ARM: 9067/1: syscalls: switch to generic syscallhdr.sh
Many architectures duplicate similar shell scripts.

This commit converts ARM to use scripts/syscallhdr.sh, and also
collects OABI/OEBI syscalls into unistd-eabi.h/unistd-oabi.h,
removing unistd-common.h.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 14:13:14 +00:00
Masahiro Yamada
0047eb9f09 ARM: 9068/1: syscalls: switch to generic syscalltbl.sh
Many architectures duplicate similar shell scripts.

This commit converts ARM to use scripts/syscalltbl.sh.

Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 14:13:13 +00:00
louis.wang
8252ca87c7 ARM: 9066/1: ftrace: pause/unpause function graph tracer in cpu_suspend()
Enabling function_graph tracer on ARM causes kernel panic, because the
function graph tracer updates the "return address" of a function in order
to insert a trace callback on function exit, it saves the function's
original return address in a return trace stack, but cpu_suspend() may not
return through the normal return path.

cpu_suspend() will resume directly via the cpu_resume path, but the return
trace stack has been set-up by the subfunctions of cpu_suspend(), which
makes the "return address" inconsistent with cpu_suspend().

This patch refers to Commit de818bd452
("arm64: kernel: pause/unpause function graph tracer in cpu_suspend()"),

fixes the issue by pausing/resuming the function graph tracer on the thread
executing cpu_suspend(), so that the function graph tracer state is kept
consistent across functions that enter power down states and never return
by effectively disabling graph tracer while they are executing.

Signed-off-by: louis.wang <liang26812@gmail.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:27:42 +00:00
Zhen Lei
a506bd5756 ARM: 9064/1: hw_breakpoint: Do not directly check the event's overflow_handler hook
The commit 1879445dfa ("perf/core: Set event's default
::overflow_handler()") set a default event->overflow_handler in
perf_event_alloc(), and replace the check event->overflow_handler with
is_default_overflow_handler(), but one is missing.

Currently, the bp->overflow_handler can not be NULL. As a result,
enable_single_step() is always not invoked.

Comments from Zhen Lei:

 https://patchwork.kernel.org/project/linux-arm-kernel/patch/20210207105934.2001-1-thunder.leizhen@huawei.com/

Fixes: 1879445dfa ("perf/core: Set event's default ::overflow_handler()")
Signed-off-by: Zhen Lei <thunder.leizhen@huawei.com>
Cc: Wang Nan <wangnan0@huawei.com>
Acked-by: Will Deacon <will@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:27:41 +00:00
Nick Desaulniers
7c182ebab9 ARM: 9062/1: kprobes: rewrite test-arm.c in UAL
Clang's integrated assembler only accepts UAL syntax, rewrite the
instructions that were changed by RVCTv2.1.  The document "Assembly
language changes after RVCTv2.1" was very helpful.

  .syntax unified

directive is added, since -masm-syntax-unified is unreliable for older
but supported versions of GCC. See also:

commit fe09d9c641 ("ARM: 8852/1: uaccess: use unified assembler language syntax")

Link: https://developer.arm.com/documentation/dui0473/c/writing-arm-assembly-language/assembly-language-changes-after-rvctv2-1
Link: https://github.com/ClangBuiltLinux/linux/issues/1271

Reported-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nathan Chancellor <nathan@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:27:40 +00:00
Nick Desaulniers
e9d54be9ad ARM: 9061/1: kprobes: fix UNPREDICTABLE warnings
GNU as warns twice for this file:
Warning: using r15 results in unpredictable behaviour

via the Arm ARM:
K1.1.1 Overview of the constraints on Armv7 UNPREDICTABLE behaviors

  The term UNPREDICTABLE describes a number of cases where the
  architecture has a feature that software must not use.

Ard notes:
  These are selftests that aim to ensure that kprobe never attempts to
  replace the opcodes in question with a probe, but they are not
  actually executed, or expected to occur in real code.

Link: https://github.com/ClangBuiltLinux/linux/issues/1271
Link: https://reviews.llvm.org/D95586

Reported-by: kernelci.org bot <bot@kernelci.org>
Suggested-by: Peter Smith <peter.smith@arm.com>
Suggested-by: Renato Golin <rengolin@systemcall.eu>
Suggested-by: David Spickett <david.spickett@linaro.org>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Nick Desaulniers <ndesaulniers@google.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:27:39 +00:00
Russell King
30e3b4f256 ARM: footbridge: fix PCI interrupt mapping
Since commit 30fdfb929e ("PCI: Add a call to pci_assign_irq() in
pci_device_probe()"), the PCI code will call the IRQ mapping function
whenever a PCI driver is probed. If these are marked as __init, this
causes an oops if a PCI driver is loaded or bound after the kernel has
initialised.

Fixes: 30fdfb929e ("PCI: Add a call to pci_assign_irq() in pci_device_probe()")
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:26:21 +00:00
Vladimir Murzin
45c2f70cba ARM: 9069/1: NOMMU: Fix conversion for_each_membock() to for_each_mem_range()
for_each_mem_range() uses a loop variable, yet looking into code it is
not just iteration counter but more complex entity which encodes
information about memblock. Thus condition i == 0 looks fragile.
Indeed, it broke boot of R-class platforms since it never took i == 0
path (due to i was set to 1). Fix that with restoring original flag
check.

Fixes: b10d6bca87 ("arch, drivers: replace for_each_membock() with for_each_mem_range()")
Signed-off-by: Vladimir Murzin <vladimir.murzin@arm.com>
Acked-by: Mike Rapoport <rppt@linux.ibm.com>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:25:20 +00:00
Ard Biesheuvel
d624833f59 ARM: 9063/1: mm: reduce maximum number of CPUs if DEBUG_KMAP_LOCAL is enabled
The debugging code for kmap_local() doubles the number of per-CPU fixmap
slots allocated for kmap_local(), in order to use half of them as guard
regions. This causes the fixmap region to grow downwards beyond the start
of its reserved window if the supported number of CPUs is large, and collide
with the newly added virtual DT mapping right below it, which is obviously
not good.

One manifestation of this is EFI boot on a kernel built with NR_CPUS=32
and CONFIG_DEBUG_KMAP_LOCAL=y, which may pass the FDT in highmem, resulting
in block entries below the fixmap region that the fixmap code misidentifies
as fixmap table entries, and subsequently tries to dereference using a
phys-to-virt translation that is only valid for lowmem. This results in a
cryptic splat such as the one below.

  ftrace: allocating 45548 entries in 89 pages
  8<--- cut here ---
  Unable to handle kernel paging request at virtual address fc6006f0
  pgd = (ptrval)
  [fc6006f0] *pgd=80000040207003, *pmd=00000000
  Internal error: Oops: a06 [#1] SMP ARM
  Modules linked in:
  CPU: 0 PID: 0 Comm: swapper Not tainted 5.11.0+ #382
  Hardware name: Generic DT based system
  PC is at cpu_ca15_set_pte_ext+0x24/0x30
  LR is at __set_fixmap+0xe4/0x118
  pc : [<c041ac9c>]    lr : [<c04189d8>]    psr: 400000d3
  sp : c1601ed8  ip : 00400000  fp : 00800000
  r10: 0000071f  r9 : 00421000  r8 : 00c00000
  r7 : 00c00000  r6 : 0000071f  r5 : ffade000  r4 : 4040171f
  r3 : 00c00000  r2 : 4040171f  r1 : c041ac78  r0 : fc6006f0
  Flags: nZcv  IRQs off  FIQs off  Mode SVC_32  ISA ARM  Segment none
  Control: 30c5387d  Table: 40203000  DAC: 00000001
  Process swapper (pid: 0, stack limit = 0x(ptrval))

So let's limit CONFIG_NR_CPUS to 16 when CONFIG_DEBUG_KMAP_LOCAL=y. Also,
fix the BUILD_BUG_ON() check that was supposed to catch this, by checking
whether the region grows below the start address rather than above the end
address.

Fixes: 2a15ba82fa ("ARM: highmem: Switch to generic kmap atomic")
Reported-by: Peter Robinson <pbrobinson@gmail.com>
Tested-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-25 10:25:19 +00:00
Johan Jonker
398a408787 ARM: dts: rockchip: remove clock-names property from watchdog node in rv1108.dtsi
A test with the command below gives this error:

/arch/arm/boot/dts/rv1108-evb.dt.yaml: watchdog@10360000:
clock-names:0: 'tclk' was expected

Comment from the dw_wdt.c file:

Try to request the watchdog dedicated timer clock source. It must
be supplied if asynchronous mode is enabled. Otherwise fallback
to the common timer/bus clocks configuration, in which the very
first found clock supply both timer and APB signals.

Like in the other Rockchip watchdog nodes the property "clock-names"
is not needed, so remove it.

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-8-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-03-25 01:35:44 +01:00
Johan Jonker
9ceb98f1ed ARM: dts: rockchip: add new watchdog compatible to rk322x.dtsi
The watchdog compatible strings are suppose to be SoC orientated.
In the more recently added Rockchip rk322x.dtsi file only
the fallback string "snps,dw-wdt" is used, so add the new
compatible string:

"rockchip,rk3228-wdt", "snps,dw-wdt"

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-3-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-03-25 01:35:44 +01:00
Johan Jonker
610e4c7215 ARM: dts: rockchip: add new watchdog compatible to rv1108.dtsi
The watchdog compatible strings are suppose to be SoC orientated.
In the more recently added Rockchip rv1108.dtsi file only
the fallback string "snps,dw-wdt" is used, so add the new
compatible string:

"rockchip,rv1108-wdt", "snps,dw-wdt"

make ARCH=arm dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/watchdog/snps,dw-wdt.yaml

Signed-off-by: Johan Jonker <jbx6244@gmail.com>
Link: https://lore.kernel.org/r/20201218120534.13788-2-jbx6244@gmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2021-03-25 01:35:43 +01:00
Sebastian Reichel
c28c2b851a ARM: dts: motorola-cpcap-mapphone: Prepare for dtbs_check parsing
'<&gpio1 parameters &gpio2 parameters>' and '<&gpio1 parameters>,
<&gpio2 parameters>' result in the same DTB, but second format has
better source code readability. Also 'dtbs_check' currently uses
this format to determine the amount of items specified, so using
this syntax is needed to successfully verify the devicetree source
against a DT schema format.

Cc: linux-omap@vger.kernel.org
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:09 +02:00
Dario Binacchi
f5a1acab32 ARM: dts: am33xx-l4: fix tscadc@0 node indentation
Fix the broken indentation of tscadc@0 node.

Signed-off-by: Dario Binacchi <dariobin@libero.it>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:09 +02:00
André Hentschel
2082852fd7 ARM: dts: omap3-echo: Add ath6kl node
Add ath6kl node.

Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:09 +02:00
André Hentschel
9f98835bb0 ARM: dts: omap3-echo: Update LED configuration
Update LED configuration.

Signed-off-by: André Hentschel <nerv@dawncrow.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:08 +02:00
Drew Fustini
908e654366 ARM: dts: am335x-pocketbeagle: unique gpio-line-names
Based on linux-gpio discussion [1], it is best practice to make the
gpio-line-names unique. Generic names like "[ethernet]" are replaced
with the name of the unique signal on the AM3358 SoC ball corresponding
to the gpio line. "[NC]" is also renamed to the standard "NC" name to
represent "not connected".

[1] https://lore.kernel.org/linux-gpio/20201216195357.GA2583366@x1/

Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com>
Signed-off-by: Drew Fustini <drew@beagleboard.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 18:31:08 +02:00
Dmitry Osipenko
b007744d8f ARM: tegra: Specify tps65911 as wakeup source
Specify TPS65911 as wakeup source on Tegra devices in order to allow
its RTC to wake up system from suspend by default instead of requiring
wakeup to be enabled manually via sysfs.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:58 +01:00
Dmitry Osipenko
3b18164c5e ARM: tegra: Specify memory suspend OPP in device-tree
Specify memory suspend OPP in a device-tree, just for consistency.
Now memory will always suspend on the same frequency.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:45 +01:00
Dmitry Osipenko
1f0ca05865 ARM: tegra: Specify CPU suspend OPP in device-tree
Specify CPU suspend OPP in a device-tree, just for consistency. Now CPU
will always suspend on the same frequency.

Tested-by: Peter Geis <pgwipeout@gmail.com> # Ouya T30
Tested-by: Nicolas Chauvet <kwizart@gmail.com> # PAZ00 T20
Tested-by: Matt Merhar <mattmerhar@protonmail.com> # Ouya T30
Tested-by: Dmitry Osipenko <digetx@gmail.com> # A500 T20 and Nexus7 T30
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:32 +01:00
Dmitry Osipenko
f8693f78f4 ARM: tegra: ouya: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.

If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.

Hence specify all CPU cores as a cooling devices in the device-tree.

Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Matt Merhar <mattmerhar@protonmail.com>
Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:17 +01:00
Dmitry Osipenko
e7c54567ca ARM: tegra: nexus7: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.

If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.

Hence specify all CPU cores as a cooling devices in the device-tree.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:09:02 +01:00
Dmitry Osipenko
b27b9689e1 ARM: tegra: acer-a500: Rename avdd to vdda of touchscreen node
Rename avdd supply to vdda of the touchscreen node. The old supply name
was incorrect.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:08:48 +01:00
Dmitry Osipenko
2a8ec2fcea ARM: tegra: acer-a500: Specify all CPU cores as cooling devices
If CPU0 is unplugged the cooling device can not rebind to CPU1. And if
CPU0 is plugged in again, the cooling device may fail to initialize.

If the CPUs are mapped with the physical CPU0 to Linux numbering
CPU1, the cooling device mapping will fail.

Hence specify all CPU cores as a cooling devices in the device-tree.

Suggested-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:08:03 +01:00
Dmitry Osipenko
ecd021396e ARM: tegra: acer-a500: Reduce thermal throttling hysteresis to 0.2C
The 2C hysteresis is a bit too high, although CPU never gets hot on A500.
Nevertheless, let's reduce thermal throttling hysteresis to 0.2C, which is
a much more reasonable value.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:50 +01:00
Dmitry Osipenko
30e243fc17 ARM: tegra: acer-a500: Enable core voltage scaling
Allow lower core voltages on Acer A500.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:37 +01:00
Dmitry Osipenko
d3cd0c3c49 ARM: tegra: paz00: Enable full voltage scaling ranges for CPU and Core domains
Enable full voltage scaling ranges for CPU and Core power domains.

Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:25 +01:00
Dmitry Osipenko
107f2c6995 ARM: tegra: cardhu: Support CPU thermal throttling
Enable CPU thermal throttling on Tegra30 Cardhu board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:07:11 +01:00
Dmitry Osipenko
ed34855b81 ARM: tegra: cardhu: Support CPU frequency and voltage scaling on all board variants
Enable CPU frequency and voltage scaling on all Tegra30 Cardhu board
variants.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:06:44 +01:00
Dmitry Osipenko
3744c7d88c ARM: tegra: ventana: Support CPU thermal throttling
Enable CPU thermal throttling on Tegra20 Ventana board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:06:28 +01:00
Dmitry Osipenko
82d3d45995 ARM: tegra: ventana: Support CPU and Core voltage scaling
Support CPU and Core voltage scaling on Tegra20 Ventana board.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2021-03-24 16:06:06 +01:00
Tony Lindgren
a1ebdb3741 ARM: dts: Fix swapped mmc order for omap3
Also some omap3 devices like n900 seem to have eMMC and micro-sd swapped
around with commit 21b2cec61c ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for
drivers that existed in v4.4").

Let's fix the issue with aliases as discussed on the mailing lists. While
the mmc aliases should be board specific, let's first fix the issue with
minimal changes.

Cc: Aaro Koskinen <aaro.koskinen@iki.fi>
Cc: Peter Ujfalusi <peter.ujfalusi@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 15:10:32 +02:00
Yang Li
0db1f107f8 ARM: OMAP2+: use true and false for bool variable
fixed the following coccicheck:
./arch/arm/mach-omap2/powerdomain.c:1205:9-10: WARNING: return of 0/1 in
function 'pwrdm_can_ever_lose_context' with return type bool

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 14:11:43 +02:00
Adam Ford
f6a7ea04ad ARM: omap2plus_defconfig: Add AT25 EEPROM module
The Torpedo development kit has an at25 SPI EEPROM on the baseboard.
Enable it as a module in the omap2plus defconfig.

Signed-off-by: Adam Ford <aford173@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:46:55 +02:00
Ivan Jelincic
b556f76a0a ARM: omap2plus_defconfig: Enable Netfilter components as modules
Enable the majority of the Netfilter components as loadable modules
in the omap2plus_defconfig file.

Signed-off-by: Ivan Jelincic <parazyd@dyne.org>
Cc: Tony Lindgren <tony@atomide.com>
Signed-off-by: parazyd <parazyd@dyne.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:40:13 +02:00
Ivan Jelincic
a3dfe1c08b ARM: omap2plus_defconfig: Update for dropped simple-pm-bus
Update omap2plus_defconfig for dropped SIMPLE_PM_BUS.

Signed-off-by: Ivan Jelincic <parazyd@dyne.org>
Signed-off-by: parazyd <parazyd@dyne.org>
[tony@atomide.com: don't drop CONFIG_MICREL_PHY, it's needed]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:38:44 +02:00
Yang Li
c3c83055bd ARM: OMAP2+: add missing call to of_node_put()
In one of the error paths of the for_each_child_of_node() loop,
add missing call to of_node_put().

Fix the following coccicheck warning:
./arch/arm/mach-omap2/omap_hwmod.c:2132:1-23: WARNING: Function
"for_each_child_of_node" should have of_node_put() before return around
line 2140.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:32:57 +02:00
Jiapeng Chong
02e9821b2b ARM: OMAP2+: Replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE
Fix the following coccicheck warning:

./arch/arm/mach-omap2/pm-debug.c:171:0-23: WARNING: pwrdm_suspend_fops
should be defined with DEFINE_DEBUGFS_ATTRIBUTE.

Reported-by: Abaci Robot <abaci@linux.alibaba.com>
Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 13:27:36 +02:00
Tony Lindgren
a3efe3f6d0 ARM: OMAP2+: Fix warning for omap_init_time_of()
Fix warning: no previous prototype for 'omap_init_time_of'.

Fixes: e69b4e1a75 ("ARM: OMAP2+: Add omap_init_time_of()")
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 12:23:58 +02:00
Wei Yongjun
aa4e133184 ARM: OMAP2+: Make symbol 'pdata_quirks_init_clocks' static
The sparse tool complains as follows:

arch/arm/mach-omap2/pdata-quirks.c:578:1: warning:
 symbol 'pdata_quirks_init_clocks' was not declared. Should it be static?

This symbol is not used outside of pdata-quirks.c, so this
commit marks it static.

Fixes: a15de032a7 ("ARM: OMAP2+: Init both prm and prcm nodes early for clocks")
Reported-by: Hulk Robot <hulkci@huawei.com>
Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-24 12:17:38 +02:00
Geert Uytterhoeven
3287a7a8fe ARM: dts: koelsch: Configure pull-up for SOFT_SW GPIO keys
The GPIO pins connected to the 4 Software Switches ("SOFT_SW", SW2) do
not have external pull-up resistors, but rely on internal pull-ups being
enabled.  Fortunately this is satisfied by the initial state of these
pins.

Make this explicit by enabling bias-pull-up, to remove the dependency on
initial state and/or boot loader configuration.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20210303132941.3938516-1-geert+renesas@glider.be
2021-03-24 10:33:21 +01:00
Jernej Skrabec
d580e6f0ec
ARM: dts: sun8i: h3: beelink-x2: Add power button
Beelink X2 has power button. Add node for it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210323204341.28825-1-jernej.skrabec@siol.net
2021-03-24 10:25:37 +01:00
Krzysztof Kozlowski
4483397b03 ARM: socfpga: drop ARCH_SOCFPGA
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them.  After conversion of all
drivers to use the new ARCH_INTEL_SOCFPGA, the remaining ARM option can
be removed.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23 11:03:36 -05:00
Krzysztof Kozlowski
910499e133 ARM: socfpga: introduce common ARCH_INTEL_SOCFPGA
Simplify 32-bit and 64-bit Intel SoCFPGA Kconfig options by having only
one for both of them.  This the common practice for other platforms.
Additionally, the ARCH_SOCFPGA is too generic as SoCFPGA designs come
from multiple vendors.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2021-03-23 11:03:35 -05:00
Dmitry Osipenko
d50229cee6 ARM: multi_v7_defconfig: Stop using deprecated USB_EHCI_TEGRA
The USB_EHCI_TEGRA option is deprecated now and replaced by
USB_CHIPIDEA_TEGRA. Replace USB_EHCI_TEGRA with USB_CHIPIDEA_TEGRA
in multi_v7_defconfig.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Link: https://lore.kernel.org/r/20210320151915.7566-1-digetx@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-23 12:37:31 +01:00
Erwan Le Ray
1657ca6e28 ARM: dts: stm32: Add wakeup management on stm32mp15x UART nodes
Add EXTI lines to the following UART nodes which are used for
wakeup from CStop.
- EXTI line 26 to USART1
- EXTI line 27 to USART2
- EXTI line 28 to USART3
- EXTI line 29 to USART6
- EXTI line 30 to UART4
- EXTI line 31 to UART5
- EXTI line 32 to UART7
- EXTI line 33 to UART8

Signed-off-by: Erwan Le Ray <erwan.leray@foss.st.com>
Link: https://lore.kernel.org/r/20210319184253.5841-6-erwan.leray@foss.st.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-03-23 10:28:18 +01:00
Ingo Molnar
e2db7592be locking: Fix typos in comments
Fix ~16 single-word typos in locking code comments.

Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Paul E. McKenney <paulmck@kernel.org>
Cc: Will Deacon <will.deacon@arm.com>
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
2021-03-22 02:45:52 +01:00
Ard Biesheuvel
e0ba808db7 crypto: arm/chacha-scalar - switch to common rev_l macro
Drop the local definition of a byte swapping macro and use the common
one instead.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-03-19 21:59:46 +11:00
Ard Biesheuvel
d5adb9d1f7 crypto: arm/aes-scalar - switch to common rev_l/mov_l macros
The scalar AES implementation has some locally defined macros which
reimplement things that are now available in macros defined in
assembler.h. So let's switch to those.

Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Nicolas Pitre <nico@fluxnic.net>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Eric Biggers <ebiggers@google.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-03-19 21:59:46 +11:00
Eric Biggers
d2f2516a38 crypto: arm/blake2s - fix for big endian
The new ARM BLAKE2s code doesn't work correctly (fails the self-tests)
in big endian kernel builds because it doesn't swap the endianness of
the message words when loading them.  Fix this.

Fixes: 5172d322d3 ("crypto: arm/blake2s - add ARM scalar optimized BLAKE2s")
Signed-off-by: Eric Biggers <ebiggers@google.com>
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2021-03-19 21:59:45 +11:00
Krzysztof Kozlowski
4a4f3a07a5 ARM: dts: exynos: white-space cleanups
Fixups some white-space issues.  Checkpatch reported:

  WARNING: Block comments should align the * on each line
  WARNING: please, no spaces at the start of a line
  ERROR: code indent should use tabs where possible

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210315124313.114842-2-krzysztof.kozlowski@canonical.com
2021-03-19 11:34:46 +01:00
Krzysztof Kozlowski
61342bc64d ARM: dts: exynos: replace deprecated NTC/Murata compatibles
The compatibles with "ntc" vendor prefix become deprecated and "murata"
should be used.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Link: https://lore.kernel.org/r/20210315124313.114842-1-krzysztof.kozlowski@canonical.com
2021-03-19 11:34:45 +01:00
Florian Fainelli
fcf044891c ARM: Qualify enabling of swiotlb_init()
We do not need a SWIOTLB unless we have DRAM that is addressable beyond
the arm_dma_limit. Compare max_pfn with arm_dma_pfn_limit to determine
whether we do need a SWIOTLB to be initialized.

Fixes: ad3c7b18c5 ("arm: use swiotlb for bounce buffering on LPAE configs")
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2021-03-19 05:00:18 +00:00
Arnd Bergmann
67335b8d28 i.MX fixes for 5.12:
- Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
   independent PHY reset.
 - Add missing `dma-coherent` property for LayerScape device trees to fix a
   kernel BUG report.
 - Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with
   fw_devlink=on.
 - Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to
   fix the broken I2C GPIO recovery support.
 - Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
   device tree to fix UBI filesystem mount failure.
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Merge tag 'imx-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/fixes

i.MX fixes for 5.12:

- Fix an Ethernet issue on imx6ul-14x14-evk board that is caused by
  independent PHY reset.
- Add missing `dma-coherent` property for LayerScape device trees to fix a
  kernel BUG report.
- Use IRQCHIP_DECLARE for AVIC driver to fix a boot issue on i.MX25 with
  fw_devlink=on.
- Add missing I2C pinctrl entry for imx8mp-phyboard-pollux-rdk board to
  fix the broken I2C GPIO recovery support.
- Add `fsl,use-minimum-ecc` property for imx6ull-myir-mys-6ulx-eval
  device tree to fix UBI filesystem mount failure.

* tag 'imx-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: dts: imx6ull: fix ubi filesystem mount failed
  ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently
  arm64: dts: imx8mp-phyboard-pollux-rdk: Add missing pinctrl entry
  arm64: dts: ls1012a: mark crypto engine dma coherent
  arm64: dts: ls1043a: mark crypto engine dma coherent
  arm64: dts: ls1046a: mark crypto engine dma coherent
  ARM: imx: avic: Convert to using IRQCHIP_DECLARE

Link: https://lore.kernel.org/r/20210318090145.GA22955@dragon
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:53:47 +01:00
Arnd Bergmann
3848421f9d AT91 fixes for 5.12:
- only DT changes
 -- wrong phy address that blocks Ethernet use on boards with sama5d27 SoM1
 -- restrictive PIN possibilities for sam9x60
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Merge tag 'at91-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/fixes

AT91 fixes for 5.12:

- only DT changes
-- wrong phy address that blocks Ethernet use on boards with sama5d27 SoM1
-- restrictive PIN possibilities for sam9x60

* tag 'at91-fixes-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet
  ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and C
  ARM: dts: at91-sama5d27_som1: fix phy address to 7

Link: https://lore.kernel.org/r/20210310160547.55382-1-nicolas.ferre@microchip.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:53:25 +01:00
Arnd Bergmann
ebccfa8a74 Fixes for omaps for v5.12-rc cycle
Regression fixes for multiple issues found mostly caused by recent changes
 to drop legacy platform data and and starting to use the new prm driver
 reset controller:
 
 - Fix ocp interconnect bus access error reporting for omap_l3_noc by
   setting IRQF_NO_THREAD
 
 - Fix changed mmc slot order regression by adding mmc aliases for am335x
 
 - Fix dra7 reboot regression caused by invalid pcie reset map
 
 - Fix smartreflex init regression caused by dropped legacy data
 
 - Fix ti-sysc driver warning on unbind if reset is not deasserted
 
 - Fix flakey reset deassert for dra7 iva
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Merge tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes

Fixes for omaps for v5.12-rc cycle

Regression fixes for multiple issues found mostly caused by recent changes
to drop legacy platform data and and starting to use the new prm driver
reset controller:

- Fix ocp interconnect bus access error reporting for omap_l3_noc by
  setting IRQF_NO_THREAD

- Fix changed mmc slot order regression by adding mmc aliases for am335x

- Fix dra7 reboot regression caused by invalid pcie reset map

- Fix smartreflex init regression caused by dropped legacy data

- Fix ti-sysc driver warning on unbind if reset is not deasserted

- Fix flakey reset deassert for dra7 iva

* tag 'omap-for-v5.12/fixes-rc1-signed' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
  soc: ti: omap-prm: Fix occasional abort on reset deassert for dra7 iva
  bus: ti-sysc: Fix warning on unbind if reset is not deasserted
  ARM: OMAP2+: Fix smartreflex init regression after dropping legacy data
  soc: ti: omap-prm: Fix reboot issue with invalid pcie reset map for dra7
  ARM: dts: am33xx: add aliases for mmc interfaces
  bus: omap_l3_noc: mark l3 irqs as IRQF_NO_THREAD

Link: https://lore.kernel.org/r/pull-1614868603-800959@atomide.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-03-18 23:52:27 +01:00
dillon min
e4817a1b6b ARM: dts: imx6ull: fix ubi filesystem mount failed
For NAND Ecc layout, there is a dependency from old kernel's nand driver
setting and current. if old kernel use 4 bit ecc , we should use 4 bit
in new kernel either. else will run into following error at filesystem
mounting.

So, enable fsl,use-minimum-ecc from device tree, to fix this mismatch

[    9.449265] ubi0: scanning is finished
[    9.463968] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read only 22528 bytes, retry
[    9.486940] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read only 22528 bytes, retry
[    9.509906] ubi0 warning: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read only 22528 bytes, retry
[    9.532845] ubi0 error: ubi_io_read: error -74 (ECC error) while reading
22528 bytes from PEB 513:4096, read 22528 bytes

Fixes: f9ecf10cb8 ("ARM: dts: imx6ull: add MYiR MYS-6ULX SBC")
Signed-off-by: dillon min <dillon.minfei@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-18 12:06:28 +08:00
Sascha Hauer
fa8b90070a quota: wire up quotactl_path
Wire up the quotactl_path syscall added in the previous patch.

Link: https://lore.kernel.org/r/20210304123541.30749-3-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Jan Kara <jack@suse.cz>
2021-03-17 15:51:17 +01:00
Carlos Leija
b3d09a06d8 ARM: OMAP4: PM: update ROM return address for OSWR and OFF
We need to add a dummy smc call to the cpuidle wakeup path to force the
ROM code to save the return address after MMU is enabled again. This is
needed to prevent random hangs on secure devices like droid4.

Otherwise the system will eventually hang when entering deeper SoC idle
states with the core and mpu domains in open-switch retention (OSWR).
The hang happens as the ROM code tries to use the earlier physical return
address set by omap-headsmp.S with MMU off while waking up CPU1 again.

The hangs started happening in theory already with commit caf8c87d7f
("ARM: OMAP2+: Allow core oswr for omap4"), but in practise the issue went
unnoticed as various drivers were often blocking any deeper idle states
with hardware autoidle features.

This patch is based on an earlier TI Linux kernel tree commit 92f0b3028d9e
("OMAP4: PM: update ROM return address for OSWR and OFF") written by
Carlos Leija <cileija@ti.com>, Praneeth Bajjuri <praneeth@ti.com>, and
Bryan Buckley <bryan.buckley@ti.com>. A later version of the patch was
updated to use CPU_PM notifiers by Tero Kristo <t-kristo@ti.com>.

Signed-off-by: Carlos Leija <cileija@ti.com>
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
Signed-off-by: Bryan Buckley <bryan.buckley@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Fixes: caf8c87d7f ("ARM: OMAP2+: Allow core oswr for omap4")
Reported-by: Carl Philipp Klemm <philipp@uvos.xyz>
Reported-by: Merlijn Wajer <merlijn@wizzup.org>
Cc: Ivan Jelincic <parazyd@dyne.org>
Cc: Pavel Machek <pavel@ucw.cz>
Cc: Sebastian Reichel <sre@kernel.org>
Cc: Tero Kristo <kristo@kernel.org>
[tony@atomide.com: updated to apply, updated description]
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-17 15:15:52 +02:00
Tony Lindgren
30916faa1a ARM: OMAP4: Fix PMIC voltage domains for bionic
We are now registering the mpu domain three times instead of registering
mpu, core and iva domains like we should.

Fixes: d44fa156dc ("ARM: OMAP2+: Configure voltage controller for cpcap")
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-17 15:15:45 +02:00
Christoph Hellwig
a98f565462 xen-swiotlb: split xen_swiotlb_init
Split xen_swiotlb_init into a normal an an early case.  That makes both
much simpler and more readable, and also allows marking the early
code as __init and x86-only.

Signed-off-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com>
2021-03-17 00:40:54 +00:00
Heikki Krogerus
d4272a7adf
ARM: pxa: zeus: Constify the software node
When device properties are supplied to the devices, in
reality a software fwnode that holds those properties is
created which is then assigned to the device. If the device
properties are constant the software node can also be
constant.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Link: https://lore.kernel.org/r/20210303152814.35070-4-heikki.krogerus@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-16 13:29:43 +00:00
Heikki Krogerus
2df0c4a640
ARM: pxa: icontrol: Constify the software node
When device properties are supplied to the devices, in
reality a software fwnode that holds those properties is
created which is then assigned to the device. If the device
properties are constant the software node can also be
constant.

Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Daniel Mack <daniel@zonque.org>
Cc: Haojian Zhuang <haojian.zhuang@gmail.com>
Cc: Robert Jarzmik <robert.jarzmik@free.fr>
Link: https://lore.kernel.org/r/20210303152814.35070-3-heikki.krogerus@linux.intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-16 13:29:42 +00:00
Fabio Estevam
69cbbf6be5 ARM: imx6ul-14x14-evk: Do not reset the Ethernet PHYs independently
The imx6ul-evk board designer took the bad decision to tie the
two Ethernet PHY reset lines together. This prevents one Ethernet
interface to work while the other one is brought down. For example:

 # ifconfig eth0 down
 # [  279.386551] fec 2188000.ethernet eth1: Link is Down

Bringing eth0 interface down also causes eth1 to be down.

The Ethernet reset lines comes from the IO expander and both come in
logic level 0 by default.

To fix this issue, remove the Ethernet PHY reset descriptions from
its respective PHY nodes and force both Ethernet PHY lines to be at
logic level 1 via gpio-hog.

Fixes: 2db7e78bf0 ("ARM: dts: imx6ul-14x14-evk: Describe the KSZ8081 reset")
Reported-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 15:28:32 +08:00
Fabio Estevam
610a5e2883 ARM: dts: imx7d-mba7: Remove unsupported PCI properties
disable-gpio' and 'power-on-gpio' are not valid properties
according to Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt.

Remove the unsupported properties.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Bruno Thomsen <bruno.thomsen@gmail.com>
Reviewed-by: Matthias Schiffer <matthias.schiffer@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:35:39 +08:00
Tim Harvey
bbc4c8a531 ARM: dts: imx6qdl-gw*: Remove unnecessary #address-cells/#size-cells
Remove the unnecessary #address-cells/#size-cells to avoid warnings
from W=1 build like this:

arch/arm/boot/dts/imx6qdl-gw52xx.dtsi:33.12-78.4: Warning (avoid_unnecessary_addr_size): /gpio-keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
[fabio: Make the warning messages more succint]
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:17:35 +08:00
Fabio Estevam
2343e697fa ARM: dts: imx6dl-plybas: Fix gpio-keys W=1 warnings
Remove the unnecessary #address-cells/#size-cells and rename the node
names to fix the following W=1 dtc warnings:

arch/arm/boot/dts/imx6dl-plybas.dts:26.13-30.5: Warning (unit_address_vs_reg): /gpio_keys/button@20: node has a unit name, but no reg or ranges property
arch/arm/boot/dts/imx6dl-plybas.dts:32.13-36.5: Warning (unit_address_vs_reg): /gpio_keys/button@21: node has a unit name, but no reg or ranges property
arch/arm/boot/dts/imx6dl-plybas.dts:20.12-37.4: Warning (avoid_unnecessary_addr_size): /gpio_keys: unnecessary #address-cells/#size-cells without "ranges" or child "reg" property

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Reviewed-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:17:22 +08:00
Ian Ray
e0ece1860d ARM: dts: imx: bx50v3: Define GPIO line names
Define GPIO line names for b450v3, b650v3, and b850v3.

Signed-off-by: Ian Ray <ian.ray@ge.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Sebastian Reichel
4ec79ac7fa ARM: dts: imx: bx50v3: i2c GPIOs are open drain
Explicitly mark I2C GPIOs as open drain to fix the following
kernel message being printed:

enforced open drain please flag it properly in DT/ACPI DSDT/board file

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Sebastian Reichel
b0884cf28f ARM: dts: imx6q-ba16: improve PHY information
Add PHY voltage supply information fixing the following kernel message:

2188000.ethernet supply phy not found, using dummy regulator

Also add PHY clock information to avoid depending on the bootloader
programming correct values.

The bootloader also sets some reserved registers in the PHY as
advised by Qualcomm, which is not supported by the bindings/kernel
driver, so the reset GPIO has not been added intentionally.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Sebastian Reichel
f285369a28 ARM: dts: imx6q-ba16: add USB OTG VBUS enable GPIO
Add VBUS regulator GPIO information, so that USB OTG port can
also be used in host mode.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Horia Geantă
0f22183206 ARM: dts: ls1021a: mark crypto engine dma coherent
Crypto engine (CAAM) on LS1021A platform is configured HW-coherent,
mark accordingly the DT node.

Signed-off-by: Horia Geantă <horia.geanta@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Philippe Schenker
ce8da61493 ARM: dts: colibri-imx6ull: Change drive strength for usdhc2
The current setting reflects about 86 Ohms of source-impedance
on the SDIO signals where the WiFi board is hooked up. PCB traces are
routed with 50 Ohms impedance and there are no serial resistors on
those traces.

This commit changes the source-impedance to 52 Ohms to better match our
hardware design.

The impedances given in this commit message refer to 3.3V operation.

Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Alexander Shiyan
952d23b053 ARM: dts: imx6ql-pfla02: Move "hog" pins into corresponded pin groups
Move the "hog" pins to the corresponding pin groups for SPI, ENET, PMIC,
LEDs, so that these pins can be used for different purposes when the
respective drivers are disabled.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Alexander Shiyan
51c045ec31 ARM: dts: imx6qdl-phytec-pbab01: Select synchronous mode for AUDMUX
Board uses 4-wire synchronous mode for audio,
so add SYN bit for PTCR AUDMUX registers.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Alexander Shiyan
5e27eeec3b ARM: dts: imx6qdl-ts7970: Drop redundant "fsl,mode" option
The operating mode is used for the AC97 interface only,
so lets drop the excess fsl,mode item from SSI node.

Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Fabio Estevam
a10419db66 ARM: dts: imx53-qsb: Describe the esdhc1 card detect pin
The micro SD card slot uses GPIO3_13 as card detect pin, so describe
it in the devicetree.

This was noticed when converting imx53-qsb board to driver model
in U-Boot as the micro SD card was not getting detected.

Signed-off-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 14:13:43 +08:00
Serge Semin
c2b652e381 ARM: dts: ls1021a: Harmonize DWC USB3 DT nodes name
In accordance with the DWC USB3 bindings the corresponding node
name is suppose to comply with the Generic USB HCD DT schema, which
requires the USB nodes to have the name acceptable by the regexp:
"^usb(@.*)?" . Make sure the "snps,dwc3"-compatible nodes are correctly
named.

Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:17 +08:00
Dima Azarkin
efd9d2419c ARM: dts: imx6qdl-wandboard: add scl/sda gpios definitions for i2c bus recovery
The i2c bus on imx6qdl-wandboard has intermittent issues where SDA can freeze
on low level at the end of transaction so the bus can no longer work. This
impacts reading of EDID data leading to incorrect TV resolution and no audio.

This scenario is improved by adding scl/sda gpios definitions to implement the
i2c bus recovery mechanism.

Signed-off-by: Dima Azarkin <azdmg@outlook.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Sebastian Reichel
36034ae5bb ARM: dts: imx: Mark IIM as syscon on i.MX51/i.MX53
IIM contains system fuses with information like SoC unique ID
(serial) on i.MX51 and i.MX53. Add "syscon" compatible allowing
simple access.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Andreas Kemnade
7c040ba9e7 ARM: dts: imx6sl-tolino-shine2hd: Add Netronix embedded controller
For now, the driver detects an incompatible version, but since
that can be handled by auto-detection, add the controller to the
devicetree now. Only PWM seems to be available, there is no RTC
in that controller.

Signed-off-by: Andreas Kemnade <andreas@kemnade.info>
Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Jonathan Neuschäfer
ad28c3bd7e ARM: dts: imx50-kobo-aura: Add Netronix embedded controller
Enable the Netronix EC on the Kobo Aura ebook reader.

Several features are still missing:
 - Frontlight/backlight. The vendor kernel drives the frontlight LED
   using the PWM output of the EC and an additional boost pin that
   increases the brightness.
 - Battery monitoring
 - Interrupts for RTC alarm and low-battery events

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:22:16 +08:00
Nobuhiro Iwamatsu
f21a468832 ARM: imx: Kconfig: Fix typo in help
Fix typo from i.MX31 to i.MX35 in i.MX35's help.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:21:59 +08:00
Bhaskar Chowdhury
4ae20f26a1 ARM: mach-imx: Fix a spelling in the file pm-imx5.c
s/confgiured/configured/

Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:21:59 +08:00
Saravana Kannan
e2c1b0ff38 ARM: imx: avic: Convert to using IRQCHIP_DECLARE
Using IRQCHIP_DECLARE lets fw_devlink know that it should not wait for
these interrupt controllers to be populated as struct devices. Without
this change, fw_devlink=on will make the consumers of these interrupt
controllers wait for the struct device to be added and thereby block the
consumers' probes forever. Converting to IRQCHIP_DECLARE addresses boot
issues on imx25 with fw_devlink=on that were reported by Martin.

This also removes a lot of boilerplate code.

Fixes: e590474768 ("driver core: Set fw_devlink=on by default")
Reported-by: Martin Kaiser <martin@kaiser.cx>
Signed-off-by: Saravana Kannan <saravanak@google.com>
Tested-by: Martin Kaiser <martin@kaiser.cx>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-03-15 12:21:18 +08:00
Linus Torvalds
70404fe303 A set of irqchip updates:
- Make the GENERIC_IRQ_MULTI_HANDLER configuration correct
 
   - Add a missing DT compatible string fir tge Ingenic driver
 
   - Remove the pointless debugfs_file pointer from struct irqdomain
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Merge tag 'irq-urgent-2021-03-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

Pull irq fixes from Thomas Gleixner:
 "A set of irqchip updates:

   - Make the GENERIC_IRQ_MULTI_HANDLER configuration correct

   - Add a missing DT compatible string for the Ingenic driver

   - Remove the pointless debugfs_file pointer from struct irqdomain"

* tag 'irq-urgent-2021-03-14' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  irqchip/ingenic: Add support for the JZ4760
  dt-bindings/irq: Add compatible string for the JZ4760B
  irqchip: Do not blindly select CONFIG_GENERIC_IRQ_MULTI_HANDLER
  ARM: ep93xx: Select GENERIC_IRQ_MULTI_HANDLER directly
  irqdomain: Remove debugfs_file from struct irq_domain
2021-03-14 13:33:33 -07:00
Linus Torvalds
6bf8819fed xen: branch for v5.12-rc3
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Merge tag 'for-linus-5.12b-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip

Pull xen fixes from Juergen Gross:
 "Two fix series and a single cleanup:

   - a small cleanup patch to remove unneeded symbol exports

   - a series to cleanup Xen grant handling (avoiding allocations in
     some cases, and using common defines for "invalid" values)

   - a series to address a race issue in Xen event channel handling"

* tag 'for-linus-5.12b-rc3-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  Xen/gntdev: don't needlessly use kvcalloc()
  Xen/gnttab: introduce common INVALID_GRANT_{HANDLE,REF}
  Xen/gntdev: don't needlessly allocate k{,un}map_ops[]
  Xen: drop exports of {set,clear}_foreign_p2m_mapping()
  xen/events: avoid handling the same event on two cpus at the same time
  xen/events: don't unmask an event channel when an eoi is pending
  xen/events: reset affinity of 2-level event when tearing it down
2021-03-12 11:34:36 -08:00
Geert Uytterhoeven
c5929afafb ARM: shmobile: defconfig: Refresh for v5.12-rc2
Refresh the defconfig for Renesas ARM systems:
  - Drop CONFIG_ENABLE_MUST_CHECK=n (removed in commit 1967939462
    ("Compiler Attributes: remove CONFIG_ENABLE_MUST_CHECK")).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210310103213.2529983-1-geert+renesas@glider.be
2021-03-12 09:34:57 +01:00
Tony Lindgren
f21af4257c ARM: OMAP2+: Stop building legacy code for dra7 and omap4/5
With the recent changes we are now booting am3/4, dra7, and omap4/5
without legacy data using devicetree, simple-pm-bus and genpd. Let's not
initialize and build the legacy data unless CONFIG_OMAP_HWMOD is selected
based on the SoCs enabled in .config.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-12 10:11:24 +02:00
Juergen Gross
a0e2bf7cb7 x86/paravirt: Switch time pvops functions to use static_call()
The time pvops functions are the only ones left which might be
used in 32-bit mode and which return a 64-bit value.

Switch them to use the static_call() mechanism instead of pvops, as
this allows quite some simplification of the pvops implementation.

Signed-off-by: Juergen Gross <jgross@suse.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/20210311142319.4723-5-jgross@suse.com
2021-03-11 16:17:52 +01:00
Jagan Teki
adc0496104 ARM: dts: stm32: Add Engicam i.Core STM32MP1 EDIMM2.2 Starter Kit
Engicam EDIMM2.2 Starter Kit is an EDIMM 2.2 Form Factor Capacitive
Evaluation Board.

Genaral features:
- LCD 7" C.Touch
- microSD slot
- Ethernet 1Gb
- Wifi/BT
- 2x LVDS Full HD interfaces
- 3x USB 2.0
- 1x USB 3.0
- HDMI Out
- Mini PCIe
- MIPI CSI
- 2x CAN
- Audio Out

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Evaluation board for
creating complete i.Core STM32MP1 EDIMM2.2 Starter Kit.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
6ca2898df5 ARM: dts: stm32: Add Engicam i.Core STM32MP1 C.TOUCH 2.0
Engicam C.TOUCH 2.0 is an EDIMM compliant general purpose Carrier
board.

Genaral features:
- Ethernet 10/100
- Wifi/BT
- USB Type A/OTG
- Audio Out
- CAN
- LVDS panel connector

i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

i.Core STM32MP1 needs to mount on top of this Carrier board for
creating complete i.Core STM32MP1 C.TOUCH 2.0 board.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
30f9a9da4e ARM: dts: stm32: Add Engicam i.Core STM32MP1 SoM
i.Core STM32MP1 is an EDIMM SoM based on STM32MP157A from Engicam.

General features:
- STM32MP157A
- Up to 1GB DDR3L
- 4GB eMMC
- 10/100 Ethernet
- USB 2.0 Host/OTG
- I2S
- MIPI DSI to LVDS
- rest of STM32MP157A features

i.Core STM32MP1 needs to mount on top of Engicam baseboards
for creating complete platform solutions.

Add support for it.

Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
1d278204cb ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 7" OF
7" OF is a capacitive touch 7" Open Frame panel solutions with
- 7" AUO B101AW03 LVDS panel
- EDT, FT5526 Touch

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

MicroGEA STM32MP1 needs to mount on top of MicroDev 2.0 board with
pluged 7" OF for creating complete MicroGEA STM32MP1 MicroDev 2.0
7" Open Frame Solution board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
f838dae7af ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 MicroDev 2.0 board
MicroDev 2.0 is a general purpose miniature carrier board with CAN,
LTE and LVDS panel interfaces.

Genaral features:
- Ethernet 10/100
- USB Type A
- Audio Out
- microSD
- LVDS panel connector
- Wifi/BT (option)
- UMTS LTE with sim connector (option)

MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

MicroGEA STM32MP1 needs to mount on top of this MicroDev 2.0 board
for creating complete MicroGEA STM32MP1 MicroDev 2.0 Carrier board.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:23 +01:00
Jagan Teki
0be81dfaea ARM: dts: stm32: Add Engicam MicroGEA STM32MP1 SoM
MicroGEA STM32MP1 is a STM32MP157A based Micro SoM.

General features:
- STM32MP157AAC
- Up to 1GB DDR3L-800
- 512MB Nand flash
- I2S

MicroGEA STM32MP1 needs to mount on top of Engicam MicroDev carrier
boards for creating complete platform solutions.

Add support for it.

Signed-off-by: Matteo Lisi <matteo.lisi@engicam.com>
Signed-off-by: Francesco Utel <francesco.utel@engicam.com>
Signed-off-by: Mirko Ardinghi <mirko.ardinghi@engicam.com>
Signed-off-by: Jagan Teki <jagan@amarulasolutions.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:06:22 +01:00
Valentin CARON - foss
a1429f3d30 ARM: dts: stm32: fix usart 2 & 3 pinconf to wake up with flow control
Modify usart 2 & 3 pins to allow wake up from low power mode while the
hardware flow control is activated. UART RTS pin need to stay configure
in idle mode to receive characters in order to wake up.

Fixes: 842ed898a7 ("ARM: dts: stm32: add usart2, usart3 and uart7 pins in stm32mp15-pinctrl")

Signed-off-by: Valentin Caron <valentin.caron@foss.st.com>
Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com>
2021-03-11 12:05:11 +01:00
Jan Beulich
bce21a2b48 Xen/gnttab: introduce common INVALID_GRANT_{HANDLE,REF}
It's not helpful if every driver has to cook its own. Generalize
xenbus'es INVALID_GRANT_HANDLE and pcifront's INVALID_GRANT_REF (which
shouldn't have expanded to zero to begin with). Use the constants in
p2m.c and gntdev.c right away, and update field types where necessary so
they would match with the constants' types (albeit without touching
struct ioctl_gntdev_grant_ref's ref field, as that's part of the public
interface of the kernel and would require introducing a dependency on
Xen's grant_table.h public header).

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Juergen Gross <jgross@suse.com>
Link: https://lore.kernel.org/r/db7c38a5-0d75-d5d1-19de-e5fe9f0b9c48@suse.com
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2021-03-10 16:39:29 -06:00
Jan Beulich
0f9b05b9a0 Xen: drop exports of {set,clear}_foreign_p2m_mapping()
They're only used internally, and the layering violation they contain
(x86) or imply (Arm) of calling HYPERVISOR_grant_table_op() strongly
advise against any (uncontrolled) use from a module. The functions also
never had users except the ones from drivers/xen/grant-table.c forever
since their introduction in 3.15.

Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>
Link: https://lore.kernel.org/r/746a5cd6-1446-eda4-8b23-03c1cac30b8d@suse.com
Signed-off-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
2021-03-10 16:39:29 -06:00
Nicolas Ferre
2c69c8a173 ARM: dts: at91: sam9x60: fix mux-mask to match product's datasheet
Fix the whole mux-mask table according to datasheet for the sam9x60
product.  Too much functions for pins were disabled leading to
misunderstandings when enabling more peripherals or taking this table
as an example for another board.
Take advantage of this fix to move the mux-mask in the SoC file where it
belongs and use lower case letters for hex numbers like everywhere in
the file.

Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Fixes: 1e5f532c27 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Cc: <stable@vger.kernel.org> # 5.6+
Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@microchip.com>
Link: https://lore.kernel.org/r/20210310152006.15018-1-nicolas.ferre@microchip.com
2021-03-10 16:38:15 +01:00
Federico Pellegrin
664979bba8 ARM: dts: at91: sam9x60: fix mux-mask for PA7 so it can be set to A, B and C
According to the datasheet PA7 can be set to either function A, B or
C (see table 6-2 of DS60001579D). The previous value would permit just
configuring with function C.

Signed-off-by: Federico Pellegrin <fede@evolware.org>
Fixes: 1e5f532c27 ("ARM: dts: at91: sam9x60: add device tree for soc and board")
Cc: <stable@vger.kernel.org> # 5.6+
Cc: Sandeep Sheriker Mallikarjun <sandeepsheriker.mallikarjun@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2021-03-10 16:38:15 +01:00
Claudiu Beznea
221c3a09dd ARM: dts: at91-sama5d27_som1: fix phy address to 7
Fix the phy address to 7 for Ethernet PHY on SAMA5D27 SOM1. No
connection established if phy address 0 is used.

The board uses the 24 pins version of the KSZ8081RNA part, KSZ8081RNA
pin 16 REFCLK as PHYAD bit [2] has weak internal pull-down.  But at
reset, connected to PD09 of the MPU it's connected with an internal
pull-up forming PHYAD[2:0] = 7.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Fixes: 2f61929eb1 ("ARM: dts: at91: at91-sama5d27_som1: fix PHY ID")
Cc: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
Cc: <stable@vger.kernel.org> # 4.14+
2021-03-10 16:38:15 +01:00
Tony Lindgren
569519de00 Merge branches 'omap-for-v5.13/genpd-dra7', 'omap-for-v5.13/genpd-omap4' and 'omap-for-v5.13/genpd-omap5' into omap-for-v5.13/genpd-drop-legacy
Merge together branches dropping legacy data to avoid a minor merge conflict.
2021-03-10 14:19:20 +02:00
Tony Lindgren
083516ad54 Merge tags 'genpd-dts-dra7', 'genpd-dts-omap4' and 'genpd-dts-omap5' into omap-for-v5.13/dts-genpd
Merge together genpd related dts changes to provide base for dropping the
legacy data to prevent merge conflicts and to send dts changes separately.
2021-03-10 14:16:34 +02:00
Tony Lindgren
229e1e1146 ARM: OMAP2+: Drop legacy platform data for omap5 hwmod
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:02 +02:00
Tony Lindgren
e98cf7e694 ARM: OMAP2+: Drop legacy platform data for omap5 l3
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:02 +02:00
Tony Lindgren
5b9a7b0d2f ARM: OMAP2+: Drop legacy platform data for omap5 l4_cfg
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:01 +02:00
Tony Lindgren
8a32531946 ARM: OMAP2+: Drop legacy platform data for omap5 l4_per
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:01 +02:00
Tony Lindgren
a91560500c ARM: OMAP2+: Drop legacy platform data for omap5 l4_wkup
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:00 +02:00
Tony Lindgren
21206c8f2c ARM: OMAP2+: Drop legacy platform data for omap5 sata
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:00 +02:00
Tony Lindgren
3c648501f8 ARM: OMAP2+: Drop legacy platform data for omap5 mpu
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:05:00 +02:00
Tony Lindgren
aa820b664f ARM: OMAP2+: Drop legacy platform data for omap5 emif
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:59 +02:00
Tony Lindgren
1006777ef4 ARM: OMAP2+: Drop legacy platform data for omap5 dmm
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:59 +02:00
Tony Lindgren
e180887946 ARM: dts: Configure simple-pm-bus for omap5 l3
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:58 +02:00
Tony Lindgren
abd1d31d82 ARM: dts: Configure simple-pm-bus for omap5 l4_cfg
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:58 +02:00
Tony Lindgren
6fe4ff9016 ARM: dts: Configure simple-pm-bus for omap5 l4_per
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:58 +02:00
Tony Lindgren
689919e6e2 ARM: dts: Configure simple-pm-bus for omap5 l4_wkup
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:57 +02:00
Tony Lindgren
d1d16959fe ARM: dts: Move omap5 l3-noc to a separate node
In preparation for probing l3 with simple-pm-bus and genpd, we must move
l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from
claiming the whole l3 instance before simple-pm-bus has a chance to probe.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:57 +02:00
Tony Lindgren
a571cc3941 ARM: dts: Move omap5 mmio-sram out of l3 interconnect
We need mmio-sram early for omap4_sram_init() for IO barrier init, and
will be moving l3 interconnect to probe with simple-pm-bus that probes
at module_init() time. So let's move mmio-sram out of l3 to prepare for
that.

Otherwise we will get the following after probing the interconnects with
simple-pm-bus:

omap4_sram_init:Unable to get sram pool needed to handle errata I688

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:57 +02:00
Tony Lindgren
41ccb66237 ARM: dts: Configure interconnect target module for omap5 sata
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.

There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:56 +02:00
Tony Lindgren
5f89cdc103 ARM: dts: Configure interconnect target module for omap5 gpmc
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:56 +02:00
Tony Lindgren
0e666eb531 ARM: dts: Configure interconnect target module for omap5 mpu
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:55 +02:00
Tony Lindgren
9921f0b9d0 ARM: dts: Configure interconnect target module for omap5 emif
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:55 +02:00
Tony Lindgren
84864f8d2c ARM: dts: Configure interconnect target module for omap5 dmm
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:54 +02:00
Tony Lindgren
2584d7e7f8 ARM: OMAP2+: Drop legacy platform data for omap4 hwmod
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:37 +02:00
Tony Lindgren
3e1ea524d6 ARM: OMAP2+: Drop legacy platform data for omap4 l3
We can now probe interconnects with simple-pm-bus and genpd.

Let's drop the legacy data along with the ti,hwmods property and flip
over to using simple-pm-bus instead of simple-bus.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:37 +02:00
Tony Lindgren
058b4880a8 ARM: OMAP2+: Drop legacy platform data for omap4 l4_cfg
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:36 +02:00
Tony Lindgren
6dd3c92597 ARM: OMAP2+: Drop legacy platform data for omap4 l4_per
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:36 +02:00
Tony Lindgren
e9c5aafaab ARM: OMAP2+: Drop legacy platform data for omap4 l4_wkup
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:35 +02:00
Tony Lindgren
229f3477d6 ARM: OMAP2+: Drop legacy platform data for omap4 mpu
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:35 +02:00
Tony Lindgren
88b1879168 ARM: OMAP2+: Drop legacy platform data for omap4 debugss
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:35 +02:00
Tony Lindgren
a8876b4a3d ARM: OMAP2+: Drop legacy platform data for omap4 emif
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:34 +02:00
Tony Lindgren
35c34fbcbf ARM: OMAP2+: Drop legacy platform data for omap4 dmm
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:34 +02:00
Tony Lindgren
e1d4a11d68 ARM: dts: Prepare for simple-pm-bus for omap4 l3
Let's configure omap4 l3 for power-domain and clocks in preparation for
starting to use simple-pm-bus. We will flip over to using simple-pm-bus
later on after dropping the legacy data for all the devices on l3
interconnect.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:33 +02:00
Tony Lindgren
40dbf5b13f ARM: OMAP2+: Drop legacy platform data for omap4 control modules
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:33 +02:00
Tony Lindgren
eb586ea39f ARM: OMAP2+: Drop legacy platform data for omap4 iss
We can now probe devices with ti-sysc interconnect driver and dts
data. Let's drop the related platform data and custom ti,hwmods
dts property.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:33 +02:00
Tony Lindgren
9a1d0c2837 ARM: dts: Configure simple-pm-bus for omap4 l4_cfg
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:32 +02:00
Tony Lindgren
67dcfdc4a6 ARM: dts: Configure simple-pm-bus for omap4 l4_per
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:32 +02:00
Tony Lindgren
d978b69fa7 ARM: dts: Configure simple-pm-bus for omap4 l4_wkup
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:31 +02:00
Tony Lindgren
bacc83e5ee ARM: dts: Move omap4 l3-noc to a separate node
In preparation for probing l3 with simple-pm-bus and genpd, we must move
l3 noc to a separate node. This is to prevent omap_l3_noc.c driver from
claiming the whole l3 instance before simple-pm-bus has a chance to probe.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:31 +02:00
Tony Lindgren
fbe8285d65 ARM: dts: Move omap4 mmio-sram out of l3 interconnect
We need mmio-sram early for omap4_sram_init() for IO barrier init, and
will be moving l3 interconnect to probe with simple-pm-bus that probes
at module_init() time. So let's move mmio-sram out of l3 to prepare for
that.

Otherwise we will get the following after probing the interconnects with
simple-pm-bus:

omap4_sram_init:Unable to get sram pool needed to handle errata I688

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:31 +02:00
Tony Lindgren
e55cc3f040 ARM: dts: Configure interconnect target module for omap4 mpu
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:30 +02:00
Tony Lindgren
932ddde183 ARM: dts: Configure interconnect target module for omap4 debugss
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:30 +02:00
Tony Lindgren
0600dabe34 ARM: dts: Configure interconnect target module for omap4 emif
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:29 +02:00
Tony Lindgren
fe85baacd7 ARM: dts: Configure interconnect target module for omap4 dmm
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" property to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Let's also use GIC_SPI and IRQ_TYPE_LEVEL_HIGH defines while at it.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:29 +02:00
Tony Lindgren
398c66ed22 ARM: dts: Configure power-domain for omap4 dts iss
Configure power-domain for omap4 dts iss in preparation to
probing devices with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:29 +02:00
Tony Lindgren
345ac6b17b ARM: dts: Configure power-domain for omap4 gfx
Configure power-domain for omap4 dts gfx in preparation to
probing devices with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:28 +02:00
Tony Lindgren
54bc4edb3e ARM: OMAP2+: Drop legacy platform data for dra7 hwmod
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
ecb4c5c096 ARM: dts: Configure simple-pm-bus for dra7 l3
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
53fb6ae97a ARM: OMAP2+: Drop legacy platform data for dra7 l3
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
e93e4104a2 ARM: dts: Configure simple-pm-bus for dra7 l4_cfg
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
b5ac9dedc1 ARM: OMAP2+: Drop legacy platform data for dra7 l4_cfg
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
bdfafc8e2b ARM: dts: Configure simple-pm-bus for dra7 l4_per3
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
b3db9b25ff ARM: OMAP2+: Drop legacy platform data for dra7 l4_per3
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
26c36e16d4 ARM: dts: Configure simple-pm-bus for dra7 l4_per2
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
ca319f4f41 ARM: OMAP2+: Drop legacy platform data for dra7 l4_per2
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
f483a3e123 ARM: dts: Configure simple-pm-bus for dra7 l4_per1
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
47a4b458c1 ARM: OMAP2+: Drop legacy platform data for dra7 l4_per1
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
9a75368b64 ARM: dts: Configure simple-pm-bus for dra7 l4_wkup
We can now probe interconnects with device tree only configuration using
simple-pm-bus and genpd.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
3e09b7d201 ARM: OMAP2+: Drop legacy platform data for dra7 l4_wkup
We can now probe interconnects with simple-pm-bus and genpd.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
27559a8bd4 ARM: dts: Configure interconnect target module for dra7 dmm
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
860e246443 ARM: OMAP2+: Drop legacy platform data for dra7 dmm
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
f5d0aba7c1 ARM: dts: Configure interconnect target module for dra7 mpu
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
66b2f7fee1 ARM: OMAP2+: Drop legacy platform data for dra7 mpu
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
8af15365a3 ARM: dts: Configure interconnect target module for dra7 sata
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Note that the old sysc register offset is wrong, the real offset is at
0x1100 as listed in TRM for SATA_SYSCONFIG register. Looks like we've been
happily using sata on the bootloader configured sysconfig register and
nobody noticed. Also the old register range for SATAMAC_wrapper registers
is wrong at 7 while it should be 8. But that too seems harmless.

There is also an L3 parent interconnect range that we don't seem to be
using. That can be added as needed later on.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
98feab31ac ARM: OMAP2+: Drop legacy platform data for dra7 sata
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
e2d637b069 ARM: dts: Configure interconnect target module for dra7 qspi
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Cc: Vignesh Raghavendra <vigneshr@ti.com>
Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
786018cf55 ARM: OMAP2+: Drop legacy platform data for dra7 qspi
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Cc: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
7f2659ce65 ARM: dts: Move dra7 l3 noc to a separate node
In order to prepare for probing l3 with genpd, we need to move l3 noc
into a separate node for l3 interconnect to have it's own regs, and
to avoid it claiming more than it needs for the io regions.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
b22199e4a1 ARM: OMAP2+: Drop legacy platform data for dra7 pcie
We can now probe devices with ti-sysc interconnect driver and dts data.
Let's drop the related platform data and custom ti,hwmods dts property.

As we're just dropping data, and the early platform data init is based on
the custom ti,hwmods property, we want to drop both the platform data and
ti,hwmods property in a single patch.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
075249bc55 ARM: dts: Properly configure dra7 edma sysconfig registers
Looks like the TRM is not listing the sysconfig for edma, let's add it
based on am437x TRM edma registers as listed in sections "Table 10-26.
EDMA3CC Registers" and "Table 10-99. EDMA3TC Registers".

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
785d943c76 ARM: dts: Configure interconnect target module for dra7 pcie
We can now probe devices with device tree only configuration using
ti-sysc interconnect target module driver. Let's configure the
module, but keep the legacy "ti,hwmods" peroperty to avoid new boot
time warnings. The legacy property will be removed in later patches
together with the legacy platform data.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
c761028ef5 ARM: dts: Update pcie ranges for dra7
In order to update pcie to probe with ti-sysc and genpd, let's update the
pcie ranges to not use address 0 for 0x20000000 and 0x30000000. The range
for 0 is typically used for child devices as the offset from the module
base. In the following patches, we will update pcie to probe with ti-sysc,
and the patches become a bit confusing to read compared to other similar
modules unless we update the ranges first. So let's just use the full
addresses for ranges for the 0x20000000 and 0x30000000 ranges.

Tested-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 14:04:07 +02:00
Tony Lindgren
a15de032a7 ARM: OMAP2+: Init both prm and prcm nodes early for clocks
We need to probe both prm and prcm nodes early for clocks
as they are needed by system timers.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-10 13:59:17 +02:00
Geert Uytterhoeven
a4be49e75a ARM: dts: rza2mevb: Upstream Linux requires SDRAM
As upstream Linux does not support XIP (eXecute-In-Place) for ARMv7-A
platforms that are part of the ARCH_MULTIPLATFORM framework, it cannot
run in the 8 MiB of HyperRAM present on the RZ/A2M CPU board.  Hence the
64 MiB of SDRAM on the sub-board needs to be enabled, which has the
following ramifications:
  - SCIF4 connected to the on-board USB-serial can no longer be used as
    the serial console,
  - Instead, SCIF2 is used as the serial console, by connecting a 3.3V
    TTL USB-to-Serial adapter to the CMOS camera connector,
  - The first Ethernet channel can no longer be used,
  - USB Channel 1 loses the overcurrent input signal.

Based on the Linux-4.19 BSP for RZ/A2.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Chris Brandt <chris.brandt@renesas.com>
Link: https://lore.kernel.org/r/20210304094945.4003097-1-geert+renesas@glider.be
2021-03-10 10:59:11 +01:00
Joel Stanley
08cbcb9702 ARM: 9060/1: kexec: Remove unused kexec_reinit callback
The last (only?) user of this was removed in commit ba364fc752 ("ARM:
Kirkwood: Remove mach-kirkwood"), back in v3.17.

Link: https://lore.kernel.org/r/20210210235243.398810-1-joel@jms.id.au

Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-09 10:25:35 +00:00
Ard Biesheuvel
95731b8ee6 ARM: 9059/1: cache-v7: get rid of mini-stack
Now that we have reduced the number of registers that we need to
preserve when calling v7_invalidate_l1 from the boot code, we can use
scratch registers to preserve the remaining ones, and get rid of the
mini stack entirely. This works around any issues regarding cache
behavior in relation to the uncached accesses to this memory, which is
hard to get right in the general case (i.e., both bare metal and under
virtualization)

While at it, switch v7_invalidate_l1 to using ip as a scratch register
instead of r4. This makes the function AAPCS compliant, and removes the
need to stash r4 in ip across the call.

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-09 10:25:18 +00:00
Ard Biesheuvel
f9e7a99fb6 ARM: 9058/1: cache-v7: refactor v7_invalidate_l1 to avoid clobbering r5/r6
The cache invalidation code in v7_invalidate_l1 can be tweaked to
re-read the associativity from CCSIDR, and keep the way identifier
component in a single register that is assigned in the outer loop. This
way, we need 2 registers less.

Given that the number of sets is typically much larger than the
associativity, rearrange the code so that the outer loop has the fewer
number of iterations, ensuring that the re-read of CCSIDR only occurs a
handful of times in practice.

Fix the whitespace while at it, and update the comment to indicate that
this code is no longer a clone of anything else.

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-09 10:25:18 +00:00
Ard Biesheuvel
c0e50736e8 ARM: 9057/1: cache-v7: add missing ISB after cache level selection
A write to CSSELR needs to complete before its results can be observed
via CCSIDR. So add a ISB to ensure that this is the case.

Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-09 10:25:17 +00:00
Ard Biesheuvel
c4e792d1ac ARM: 9056/1: decompressor: fix BSS size calculation for LLVM ld.lld
The LLVM ld.lld linker uses a different symbol type for __bss_start,
resulting in the calculation of KBSS_SZ to be thrown off. Up until now,
this has gone unnoticed as it only affects the appended DTB case, but
pending changes for ARM in the way the decompressed kernel is cleaned
from the caches has uncovered this problem.

On a ld.lld build:

  $ nm vmlinux |grep bss_
  c1c22034 D __bss_start
  c1c86e98 B __bss_stop

resulting in

  $ readelf -s arch/arm/boot/compressed/vmlinux | grep bss_size
  433: c1c86e98     0 NOTYPE  GLOBAL DEFAULT  ABS _kernel_bss_size

which is obviously incorrect, and may cause the cache clean to access
unmapped memory, or cause the size calculation to wrap, resulting in no
cache clean to be performed at all.

Fix this by updating the sed regex to take D type symbols into account.

Link: https://lore.kernel.org/linux-arm-kernel/6c65bcef-d4e7-25fa-43cf-2c435bb61bb9@collabora.com/
Link: https://lore.kernel.org/linux-arm-kernel/20210205085220.31232-1-ardb@kernel.org/

Cc: <stable@vger.kernel.org> # v4.19+
Reviewed-by: Nick Desaulniers <ndesaulniers@google.com>
Tested-by: Nick Desaulniers <ndesaulniers@google.com>
Reported-by: Guillaume Tucker <guillaume.tucker@collabora.com>
Reported-by: "kernelci.org bot" <bot@kernelci.org>
Signed-off-by: Ard Biesheuvel <ardb@kernel.org>
Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
2021-03-09 10:25:17 +00:00
Marc Zyngier
3e895f4cbd ARM: ep93xx: Select GENERIC_IRQ_MULTI_HANDLER directly
ep93xx currently relies of CONFIG_ARM_VIC to select
GENERIC_IRQ_MULTI_HANDLER. Given that this is logically a platform
architecture property, add the selection of GENERIC_IRQ_MULTI_HANDLER
at the platform level.

Further patches will remove the selection from the irqchip side.

Reported-by: Marc Rutland <mark.rutland@arm.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Tested-by: Hector Martin <marcan@marcan.st>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Will Deacon <will@kernel.org>
Signed-off-by: Marc Zyngier <maz@kernel.org>
2021-03-08 20:18:32 +00:00
Pieter Beers
a4bb294c61
ARM: dts: sunxi: h2-plus-bananapi-m2-zero: Add HDMI out
Add HDMI out, including the display engine, to the BananaPi
M2 Zero.

Signed-off-by: Pieter Beers <pjbrs@floorenpj.xs4all.nl>
Reviewed-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20210304191456.2895-2-pjbrs@floorenpj.xs4all.nl
2021-03-08 16:14:27 +01:00
Tony Lindgren
4c9f4865f4 Merge branch 'fixes-rc2' into fixes 2021-03-08 11:34:12 +02:00
Tony Lindgren
77335a0401 ARM: dts: Fix moving mmc devices with aliases for omap4 & 5
Fix moving mmc devices with dts aliases as discussed on the lists.
Without this we now have internal eMMC mmc1 show up as mmc2 compared
to the earlier order of devices.

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08 11:30:45 +02:00
Tony Lindgren
140a776833 ARM: dts: Drop duplicate sha2md5_fck to fix clk_disable race
We have a duplicate legacy clock defined for sha2md5_fck that can
sometimes race with clk_disable() with the dts configured clock
for OMAP4_SHA2MD5_CLKCTRL when unused clocks are disabled during
boot causing an "Unhandled fault: imprecise external abort".

Signed-off-by: Tony Lindgren <tony@atomide.com>
2021-03-08 11:26:25 +02:00
Yoshihiro Shimoda
da926e813f ARM: dts: renesas: Add mmc aliases into R-Car Gen2 board dts files
After set PROBE_PREFER_ASYNCHRONOUS flag on the mmc host drivers,
the order of /dev/mmcblkN was not fixed in some SoCs which have
multiple SDHI and/or MMCIF controllers. So, we were hard to use
such a device as rootfs by using the kernel parameter like
"root=/dev/mmcblkNpM".

According to the discussion on a mainling list [1], we can add
mmc aliases to fix the issue. So, add such aliases into R-Car Gen2
board dts files. Note that, since R-Car Gen2 is even more complicated
about SDHI and/or MMCIF channels variations and they share pins,
add the aliases into board dts files instead of SoC dtsi files.

[1]
https://lore.kernel.org/linux-arm-kernel/CAPDyKFptyEQNJu8cqzMt2WRFZcwEdjDiytMBp96nkoZyprTgmA@mail.gmail.com/

Fixes: 7320915c88 ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.14")
Fixes: 21b2cec61c ("mmc: Set PROBE_PREFER_ASYNCHRONOUS for drivers that existed in v4.4")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1613131316-30994-1-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2021-03-08 10:22:38 +01:00
Geert Uytterhoeven
de16af5666 ARM: dts: renesas: Group tuples in pin control properties
To improve human readability and enable automatic validation, the tuples
in "pinctrl-*" properties should be grouped using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210204130517.1647073-4-geert+renesas@glider.be
2021-03-08 10:22:38 +01:00
Geert Uytterhoeven
23d2ed63cd ARM: dts: renesas: Group tuples in playback and capture properties
To improve human readability and enable automatic validation, the tuples
in "playback" and "capture" properties in sound device nodes should be
grouped using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210204130517.1647073-3-geert+renesas@glider.be
2021-03-08 10:22:38 +01:00
Geert Uytterhoeven
e0f0c7066f ARM: dts: renesas: Group tuples in APMU cpus properties
To improve human readability and enable automatic validation, the tuples
in "cpus" properties in device nodes for Advanced Power Management Units
for AP-System Core (APMU) should be grouped using angle brackets.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20210204130517.1647073-2-geert+renesas@glider.be
2021-03-08 10:22:38 +01:00
Lad Prabhakar
22650045d9 ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Add support for 8-bit ov7725 sensors
The 8-bit ov7725 sensors can also be connected to the camera daughter
board.

This patch creates a separate dtsi file to describe an ov7725 sensor,
and includes it multiple times in r8a7742-iwg21d-q7-dbcm-ca.dts. The
user can (un)comment #include statements depending on the cameras
connected.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
[geert: describe a single camera in the .dtsi, include multiple times]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210122113424.2833127-3-geert+renesas@glider.be
2021-03-08 10:22:38 +01:00
Lad Prabhakar
97ed7c0a63 ARM: dts: r8a7742-iwg21d-q7-dbcm-ca: Separate out ov5640 nodes
The camera daughter board can also be connected to 8-bit ov7725 sensors,
so in preparation for configurable option to choose depending on the
camera's connected separate out the ov5640 nodes in a dtsi file.

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Biju Das <biju.das.jz@bp.renesas.com>
[geert: describe a single camera in the .dtsi, include multiple times]
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20210122113424.2833127-2-geert+renesas@glider.be
2021-03-08 10:22:38 +01:00
Krzysztof Kozlowski
2601cbaa7e ARM: dts: exynos: add input clock to CMU in Exynos4412 Odroid
Commit 6860510146 ("ARM: dts: exynos: Add support for audio over HDMI
for Odroid X/X2/U3") added assigned clocks under Clock Management Unit.

However the dtschema expects "clocks" property if "assigned-clocks" are
used.  Add reference to input clock to silence the dtschema warnings:

  arch/arm/boot/dts/exynos4412-odroidu3.dt.yaml: clock-controller@10030000: 'clocks' is a dependency of 'assigned-clocks'

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20200906142146.21266-2-krzk@kernel.org
2021-03-07 21:11:38 +01:00
Krzysztof Kozlowski
214e6ec8c9 ARM: dts: s5pv210: correct fuel gauge interrupt trigger level on Fascinate family
The Maxim fuel gauge datasheets describe the interrupt line as active
low with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: 99bb20321f ("ARM: dts: s5pv210: Correct fuelgauge definition on Aries")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-10-krzk@kernel.org
2021-03-07 20:56:18 +01:00
Krzysztof Kozlowski
8987efbb17 ARM: dts: exynos: correct PMIC interrupt trigger level on Snow
The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: c61248afa8 ("ARM: dts: Add max77686 RTC interrupt to cros5250-common")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-9-krzk@kernel.org
2021-03-07 20:56:18 +01:00
Krzysztof Kozlowski
f6368c6056 ARM: dts: exynos: correct PMIC interrupt trigger level on SMDK5250
The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 47580e8d94 ("ARM: dts: Specify MAX77686 pmic interrupt for exynos5250-smdk5250")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-8-krzk@kernel.org
2021-03-07 20:56:17 +01:00
Krzysztof Kozlowski
fbe9c9bb2e ARM: dts: exynos: correct PMIC interrupt trigger level on P4 Note family
The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: f48b5050c3 ("ARM: dts: exynos: add Samsung's Exynos4412-based P4 Note boards")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-7-krzk@kernel.org
2021-03-07 20:56:17 +01:00
Krzysztof Kozlowski
6503c568e9 ARM: dts: exynos: correct PMIC interrupt trigger level on Odroid X/U3 family
The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: eea6653aae ("ARM: dts: Enable PMIC interrupts for exynos4412-odroid-common")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-6-krzk@kernel.org
2021-03-07 20:56:17 +01:00
Krzysztof Kozlowski
e52dcd6e70 ARM: dts: exynos: correct PMIC interrupt trigger level on Midas family
The Maxim PMIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 15dfdfad2d ("ARM: dts: Add basic dts for Exynos4412-based Trats 2 board")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-5-krzk@kernel.org
2021-03-07 20:56:17 +01:00
Krzysztof Kozlowski
15107e443a ARM: dts: exynos: correct MUIC interrupt trigger level on Midas family
The Maxim MUIC datasheets describe the interrupt line as active low
with a requirement of acknowledge from the CPU.  Without specifying the
interrupt type in Devicetree, kernel might apply some fixed
configuration, not necessarily working for this hardware.

Additionally, the interrupt line is shared so using level sensitive
interrupt is here especially important to avoid races.

Fixes: 7eec126675 ("ARM: dts: Add Maxim 77693 PMIC to exynos4412-trats2")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-4-krzk@kernel.org
2021-03-07 20:56:17 +01:00
Krzysztof Kozlowski
8a45f33bd3 ARM: dts: exynos: correct fuel gauge interrupt trigger level on Midas family
The Maxim fuel gauge datasheets describe the interrupt line as active
low with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: e8614292cd ("ARM: dts: Add Maxim 77693 fuel gauge node for exynos4412-trats2")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-3-krzk@kernel.org
2021-03-07 20:56:17 +01:00
Krzysztof Kozlowski
c731a16e2c ARM: dts: exynos: correct fuel gauge interrupt trigger level on P4 Note family
The Maxim fuel gauge datasheets describe the interrupt line as active
low with a requirement of acknowledge from the CPU.  The falling edge
interrupt will mostly work but it's not correct.

Fixes: f48b5050c3 ("ARM: dts: exynos: add Samsung's Exynos4412-based P4 Note boards")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Link: https://lore.kernel.org/r/20201210212534.216197-2-krzk@kernel.org
2021-03-07 20:56:16 +01:00