Commit Graph

612 Commits

Author SHA1 Message Date
Linus Torvalds
968c61f7da - New Drivers
- RK805 Power Management IC (PMIC)
    - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
    - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs
 
  - New Device Support
    - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
    - Add support for X-Powers AXP806 to axp20x
    - Add support for X-Powers AXP813 to axp20x
    - Add support for Intel Sunrise Point LPSS to intel-lpss-pci
 
  - New Functionality
    - Amend API to provide register layout; atmel-smc
 
 - Fix-ups
    - DT re-work; omap, nokia
    - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
    - Fix chip ID formatting issue(s); rk808
    - Optionally register touchscreen devices; da9052-core
    - Documentation improvements; twl-core
    - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
    - Drop unnecessary static declaration; max8925-i2c
    - Kconfig changes (missing deps and remove module support)
    - Slim down oversized licence statement; hi6421-pmic-core
    - Use managed resources (devm_*); lp87565
    - Supply proper error checking/handling; t7l66xb
 
  - Bug Fixes
    - Fix counter duplication issue; da9052-core
    - Fix potential NULL deference issue; max8998
    - Leave SPI-NOR write-protection bit alone; lpc_ich
    - Ensure device is put into reset during suspend; intel-lpss
    - Correct register offset variable size; omap-usb-tll
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Merge tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd

Pull MFD updates from Lee Jones:
 "New Drivers
   - RK805 Power Management IC (PMIC)
   - ROHM BD9571MWV-M MFD Power Management IC (PMIC)
   - Texas Instruments TPS68470 Power Management IC (PMIC) & LEDs

  New Device Support:
   - Add support for HiSilicon Hi6421v530 to hi6421-pmic-core
   - Add support for X-Powers AXP806 to axp20x
   - Add support for X-Powers AXP813 to axp20x
   - Add support for Intel Sunrise Point LPSS to intel-lpss-pci

  New Functionality:
   - Amend API to provide register layout; atmel-smc

  Fix-ups:
   - DT re-work; omap, nokia
   - Header file location change {I2C => MFD}; dm355evm_msp, tps65010
   - Fix chip ID formatting issue(s); rk808
   - Optionally register touchscreen devices; da9052-core
   - Documentation improvements; twl-core
   - Constification; rtsx_pcr, ab8500-core, da9055-i2c, da9052-spi
   - Drop unnecessary static declaration; max8925-i2c
   - Kconfig changes (missing deps and remove module support)
   - Slim down oversized licence statement; hi6421-pmic-core
   - Use managed resources (devm_*); lp87565
   - Supply proper error checking/handling; t7l66xb

  Bug Fixes:
   - Fix counter duplication issue; da9052-core
   - Fix potential NULL deference issue; max8998
   - Leave SPI-NOR write-protection bit alone; lpc_ich
   - Ensure device is put into reset during suspend; intel-lpss
   - Correct register offset variable size; omap-usb-tll"

* tag 'mfd-next-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd: (61 commits)
  mfd: intel_soc_pmic: Differentiate between Bay and Cherry Trail CRC variants
  mfd: intel_soc_pmic: Export separate mfd-cell configs for BYT and CHT
  dt-bindings: mfd: Add bindings for ZII RAVE devices
  mfd: omap-usb-tll: Fix register offsets
  mfd: da9052: Constify spi_device_id
  mfd: intel-lpss: Put I2C and SPI controllers into reset state on suspend
  mfd: da9055: Constify i2c_device_id
  mfd: intel-lpss: Add missing PCI ID for Intel Sunrise Point LPSS devices
  mfd: t7l66xb: Handle return value of clk_prepare_enable
  mfd: Add ROHM BD9571MWV-M PMIC DT bindings
  mfd: intel_soc_pmic_chtwc: Turn Kconfig option into a bool
  mfd: lp87565: Convert to use devm_mfd_add_devices()
  mfd: Add support for TPS68470 device
  mfd: lpc_ich: Do not touch SPI-NOR write protection bit on Haswell/Broadwell
  mfd: syscon: atmel-smc: Add helper to retrieve register layout
  mfd: axp20x: Use correct platform device ID for many PEK
  dt-bindings: mfd: axp20x: Introduce bindings for AXP813
  mfd: axp20x: Add support for AXP813 PMIC
  dt-bindings: mfd: axp20x: Add AXP806 to supported list of chips
  mfd: Add ROHM BD9571MWV-M MFD PMIC driver
  ...
2017-09-07 13:51:13 -07:00
Linus Torvalds
aae3dbb477 Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
Pull networking updates from David Miller:

 1) Support ipv6 checksum offload in sunvnet driver, from Shannon
    Nelson.

 2) Move to RB-tree instead of custom AVL code in inetpeer, from Eric
    Dumazet.

 3) Allow generic XDP to work on virtual devices, from John Fastabend.

 4) Add bpf device maps and XDP_REDIRECT, which can be used to build
    arbitrary switching frameworks using XDP. From John Fastabend.

 5) Remove UFO offloads from the tree, gave us little other than bugs.

 6) Remove the IPSEC flow cache, from Florian Westphal.

 7) Support ipv6 route offload in mlxsw driver.

 8) Support VF representors in bnxt_en, from Sathya Perla.

 9) Add support for forward error correction modes to ethtool, from
    Vidya Sagar Ravipati.

10) Add time filter for packet scheduler action dumping, from Jamal Hadi
    Salim.

11) Extend the zerocopy sendmsg() used by virtio and tap to regular
    sockets via MSG_ZEROCOPY. From Willem de Bruijn.

12) Significantly rework value tracking in the BPF verifier, from Edward
    Cree.

13) Add new jump instructions to eBPF, from Daniel Borkmann.

14) Rework rtnetlink plumbing so that operations can be run without
    taking the RTNL semaphore. From Florian Westphal.

15) Support XDP in tap driver, from Jason Wang.

16) Add 32-bit eBPF JIT for ARM, from Shubham Bansal.

17) Add Huawei hinic ethernet driver.

18) Allow to report MD5 keys in TCP inet_diag dumps, from Ivan
    Delalande.

* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1780 commits)
  i40e: point wb_desc at the nvm_wb_desc during i40e_read_nvm_aq
  i40e: avoid NVM acquire deadlock during NVM update
  drivers: net: xgene: Remove return statement from void function
  drivers: net: xgene: Configure tx/rx delay for ACPI
  drivers: net: xgene: Read tx/rx delay for ACPI
  rocker: fix kcalloc parameter order
  rds: Fix non-atomic operation on shared flag variable
  net: sched: don't use GFP_KERNEL under spin lock
  vhost_net: correctly check tx avail during rx busy polling
  net: mdio-mux: add mdio_mux parameter to mdio_mux_init()
  rxrpc: Make service connection lookup always check for retry
  net: stmmac: Delete dead code for MDIO registration
  gianfar: Fix Tx flow control deactivation
  cxgb4: Ignore MPS_TX_INT_CAUSE[Bubble] for T6
  cxgb4: Fix pause frame count in t4_get_port_stats
  cxgb4: fix memory leak
  tun: rename generic_xdp to skb_xdp
  tun: reserve extra headroom only when XDP is set
  net: dsa: bcm_sf2: Configure IMP port TC2QOS mapping
  net: dsa: bcm_sf2: Advertise number of egress queues
  ...
2017-09-06 14:45:08 -07:00
Linus Torvalds
bafb0762cb Char/Misc drivers for 4.14-rc1
Here is the big char/misc driver update for 4.14-rc1.
 
 Lots of different stuff in here, it's been an active development cycle
 for some reason.  Highlights are:
   - updated binder driver, this brings binder up to date with what
     shipped in the Android O release, plus some more changes that
     happened since then that are in the Android development trees.
   - coresight updates and fixes
   - mux driver file renames to be a bit "nicer"
   - intel_th driver updates
   - normal set of hyper-v updates and changes
   - small fpga subsystem and driver updates
   - lots of const code changes all over the driver trees
   - extcon driver updates
   - fmc driver subsystem upadates
   - w1 subsystem minor reworks and new features and drivers added
   - spmi driver updates
 
 Plus a smattering of other minor driver updates and fixes.
 
 All of these have been in linux-next with no reported issues for a
 while.
 
 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc

Pull char/misc driver updates from Greg KH:
 "Here is the big char/misc driver update for 4.14-rc1.

  Lots of different stuff in here, it's been an active development cycle
  for some reason. Highlights are:

   - updated binder driver, this brings binder up to date with what
     shipped in the Android O release, plus some more changes that
     happened since then that are in the Android development trees.

   - coresight updates and fixes

   - mux driver file renames to be a bit "nicer"

   - intel_th driver updates

   - normal set of hyper-v updates and changes

   - small fpga subsystem and driver updates

   - lots of const code changes all over the driver trees

   - extcon driver updates

   - fmc driver subsystem upadates

   - w1 subsystem minor reworks and new features and drivers added

   - spmi driver updates

  Plus a smattering of other minor driver updates and fixes.

  All of these have been in linux-next with no reported issues for a
  while"

* tag 'char-misc-4.14-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (244 commits)
  ANDROID: binder: don't queue async transactions to thread.
  ANDROID: binder: don't enqueue death notifications to thread todo.
  ANDROID: binder: Don't BUG_ON(!spin_is_locked()).
  ANDROID: binder: Add BINDER_GET_NODE_DEBUG_INFO ioctl
  ANDROID: binder: push new transactions to waiting threads.
  ANDROID: binder: remove proc waitqueue
  android: binder: Add page usage in binder stats
  android: binder: fixup crash introduced by moving buffer hdr
  drivers: w1: add hwmon temp support for w1_therm
  drivers: w1: refactor w1_slave_show to make the temp reading functionality separate
  drivers: w1: add hwmon support structures
  eeprom: idt_89hpesx: Support both ACPI and OF probing
  mcb: Fix an error handling path in 'chameleon_parse_cells()'
  MCB: add support for SC31 to mcb-lpc
  mux: make device_type const
  char: virtio: constify attribute_group structures.
  Documentation/ABI: document the nvmem sysfs files
  lkdtm: fix spelling mistake: "incremeted" -> "incremented"
  perf: cs-etm: Fix ETMv4 CONFIGR entry in perf.data file
  nvmem: include linux/err.h from header
  ...
2017-09-05 11:08:17 -07:00
Hauke Mehrtens
dea54fbad3 phy: Add an USB PHY driver for the Lantiq SoCs using the RCU module
This driver starts the DWC2 core(s) built into the XWAY SoCs and provides
the PHY interfaces for each core. The phy instances can be passed to the
dwc2 driver, which already supports the generic phy interface.

Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: martin.blumenstingl@googlemail.com
Cc: john@phrozen.org
Cc: andy.shevchenko@gmail.com
Cc: p.zabel@pengutronix.de
Cc: mark.rutland@arm.com
Cc: linux-mips@linux-mips.org
Cc: linux-mtd@lists.infradead.org
Cc: linux-watchdog@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-spi@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/17127/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-09-04 21:19:02 +02:00
Wolfram Sang
a205425658 mfd: twl: Move header file out of I2C realm
include/linux/i2c is not for client devices. Move the header file to a
more appropriate location.

Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Acked-by: Jonathan Cameron <jic23@kernel.org>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: Thierry Reding <thierry.reding@gmail.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Acked-by: Daniel Thompson <daniel.thompson@linaro.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
2017-09-04 14:41:02 +01:00
Antoine Tenart
d0438bd6aa phy: add the mvebu cp110 comphy driver
On the CP110 unit, which can be found on various Marvell platforms such
as the 7k and 8k (currently), a comphy (common PHYs) hardware block can
be found. This block provides a number of PHYs which can be used in
various modes by other controllers (network, SATA ...). These common
PHYs must be configured for the controllers using them to work correctly
either at boot time, or when the system runs to switch the mode used.
This patch adds a driver for this comphy hardware block, providing
callbacks for the its PHYs so that consumers can configure the modes
used.

As of this commit, two modes are supported by the comphy driver: sgmii
and 10gkr.

Signed-off-by: Antoine Tenart <antoine.tenart@free-electrons.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-30 15:17:45 -07:00
Shawn Lin
90a7612d07 phy: rockchip-pcie: Reconstruct driver to support per-lane PHYs
Reconstruct the whole driver to support per-lane PHYs.  Note that we could
also support the legacy PHY if you don't provide argument to
rockchip_pcie_phy_of_xlate().

Tested-by: Jeffy Chen <jeffy.chen@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
[bhelgaas: use postincrement/decrement when order doesn't matter, uninline
to_pcie_phy() so decl fits on one line]
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Brian Norris <briannorris@chromium.org>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-28 13:34:37 -05:00
Greg Kroah-Hartman
9f57ed095f Update extcon for 4.14
Detailed description for this pull request:
 1. Add new 'extcon-usbc-cros-ec.c' driver
 - ChromeOS Embedded Controller extcon driver supports
   the detection of the Display Port (EXTCON_DISP_DP)
   through USB C-type and contol it.
 
 2. Update extcon core
 - Modify the description for both functions and structures
   in order to improve the readability and give the more correct
   guide about the role of functions because there are different
   explanation even if the same arguments.
 
 - Keep the indentation with tab instead of space
 
 - Remove the following deprecated extcon API. The deprecated API
   are exchanged on all of linux tree.
   : extcon_get_cable_state_() -> extcon_get_state()
   : extcon_set_cable_state_() -> extcon_set_state_sync()
 
 3. Include the two immutable branch as following:
 - ib-extcon-mfd-4.14 for the 'extcon-ubsc-cros-ec.c' driver
   because the patches of 'extcon-ubsc-cros-ec.c' touch the MFD directory.
 - ib-extcon-usb-phy-4.14 for removing the deprecated extcon API
   because the usb/phy driver usese the deprecated extcon API.
   So, this immutable branch alters the extcon API and then
   remove them from extcon.
 
 4. Fix minor issue of extcon driver
 - Fix the MHL detection on extcon-max77693.c
 - Convert to using %pOF instead of full_name on extcon.c
 - Add 'const' kerywod for acpi_device_id on extcon-intel-int3496.c
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Merge tag 'extcon-next-for-4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/chanwoo/extcon into char-misc-next

Chanwoo writes:

Update extcon for 4.14

Detailed description for this pull request:
1. Add new 'extcon-usbc-cros-ec.c' driver
- ChromeOS Embedded Controller extcon driver supports
  the detection of the Display Port (EXTCON_DISP_DP)
  through USB C-type and contol it.

2. Update extcon core
- Modify the description for both functions and structures
  in order to improve the readability and give the more correct
  guide about the role of functions because there are different
  explanation even if the same arguments.

- Keep the indentation with tab instead of space

- Remove the following deprecated extcon API. The deprecated API
  are exchanged on all of linux tree.
  : extcon_get_cable_state_() -> extcon_get_state()
  : extcon_set_cable_state_() -> extcon_set_state_sync()

3. Include the two immutable branch as following:
- ib-extcon-mfd-4.14 for the 'extcon-ubsc-cros-ec.c' driver
  because the patches of 'extcon-ubsc-cros-ec.c' touch the MFD directory.
- ib-extcon-usb-phy-4.14 for removing the deprecated extcon API
  because the usb/phy driver usese the deprecated extcon API.
  So, this immutable branch alters the extcon API and then
  remove them from extcon.

4. Fix minor issue of extcon driver
- Fix the MHL detection on extcon-max77693.c
- Convert to using %pOF instead of full_name on extcon.c
- Add 'const' kerywod for acpi_device_id on extcon-intel-int3496.c
2017-08-28 17:01:04 +02:00
Arnd Bergmann
e593beaf60 phy: ralink: fix 64-bit build warning
Casting between an 'int' and a pointer causes a warning on
64-bit architectures in compile-testing this driver:

drivers/phy/ralink/phy-ralink-usb.c: In function 'ralink_usb_phy_probe':
drivers/phy/ralink/phy-ralink-usb.c:195:13: error: cast from pointer to
integer of different size [-Werror=pointer-to-int-cast]

This changes the code to cast to uintptr_t instead. This is
guaranteed to do what we want on all architectures and avoids
the warning.

Fixes: 2411a736ff ("phy: ralink-usb: add driver for Mediatek/Ralink")
Acked-by: John Crispin <john@phrozen.org>
Tested-by Harvey Hunt <harvey.hunt@imgtec.com>
Reviewed-by Harvey Hunt <harvey.hunt@imgtec.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2017-08-24 17:26:50 -07:00
Greg Kroah-Hartman
cad2be2997 phy: for 4.14
*) Add USB PHY driver for Ralink SoC
  *) Make phy-mt65xx-usb3 driver support PCIe and SATA phy
  *) Add mediatek directory and rename phy-mt65xx-usb3 to phy-mtk-tphy.c
     since it now supports USB3.0, PCIe and SATA PHYs
  *) Make sun4i-usb-phy driver support USB PHYs for A83T SoC
  *) Make phy-qcom-qmp driver support USB PHYs for IPQ8074 SoC
  *) Make rockchip-inno-usb2 driver support usb2-phy for rv1108 SoC
  *) Minor fixes in phy drivers
 
 Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
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Merge tag 'phy-for-4.14_v2' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next

Kishon writes:

phy: for 4.14

 *) Add USB PHY driver for Ralink SoC
 *) Make phy-mt65xx-usb3 driver support PCIe and SATA phy
 *) Add mediatek directory and rename phy-mt65xx-usb3 to phy-mtk-tphy.c
    since it now supports USB3.0, PCIe and SATA PHYs
 *) Make sun4i-usb-phy driver support USB PHYs for A83T SoC
 *) Make phy-qcom-qmp driver support USB PHYs for IPQ8074 SoC
 *) Make rockchip-inno-usb2 driver support usb2-phy for rv1108 SoC
 *) Minor fixes in phy drivers

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 13:20:12 -07:00
Dan Carpenter
d9c51f4c53 phy: brcm-sata: fix a timeout test in init
We want to timeout with try set to zero so this should be a pre-op
instead of post-op.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:27 +05:30
Dan Carpenter
aea430ee0c phy: cpcap-usb: remove a stray tab
This line was indented further that it should have been.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:26 +05:30
Dan Carpenter
df674efa32 phy: phy-twl4030-usb: silence an uninitialized variable warning
The "check" variable isn't necessarily initialized when we print it out
in the debugging messages.  It's a pretty haphazard affair and it
doesn't matter very much what we initialize "check" to.

Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:25 +05:30
Shawn Lin
5e39c6cf57 phy: rockchip-typec: remove unused dfp variable
In order to silent the 'W=1' compile warning:

drivers/phy/rockchip/phy-rockchip-typec.c: In function 'tcphy_get_mode':
drivers/phy/rockchip/phy-rockchip-typec.c:625:7: warning: variable 'dfp'
set but not used [-Wunused-but-set-variable]

Cc: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:24 +05:30
Frank Wang
fc938810d9 phy: rockchip-inno-usb2: add support of usb2-phy for rv1108 SoCs
This adds support usb2-phy for rv1108 SoCs and amend phy Documentation.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:23 +05:30
Frank Wang
0983e2abc8 phy: rockchip-inno-usb2: add support for otg-mux interrupt
The otg-id/otg-bvalid/linestate interrupts are multiplexed together
in otg-port on some Rockchip SoC (e.g RV1108), this patch add support
for it.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:21 +05:30
Frank Wang
1543645c31 phy: rockchip-inno-usb2: add support for rockchip,usbgrf property
The registers of usb-phy are distributed in grf and usbgrf on some
Rockchip SoCs (e.g RV1108), this patch add a new rockchip,usbgrf
property to support this companion grf design.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:19 +05:30
Chen-Yu Tsai
4b63743cdb phy: sun4i-usb: Support A83T USB PHYs
The A83T has 3 USB PHYs, 1 for OTG, 1 for standard USB, 1 for USB HSIC.
The phy initialization procedure is very different from other SoCs, but
the PMU bits are the same, with additional bits for HSIC.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Tested-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:18 +05:30
Chen-Yu Tsai
f0152c58c6 phy: sun4i-usb: Support secondary clock for HSIC PHY
On the Allwinner A83T SoC, the last USB PHY is an HSIC PHY. It requires
two clocks instead of one.

On all Allwinner SoCs that share the common USB PHY design supported by
the phy-sun4i-usb driver, the first PHY is always tied to OTG, and there
is at most one HSIC PHY, typically the last.

In this patch we take advantage of these known constraints and store an
index in the compatible-string-related config structure describing which
PHY is HSIC, needing the extra hsic_12M clock.

Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-22 10:11:17 +05:30
John Crispin
2411a736ff phy: ralink-usb: add driver for Mediatek/Ralink
Add a driver to setup the USB phy on Mediatek/Ralink SoCs.
The driver sets up power and host mode, but also needs to
configure PHY registers for the MT7628 and MT7688.

Signed-off-by: John Crispin <john@phrozen.org>
Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 14:02:23 +05:30
Chunfeng Yun
e0ed408260 phy: samsung: use of_device_get_match_data()
reduce the boilerplate code to get the specific data

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:52 +05:30
Chunfeng Yun
cd4ec4b03d phy: phy-mt65xx-usb3: add mediatek directory and rename file
The driver is actually for T-PHY which supports USB3.0, PCIe and SATA,
and supports more SoCs now, but not just only for series of mt65xx SoCs,
so the name of file, data struct, functions etc with 'mt65xx' may cause
misunderstanding when new SoCs are supported. Here rename them to reflect
the real functions and also enhance readability.

And also update MAINTAINERS file to reflect the correct driver

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:51 +05:30
Ryder Lee
4ab26cb66a phy: phy-mt65xx-usb3: add SATA PHY support
This patch adds SATA setting part.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:49 +05:30
Ryder Lee
44a6d6ce64 phy: phy-mt65xx-usb3: add PCIe PHY support
This patch adds PCIe PHY setting part.

Signed-off-by: Ryder Lee <ryder.lee@mediatek.com>
Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:48 +05:30
Roger Quadros
325ce0fe58 phy: ti-pipe3: Use TRM recommended settings for SATA DPLL
The AM572x Technical Reference Manual, SPRUHZ6H,
Revised November 2016 [1], shows recommended settings for the
SATA DPLL in Table 26-8. DPLL CLKDCOLDO Recommended Settings.

Use those settings in the driver. The TRM does not show
a value for 20MHz SYS_CLK so we use something close to the
26MHz setting.

[1] - http://www.ti.com/lit/ug/spruhz6h/spruhz6h.pdf

Signed-off-by: Roger Quadros <rogerq@ti.com>
[nsekhar@ti.com: add exact TRM version to commit text]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:47 +05:30
Vivek Gautam
8387c576b7 phy: qcom-qmp: Fix failure path in phy_init functions
Fixing the clk enable failure path in qcom_qmp_phy_init()
and cleanup the reset control deassertion failure path in
qcom_qmp_phy_com_init().

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:46 +05:30
Varadarajan Narayanan
eef243d04b phy: qcom-qmp: Add support for IPQ8074
Add definitions required to enable QMP phy support for IPQ8074.

Signed-off-by: smuthayy <smuthayy@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:45 +05:30
Varadarajan Narayanan
2a9316b046 phy: qcom-qmp: Fix phy pipe clock name
Presently, the phy pipe clock's name is assumed to be either
usb3_phy_pipe_clk_src or pcie_XX_pipe_clk_src (where XX is the
phy lane's number). However, this will not work if an SoC has
more than one instance of the phy. Hence, instead of assuming
the name of the clock, fetch it from the DT.

Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-08-20 13:59:44 +05:30
Chanwoo Choi
02026de829 phy: phy-bcm-ns2-usbdrd: Replace the deprecated extcon API
This patch replaces the deprecated extcon API as following:
- extcon_set_cable_state_() -> extcon_get_state()

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-08-16 09:21:43 +09:00
Chanwoo Choi
86f44c8873 phy: rockchip-inno-usb2: Replace the extcon API
This patch uses the resource-managed extcon API for extcon_register_notifier()
and replaces the deprecated extcon API as following:
- extcon_get_cable_state_() -> extcon_get_state()
- extcon_set_cable_state_() -> extcon_set_state_sync()

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-08-03 17:12:16 +09:00
Arnd Bergmann
245db3c349 phy: bcm-ns-usb3: fix MDIO_BUS dependency
The driver attempts to 'select MDIO_DEVICE', but the code
is actually a loadable module when PHYLIB=m:

drivers/phy/broadcom/phy-bcm-ns-usb3.o: In function `bcm_ns_usb3_mdiodev_phy_write':
phy-bcm-ns-usb3.c:(.text.bcm_ns_usb3_mdiodev_phy_write+0x28): undefined reference to `mdiobus_write'
drivers/phy/broadcom/phy-bcm-ns-usb3.o: In function `bcm_ns_usb3_module_exit':
phy-bcm-ns-usb3.c:(.exit.text+0x18): undefined reference to `mdio_driver_unregister'
drivers/phy/broadcom/phy-bcm-ns-usb3.o: In function `bcm_ns_usb3_module_init':
phy-bcm-ns-usb3.c:(.init.text+0x18): undefined reference to `mdio_driver_register'
phy-bcm-ns-usb3.c:(.init.text+0x38): undefined reference to `mdio_driver_unregister'

Using 'depends on MDIO_BUS' instead will avoid the link error.

Fixes: af850e14a7 ("phy: bcm-ns-usb3: add MDIO driver using proper bus layer")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-07-27 17:20:19 -07:00
Quentin Schulz
e7cded2726 phy: allwinner: phy-sun4i-usb: Add log when probing
When phy-sun4i-usb's probing fails, it does not print the reason in
kernel log, forcing the developer to edit this driver to add info logs.
This commit makes the kernel print the reason of phy-sun4i-usb's probing
failure or a success message.

Signed-off-by: Quentin Schulz <quentin.schulz@free-electrons.com>
Tested-by: Mylène Josserand <mylene.josserand@free-electrons.com>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-07-21 13:06:30 +05:30
Chanwoo Choi
f0b5c2c963 phy: qcom-usb-hs: Replace the extcon API
This patch uses the resource-managed extcon API for extcon_register_notifier()
and replaces the deprecated extcon API as following:
- (deprecated) extcon_get_cable_state_() -> extcon_get_state()

Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
2017-07-16 15:10:56 +09:00
Rafał Miłecki
af850e14a7 phy: bcm-ns-usb3: add MDIO driver using proper bus layer
As USB 3.0 PHY is attached to the MDIO bus this module should provide a
MDIO driver and use a proper bus layer. This is a proper (cleaner)
solution which doesn't require code to know this specific MDIO bus
details. It also allows reusing the driver with other MDIO buses.

For now keep platform device support in place. We may consider dropping
it once MDIO bindings gets used "everywhere".

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-16 13:22:26 +05:30
Rafał Miłecki
4536adee0a phy: bcm-ns-usb3: enable MDIO in the platform specific code
When we finally start using MDIO layer then bus initialization will be
handled in a separated driver. It means our code handling this has to be
used for the platform driver only.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-16 13:22:26 +05:30
Rafał Miłecki
b20f506f6c phy: bcm-ns-usb3: use pointer for PHY writing function
Our current writing function accesses PHY directly bypassing MDIO layer.

The aim is to extend this module to also behave as MDIO driver. This
will require using different writing function which can be handled
cleanly by having an extra pointer like this.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-16 13:22:25 +05:30
Rafał Miłecki
412512c4f9 phy: bcm-ns-usb3: always wait for idle after writing to the PHY reg
Move MDIO specific code to the writing helper function. This makes init
code a bit more generic and doesn't require it to track what happens
after every write.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-16 13:22:25 +05:30
Srinath Mannam
80886f7c69 phy: Add stingray SATA phy support
This patch adds support for stingray SATA phy in the
SATA BRCM phy driver.

Signed-off-by: Srinath Mannam <srinath.mannam@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-16 11:40:22 +05:30
Tony Lindgren
259a24001a phy: cpcap-usb: Fix missing return statement
Commit 8ae904e3c236 ("phy: cpcap-usb: Add CPCAP PMIC USB support")
is missing return statement as noted by Colin Ian King
<colin.king@canonical.com>. If the optional pins are not configured,
we just want to return early and not attempt to configure the pins.

Fixes: 8ae904e3c236 ("phy: cpcap-usb: Add CPCAP PMIC USB support")
Reported-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-16 11:40:21 +05:30
Raviteja Garimella
787f24543c phy: phy-bcm-ns2-usbdrd: Broadcom USB DRD PHY driver for Northstar2
This is driver for USB DRD PHY used in Broadcom's Northstar2
SoC. The phy can be configured to be in Device mode or Host
mode based on the type of cable connected to the port. The
driver registers to  extcon framework to get appropriate
connect events for Host/Device cables connect/disconnect
states based on VBUS and ID interrupts.

Signed-off-by: Raviteja Garimella <raviteja.garimella@broadcom.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-09 17:39:39 +05:30
Arnd Bergmann
d05c07c6fa phy: cpcap-usb: add MUSB dependency
When MUSB is a loadable module, we get a link error for a built-in
CPCAP driver:

drivers/phy/built-in.o: In function `cpcap_usb_phy_remove':
phy-cpcap-usb.c:(.text+0xed9): undefined reference to `musb_mailbox'

This adds a Kconfig dependency to prevent this broken configuration,
enforcing that CPCAP can only be a module when MUSB is also a module.

Fixes: 68a1f7c9d470 ("phy: cpcap-usb: Add CPCAP PMIC USB support")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.co.uk>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-09 17:39:39 +05:30
Felipe Balbi
54fe308889 phy: tusb1210: implement ->set_mode()
->set_mode() can be used to tell PHY to prepare itself to enter USB
Host/Peripheral mode and that's very important for DRD
configurations.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-09 17:39:39 +05:30
Felipe Balbi
82d9d5e0c0 phy: tusb1210: add support for TUSB1211
TUSB1211 is software compatible with TUSB1210 and as such we don't
need an entire new driver to control it. Let's add its product ID to
the existing TUSB1210 driver instead.

Signed-off-by: Felipe Balbi <felipe.balbi@linux.intel.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-09 17:39:39 +05:30
Yoshihiro Shimoda
7c7356bab8 phy: rcar-gen3-usb3: add support for R-Car Gen3 USB 3.0 PHY
The USB 3.0 PHY modules of R-Car Gen3 SoCs have:
 - Spread spectrum clock (ssc).
 - Using USB 2.0 EXTAL clock instead of USB 3.0 clock.
 - Enabling VBUS detection for usb3.0 peripheral.

So, this driver supports these features.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-07 17:55:13 +05:30
Frank Wang
b59b1d3904 phy: rockchip-inno-usb2: add support of usb2-phy for rk3228 SoCs
This adds support usb2-phy for rk3228 SoCs and amend phy Documentation.

Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:50:25 +05:30
William Wu
9632781122 phy: rockchip-inno-usb2: add one phy comprises with two host-ports support
At the current rockchip-inno-usb2 phy driver framework, it can
only support usb2-phy which comprises with one otg-port and one
host-port.

However, some Rockchip SoCs' (e.g RK3228, RK3229) usb2-phy comprises
with two host-ports, so we use index of otg id for one host-port
configuration, and make it work the same as otg-port host mode.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:50:24 +05:30
William Wu
5a74a8b742 phy: rockchip-inno-usb2: increase otg sm work first schedule time
In rockchip-inno-usb2 phy driver, we use otg_sm_work to
dynamically manage power consumption for phy otg-port.
If the otg-port works as peripheral mode and does not
communicate with usb host, we will suspend phy.

But once suspend phy, the phy no longer has any internal
clock running, include the utmi_clk which supplied for
usb controller. So if we suspend phy before usb controller
init, it will cause usb controller fail to initialize.

Specifically, without this patch, the observed order is:
 1. unplug usb cable
 2. start system, do dwc2 controller probe
 3. dwc2_lowlevel_hw_enable()
    - phy_init()
     - rockchip_usb2phy_init()
      - schedule otg_sm_work after 2s
        put phy in suspend, and close utmi_clk
 4. dwc2_hsotg_udc_start() - fail to initialize the usb core

Generally, dwc2_hsotg_udc_start() can be called within 5s
after start system on Rockchip platform, so we increase the
the first schedule delay time to 6s for otg_sm_work afer usb
controller calls phy_init(), this can make sure that the usb
controller completes initialization before phy enter suspend.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:50:23 +05:30
William Wu
fbbe98cd44 phy: rockchip-inno-usb2: add a delay after phy resume
When resume phy, it need about 1.5 ~ 2ms to wait for
utmi_clk which used for USB controller to become stable.

Signed-off-by: William Wu <william.wu@rock-chips.com>
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:50:22 +05:30
Tony Lindgren
6d6ce40f63 phy: cpcap-usb: Add CPCAP PMIC USB support
Some Motorola phones like droid 4 use a custom CPCAP PMIC that has a
multiplexing USB PHY.

This USB PHY can operate at least in four modes using pin multiplexing
and two control GPIOS:

- Pass through companion PHY for the SoC USB PHY
- ULPI PHY for the SoC
- Pass through USB for the modem
- UART debug console for the SoC

This patch adds support for droid 4 USB PHY and debug UART modes,
support for other modes can be added later on as needed.

Both peripheral and host mode are working for the USB. The
host mode depends on the cpcap-charger driver for VBUS.

VBUS and ID pin detection are done using cpcap-adc IIO ADC
driver.

Cc: devicetree@vger.kernel.org
Cc: Marcel Partap <mpartap@gmx.net>
Cc: Michael Scott <michael.scott@linaro.org>
Acked-by: Rob Herring <robh@kernel.org>
Tested-by: Sebastian Reichel <sre@kernel.org>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:50:21 +05:30
Martin Blumenstingl
4a3449d1a0 phy: meson8b-usb2: add support for the USB PHY on Meson8 SoCs
Meson8 uses the same USB PHY as found on the Meson8b and GXBB SoCs. Add
a new of_device_id to indicate this. Also update the Kconfig option and
MODULE_DESCRIPTION accordingly.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:50:14 +05:30
Martin Blumenstingl
697b373c6d phy: meson: add USB2 PHY support for Meson GXL and GXM
This adds a new driver for the USB2 PHYs found on Meson GXL and GXM SoCs
(both SoCs are using the same USB PHY register layout).

The USB2 PHY is a simple PHY which only has a few registers to configure
the mode (host/device) and a reset register (to enable/disable the PHY).

Unfortunately there are no datasheets available for this PHY. The driver
was written by reading the code from Amlogic's GPL kernel sources and
by analyzing the registers on an actual GXL and GXM device running the
kernel that was shipped on the boards I have.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-06 14:49:47 +05:30
Vivek Gautam
0b56e9a7e8 phy: Group vendor specific phy drivers
Adding vendor specific directories in phy to group
phy drivers under their respective vendor umbrella.

Also updated the MAINTAINERS file to reflect the correct
directory structure for phy drivers.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: David S. Miller <davem@davemloft.net>
Cc: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Heiko Stuebner <heiko@sntech.de>
Cc: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Cc: Sylwester Nawrocki <s.nawrocki@samsung.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-rockchip@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-01 15:28:33 +05:30
Vivek Gautam
858edde001 phy: Move ULPI phy header out of drivers to include path
Although ULPI phy is currently being used by tusb1210,
there can be other consumers too in future. So move this
to the includes path for phy.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Cc: Stephen Boyd <stephen.boyd@linaro.org>
Cc: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-omap@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Acked-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-01 15:28:27 +05:30
Vivek Gautam
706a3b6995 phy: qcom-usb: Remove unused ulpi phy header
Ulpi phy header is not used for anything. Remove the same
from qcom-hs and qcom-hsic phy drivers.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Suggested-by: Stephen Boyd <stephen.boyd@linaro.org>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Cc: linux-usb@vger.kernel.org
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-01 15:28:24 +05:30
Fengguang Wu
9605bc4643 phy: qualcomm: phy-qcom-qmp: fix application of sizeof to pointer
drivers/phy/qualcomm/phy-qcom-qmp.c:847:37-43: ERROR: application of sizeof to pointer

 sizeof when applied to a pointer typed expression gives the size of
 the pointer

Generated by: scripts/coccinelle/misc/noderef.cocci

CC: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-06-01 15:03:41 +05:30
Wei Yongjun
53bf959015 phy: qcom-qmp: fix return value check in qcom_qmp_phy_create()
In case of error, the function of_iomap() returns NULL pointer
not ERR_PTR(). The IS_ERR() test in the return value check should
be replaced with NULL test.

Fixes: e78f3d15e1 ("phy: qcom-qmp: new qmp phy driver for qcom-chipsets")
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-05-19 14:13:39 +05:30
Tobias Regnery
6239879b41 phy: qcom-qusb2: add NVMEM dependency
With CONFIG_NVMEM=m and CONFIG_PHY_QCOM_QUSB2=y we get a link error from
calls to devm_nvmem_cell_get and nvmem_cell_read:

drivers/built-in.o: In function `qusb2_phy_probe':
binder.c:(.text+0x4750): undefined reference to `devm_nvmem_cell_get'
drivers/built-in.o: In function `qusb2_phy_init':
binder.c:(.text+0x489c): undefined reference to `nvmem_cell_read'

Fix this by adding a Kconfig dependency to ensure we can only have this
driver built in when the nvmem functions are also built in or we see the
empty stub functions. We can still build this driver as a module when the
nvmem core is build as module, too.

Fixes: deffad633413 ("phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips")
Signed-off-by: Tobias Regnery <tobias.regnery@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:41 +05:30
Sjoerd Simons
9d685ed77b phy: rockchip-usb: Add vbus regulator support.
On rockchip devices vbus is supplied by a separate power supply, often
through a regulator. Add support for describing the the regulator in
device-tree following the same convention as several other usb phy's.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:41 +05:30
Rafał Miłecki
fff3364a63 phy: bcm-ns-usb3: split all writes into reg & val pairs
So far all the PHY initialization was implemented using some totally
magic values. There was some pattern there but it wasn't clear what is
it about.

Thanks to the patch submitted by Broadcom:
[PATCH 5/6] phy: Add USB3 PHY support for Broadcom NSP SoC
and the upstream "iproc-mdio" driver we now know there is a MDIO bus
underneath with PHY(s) and their registers.

It allows us to clean the driver a bit by making all these values less
magical. The next step is switching to using a proper MDIO layer.

Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:41 +05:30
Vivek Gautam
e78f3d15e1 phy: qcom-qmp: new qmp phy driver for qcom-chipsets
Qualcomm SOCs have QMP phy controller that provides support
to a number of controller, viz. PCIe, UFS, and USB.
Add a new driver, based on generic phy framework, for this
phy controller.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Tested-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:41 +05:30
Vivek Gautam
ca04d9d3e1 phy: qcom-qusb2: New driver for QUSB2 PHY on Qcom chips
PHY transceiver driver for QUSB2 phy controller that provides
HighSpeed functionality for DWC3 controller present on
Qualcomm chipsets.

Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:41 +05:30
Meng Dongyang
d99b1ab323 phy: rockchip-inno-usb2: add support of usb2-phy for rk3328
Add usb2-phy config information in the data of match table for
rk3328.

Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:41 +05:30
Chunfeng Yun
c0250fe50e phy: phy-mt65xx-usb3: disable 100uA extraction from SS port to HS port
There will be a problem if SS port is diasbled and HS port extracts
100uA from SS port, so disable extract 100uA from SS port in the case,
when disable it, PA0_RG_USB20_INTR_EN should be set, otherwise HS port
only works on LS.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Chunfeng Yun
8d6e1957f1 phy: phy-mt65xx-usb3: add support for new version phy
There are some variations from mt2701 to mt2712:
1. banks shared by multiple ports are put back into each port,
    such as SPLLC and U2FREQ;
2. add a new bank MISC for u2port, and CHIP for u3port;
3. bank's offset in each port are also rearranged;

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Chunfeng Yun
15de15c6b4 phy: phy-mt65xx-usb3: move clock from phy node into port nodes
each port has its own reference clock, the HighSpeed port is 48M,
and the SuperSpeed port is usually 26M, put them into port node for
flexibility, this can close clock if the port is not used.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Chunfeng Yun
04466efca5 phy: phy-mt65xx-usb3: split SuperSpeed port into two ones
Currently usb3 port in fact includes two sub-ports, but it is not
flexible for some cases, such as following one:
    usb3 port0 includes u2port0 and u3port0;
    usb2 port0 includes u2port1;
If wants to support only HS, we can use u2port0 or u2port1, when
select u2port0, u3port0 is not needed;
If wants to support SS, we can compound u2port0 and u3port0,
or u2port1 and u3port0, if select latter one, u2port0 is not needed.

So it's more flexible to split usb3 port into two ones and also try
best to save power by disabling unnecessary ports.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Chunfeng Yun
98cd83a056 phy: phy-mt65xx-usb3: increase LFPS filter threshold
Increase LFPS filter threshold to avoid some fake remote wakeup
signal which cause U3 link fail and link to U2 only at about
0.01% probability.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Chunfeng Yun
1969f6952b phy: phy-mt65xx-usb3: improve RX detection stable time
The default value of RX detection stable time is 10us, and this
margin is too big for some critical cases which cause U3 link fail
and link to U2(probability is about 1%). So change it to 5us.

Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Icenowy Zheng
c957b7d236 phy: sun4i-usb: enable PHY0 dual route switching for A64 USB PHY
Allwinner A64 SoC features a switchable PHY0 like the one in H3, which
can switch between a MUSB controller and a pair of OHCI/EHCI controller.

Enable PHY0 route auto switching for A64.

Signed-off-by: Icenowy Zheng <icenowy@aosc.io>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Yoshihiro Shimoda
441a681b88 phy: rcar-gen3-usb2: fix implementation for runtime PM
This patch fixes an issue that this driver doesn't take care of the runtime
PM. This code assumed that devm_phy_create() called pm_runtime_enable(dev),
but it misunderstood the dev_phy_create()'s specification.
This driver should call its own pm_runtime_enable() before
dev_phy_create().

Fixes: f3b5a8d9b5 ("phy: rcar-gen3-usb2: Add R-Car Gen3 USB2 PHY driver")
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Colin Ian King
7dfa3026db phy: rockchip-inno-usb2: fix spelling mistake: "connecetd" -> "connected"
trivial fix to spelling mistake in dev_dbg message, also rejoin
lines to clean up checkpatch warning

Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:40 +05:30
Krzysztof Kozlowski
7a66647b25 phy: exynos: Use one define for enable bit
There is no need for separate defines for Exynos4 and Exynos5 phy enable
bit and MIPI phy reset bits.  In both cases there are the same so
simplify it.

This reduces number of defines and allows removal of one header file.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:18 +05:30
Krzysztof Kozlowski
cf09ee5997 phy: exynos-mipi-video: Use consistent method to address phy registers
Exynos4 MIPI phy registers are defined with macro calculating the offset
for given phyN.  Use the same method for Exynos5420 to be consistent.

Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:43:05 +05:30
Krzysztof Kozlowski
424c984148 phy: exynos5: Remove duplicated defines of PHY register defines
Phy drivers access PMU region through regmap provided by exynos-pmu
driver.   However there is no need to duplicate defines for PMU
registers.  Instead just use whatever is defined in exynos-regs-pmu.h.

This reduces number of defines.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:58 +05:30
Krzysztof Kozlowski
5812f0106c phy: exynos4: Remove duplicated defines of PHY register defines
Phy drivers access PMU region through regmap provided by exynos-pmu
driver.   However there is no need to duplicate defines for PMU
registers.  Instead just use whatever is defined in exynos-regs-pmu.h.

Additionally MIPI PHY registers for Exynos5433 start from the same
address as Exynos4 and Exynos5250 so re-use existing defines.

This reduces number of defines and allows removal of one header file.

Suggested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Lee Jones <lee.jones@linaro.org>
Reviewed-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:58 +05:30
Martin Blumenstingl
5b85927e5c phy: meson8b-usb2: fix offsets for some of the registers
The register offsets for REG_DBG_UART (and all following) were off by
0x4. This was not a problem yet because these registers are currently
not used by the driver.

Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Reviewed-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:58 +05:30
Icenowy Zheng
3ecc25e12f phy: sun4i-usb: support automatically switch PHY0 route to MUSB/HCI
On newer Allwinner SoCs (H3 and after), the PHY0 node is routed to both
MUSB controller for peripheral and host support (the host support is
slightly broken), and a pair of EHCI/OHCI controllers, which provide a
better support for host mode.

Add support for automatically switch the route of PHY0 according to the
status of dr_mode and id det pin.

Only H3 have this function enabled in this patch, as further SoCs will
be tested later and then have it enabled.

As H5 is reusing the PHY driver of H3, this function is also enabled.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:58 +05:30
Icenowy Zheng
864ebdf0bd phy: sun4i-usb: add PHYCTL offset for H3 SoC
The config structure of H3 in phy-sun4i-usb driver have the PHYCTL
register offset missing.

Add it. From the BSP source code, we know that the offset should be
0x10.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:57 +05:30
Icenowy Zheng
d699c1d086 phy: sun4i-usb: change PHYCTL register clearing code
It seems that all SoCs with the PHYCTL register offset as 0x10 need the
PHYCTL register to be cleared before it's written.

Change PHYCTL register clearing code to judge whether clearing is needed
based on the PHYCTL offset.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:57 +05:30
Paul Gortmaker
4574a92c59 phy: phy-exynos-pcie: make it explicitly non-modular
The Kconfig currently controlling compilation of this code is:

drivers/phy/Kconfig:config PHY_EXYNOS_PCIE
drivers/phy/Kconfig:    bool "Exynos PCIe PHY driver"

...meaning that it currently is not being built as a module by anyone.

Lets remove the couple traces of modular infrastructure use, so that
when reading the driver there is no doubt it is builtin-only.

Since module_platform_driver() uses the same init level priority as
builtin_platform_driver() the init ordering remains unchanged with
this commit.

Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

We also delete the MODULE_LICENSE tag etc. since all that information
is already contained at the top of the file in the comments.

Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jingoo Han <jingoohan1@gmail.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Pankaj Dubey <pankaj.dubey@samsung.com>
Cc: Vivek Gautam <vivek.gautam@codeaurora.org>
Cc: Javier Martinez Canillas <javier@osg.samsung.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-samsung-soc@vger.kernel.org
Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-04-10 16:42:57 +05:30
Stephen Boyd
1a09b6a7c1 phy: qcom-usb-hs: Add depends on EXTCON
We get the following compile errors if EXTCON is enabled as a
module but this driver is builtin:

drivers/built-in.o: In function `qcom_usb_hs_phy_power_off':
phy-qcom-usb-hs.c:(.text+0x1089): undefined reference to `extcon_unregister_notifier'
drivers/built-in.o: In function `qcom_usb_hs_phy_probe':
phy-qcom-usb-hs.c:(.text+0x11b5): undefined reference to `extcon_get_edev_by_phandle'
drivers/built-in.o: In function `qcom_usb_hs_phy_power_on':
phy-qcom-usb-hs.c:(.text+0x128e): undefined reference to `extcon_get_state'
phy-qcom-usb-hs.c:(.text+0x12a9): undefined reference to `extcon_register_notifier'

so let's mark this as needing to follow the modular status of
the extcon framework.

Fixes: 9994a33865 e2427b09ba (phy: Add support for Qualcomm's USB HS phy")
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-03-09 15:29:57 +05:30
Jaehoon Chung
11d94e026b phy: phy-exynos-pcie: fix the wrong error return
When it doesn't get the blk_base's resource, it was returned
the error about phy_base, not blk_base.
This patch is for fixing the wrong error return about blk_base.

Fixes: cf0adb8e28 ("phy: phy-exynos-pcie: Add support for Exynos PCIe PHY")

Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-03-09 15:29:57 +05:30
Rafał Miłecki
9200c6f177 Revert "phy: Add USB3 PHY support for Broadcom NSP SoC"
This reverts commit d7bc1a7d41 ("phy: Add USB3 PHY support for
Broadcom NSP SoC") as we already have driver for this PHY (shared by NS
and NSP). It was added in commit e5666281d9 ("phy: bcm-ns-usb3: new
driver for USB 3.0 PHY on Northstar").

Instead of adding separated driver & duplicating code we should work on
improving existing (old) one. Thanks to work done by Broadcom we know
there is MDIO bus we weren't aware of & we know register names which
makes initialization more clear. This is very valuable info and we
should work on using it in existing driver afterwards.

Acked-by: Jon Mason <jon.mason@broadcom.com>
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
2017-03-09 15:29:44 +05:30
Linus Torvalds
60e8d3e116 pci-v4.11-changes
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Merge tag 'pci-v4.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci

Pull PCI updates from Bjorn Helgaas:

 - add ASPM L1 substate support

 - enable PCIe Extended Tags when supported

 - configure PCIe MPS settings on iProc, Versatile, X-Gene, and Xilinx

 - increase VPD access timeout

 - add ACS quirks for Intel Union Point, Qualcomm QDF2400 and QDF2432

 - use new pci_irq_alloc_vectors() in more drivers

 - fix MSI affinity memory leak

 - remove unused MSI interfaces and update documentation

 - remove unused AER .link_reset() callback

 - avoid pci_lock / p->pi_lock deadlock seen with perf

 - serialize sysfs enable/disable num_vfs operations

 - move DesignWare IP from drivers/pci/host/ to drivers/pci/dwc/ and
   refactor so we can support both hosts and endpoints

 - add DT ECAM-like support for HiSilicon Hip06/Hip07 controllers

 - add Rockchip system power management support

 - add Thunder-X cn81xx and cn83xx support

 - add Exynos 5440 PCIe PHY support

* tag 'pci-v4.11-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (93 commits)
  PCI: dwc: Remove dependency of designware on CONFIG_PCI
  PCI: dwc: Add CONFIG_PCIE_DW_HOST to enable PCI dwc host
  PCI: dwc: Split pcie-designware.c into host and core files
  PCI: dwc: designware: Fix style errors in pcie-designware.c
  PCI: dwc: designware: Parse "num-lanes" property in dw_pcie_setup_rc()
  PCI: dwc: all: Split struct pcie_port into host-only and core structures
  PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init()
  PCI: dwc: all: Rename cfg_read/cfg_write to read/write
  PCI: dwc: all: Use platform_set_drvdata() to save private data
  PCI: dwc: designware: Move register defines to designware header file
  PCI: dwc: Use PTR_ERR_OR_ZERO to simplify code
  PCI: dra7xx: Group PHY API invocations
  PCI: dra7xx: Enable MSI and legacy interrupts simultaneously
  PCI: dra7xx: Add support to force RC to work in GEN1 mode
  PCI: dra7xx: Simplify probe code with devm_gpiod_get_optional()
  PCI: Move DesignWare IP support to new drivers/pci/dwc/ directory
  PCI: exynos: Support the PHY generic framework
  Documentation: binding: Modify the exynos5440 PCIe binding
  phy: phy-exynos-pcie: Add support for Exynos PCIe PHY
  Documentation: samsung-phy: Add exynos-pcie-phy binding
  ...
2017-02-23 11:53:22 -08:00
Jaehoon Chung
cf0adb8e28 phy: phy-exynos-pcie: Add support for Exynos PCIe PHY
Add support for Generic PHY framework about Exynos SoCs.  Current Exynos
PCIe driver doesn't use the PHY framework, which makes it difficult to
upstream the other Exynos variants because of different PHY registers.

Move the codes relevant to PHY from Exnyos PCIe driver to PHY Exynos PCIe
driver.

[bhelgaas: depend on "OF && (ARCH_EXYNOS || COMPILE_TEST)", update
copyright year, both per Vivek]
Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com>
Acked-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Jingoo Han <jingoohan1@gmail.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2017-02-21 07:48:42 -06:00
Vivek Gautam
0b10f64dbe phy: qcom-ufs: Fix misplaced jump label
We want to skip only tx/rx_iface clocks and not ref_clk_src
as well. Fix the jump label accordingly.

Fixes: 300f96771d ("phy: qcom-ufs: Skip obtaining rx/tx_iface_clk for msm8996 based phy")

Cc: Subhash Jadavani <subhashj@codeaurora.org>
Cc: Martin K. Petersen <martin.petersen@oracle.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: stable@vger.kernel.org
Signed-off-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:59:13 +05:30
Randy Dunlap
fb43e86f42 phy: fix rockchip-inno-usb2 build errors
Fix build errors in phy-rockchip-inno-usb2.c. The driver uses
extcon interfaces so it should depend on EXTCON.

Fixes these build errors:

drivers/built-in.o: In function `rockchip_usb2phy_otg_sm_work':
phy-rockchip-inno-usb2.c:(.text+0x2bcb): undefined reference to `extcon_get_state'
phy-rockchip-inno-usb2.c:(.text+0x2cd4): undefined reference to `extcon_set_state_sync'
phy-rockchip-inno-usb2.c:(.text+0x2cec): undefined reference to `extcon_set_state_sync'
phy-rockchip-inno-usb2.c:(.text+0x2d2d): undefined reference to `extcon_get_state'
drivers/built-in.o: In function `rockchip_usb2phy_probe':
phy-rockchip-inno-usb2.c:(.text+0x31d7): undefined reference to `extcon_get_edev_by_phandle'
phy-rockchip-inno-usb2.c:(.text+0x321a): undefined reference to `devm_extcon_dev_allocate'
phy-rockchip-inno-usb2.c:(.text+0x3230): undefined reference to `devm_extcon_dev_register'
phy-rockchip-inno-usb2.c:(.text+0x375a): undefined reference to `extcon_register_notifier'

Found in linux-next but is also needed in mainline.

Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: MyungJoo Ham <myungjoo.ham@samsung.com>
Cc: Chanwoo Choi <cw00.choi@samsung.com>
Cc: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:53 +05:30
Yendapally Reddy Dhananjaya Reddy
d7bc1a7d41 phy: Add USB3 PHY support for Broadcom NSP SoC
This patch adds support for Broadcom NSP USB3 PHY

Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com>
Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:53 +05:30
Bjorn Andersson
42020c7065 phy: qcom-ufs: Suppress extraneous logging
The error paths of the common qcom-ufs functions for registering the
phy, acquiring clocks and acquiring regulators all print specific error
messages before returning an error, so there is no value in printing yet
another - more generic - message when this occur.

Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:53 +05:30
Bjorn Andersson
96c163f108 phy: qcom-ufs: Remove -always-on property
The fact that a regulator is always-on is a property of the regulator,
not a specific consumer. Implementing this in the driver leads to a
system behaviour that is dependent on if the Qualcomm UFS PHY was ever
(partially) probed.

If the specific regulator should be always on in a particular device,
mark it so by specifying "regulator-always-on" in the regulator node.

Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:52 +05:30
Bjorn Andersson
3471426f6d phy: qcom-ufs: Correct usage of regulator_get()
When regulator_get() tries to resolve a regulator supply but fail to
find a matching property in DeviceTree it returns a dummy regulator, if
a matching supply is specified but unavailable the regulator core will
return an error.

Based on this we should not ignore errors upon failing to acquire the
optional "vddp-ref-clk" supply.

Reviewed-by: Vivek Gautam <vivek.gautam@codeaurora.org>
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:52 +05:30
Bjorn Andersson
e7d5e41216 phy: qcom-ufs: Don't kfree devres resource
Upon failing to acquire regulator supplies the qcom-ufs driver calls
kfree() on the devm allocated memory used to store the name of the
regulator, leading to devres corruption.

Rather than switching to using the appropriate free function the patch
acknowledge the fact that "name" is always a constant string and we
don't actually need to create a local copy of it, but rather just
reference the constant string.

Fixes: add78fc057 ("phy: qcom-ufs: Use devm sibling of kstrdup for regulator names")
Cc: stable@vger.kernel.org
Reviewed-by: Subhash Jadavani <subhashj@codeaurora.org>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:52 +05:30
Stephen Boyd
e2427b09ba phy: Add support for Qualcomm's USB HS phy
The high-speed phy on qcom SoCs is controlled via the ULPI
viewport.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: <devicetree@vger.kernel.org>
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:52 +05:30
Stephen Boyd
605b8652f7 phy: Add support for Qualcomm's USB HSIC phy
The HSIC USB controller on qcom SoCs has an integrated all
digital phy controlled via the ULPI viewport.

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Acked-by: Rob Herring <robh@kernel.org>
Cc: <devicetree@vger.kernel.org>
Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-27 13:06:52 +05:30
Bhumika Goyal
a8df2768c2 drivers: phy: constify phy_ops structures
Declare phy_ops structures as const as they are only passed as an
argument to the function devm_phy_create. This argument is of type const
struct phy_ops *, so phy_ops structures having this property can be
declared as const.
Done using Coccinelle:

Signed-off-by: Bhumika Goyal <bhumirks@gmail.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-16 16:41:51 +05:30
Chanwoo Choi
66adb88955 phy: sun4i-usb: Replace the deprecated extcon API
This patch replaces the deprecated extcon API as following:
- extcon_set_cable_state_() -> extcon_set_state_sync()

Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-16 16:41:51 +05:30
Chanwoo Choi
c6f30a5b8e phy: rcar-gen3-usb2: Replace the deprecated extcon API
This patch replaces the deprecated extcon API as following:
- extcon_set_cable_state_() -> extcon_set_state_sync()

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-16 16:41:51 +05:30
Icenowy Zheng
16c403614b phy: sun4i-usb: add support for V3s USB PHY
Allwinner V3s come with a USB PHY controller slightly different to other
SoCs, with only one PHY.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-16 16:41:51 +05:30
Baolin Wang
3445be595b phy: rockchip-inno-usb2: Set EXTCON_USB when EXTCON_CHG_USB_SDP was set
According to the documentation, we should set the EXTCON_USB when
one SDP charger connector was reported.

Signed-off-by: Baolin Wang <baolin.wang@linaro.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2017-01-16 16:41:50 +05:30
Linus Torvalds
a829a8445f SCSI misc on 20161213
This update includes the usual round of major driver updates (ncr5380,
 lpfc, hisi_sas, megaraid_sas, ufs, ibmvscsis, mpt3sas).  There's also
 an assortment of minor fixes, mostly in error legs or other not very
 user visible stuff.  The major change is the pci_alloc_irq_vectors
 replacement for the old pci_msix_.. calls; this effectively makes IRQ
 mapping generic for the drivers and allows blk_mq to use the
 information.
 
 Signed-off-by: James E.J. Bottomley <jejb@linux.vnet.ibm.com>
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Merge tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi

Pull SCSI updates from James Bottomley:
 "This update includes the usual round of major driver updates (ncr5380,
  lpfc, hisi_sas, megaraid_sas, ufs, ibmvscsis, mpt3sas).

  There's also an assortment of minor fixes, mostly in error legs or
  other not very user visible stuff. The major change is the
  pci_alloc_irq_vectors replacement for the old pci_msix_.. calls; this
  effectively makes IRQ mapping generic for the drivers and allows
  blk_mq to use the information"

* tag 'scsi-misc' of git://git.kernel.org/pub/scm/linux/kernel/git/jejb/scsi: (256 commits)
  scsi: qla4xxx: switch to pci_alloc_irq_vectors
  scsi: hisi_sas: support deferred probe for v2 hw
  scsi: megaraid_sas: switch to pci_alloc_irq_vectors
  scsi: scsi_devinfo: remove synchronous ALUA for NETAPP devices
  scsi: be2iscsi: set errno on error path
  scsi: be2iscsi: set errno on error path
  scsi: hpsa: fallback to use legacy REPORT PHYS command
  scsi: scsi_dh_alua: Fix RCU annotations
  scsi: hpsa: use %phN for short hex dumps
  scsi: hisi_sas: fix free'ing in probe and remove
  scsi: isci: switch to pci_alloc_irq_vectors
  scsi: ipr: Fix runaway IRQs when falling back from MSI to LSI
  scsi: dpt_i2o: double free on error path
  scsi: cxlflash: Migrate scsi command pointer to AFU command
  scsi: cxlflash: Migrate IOARRIN specific routines to function pointers
  scsi: cxlflash: Cleanup queuecommand()
  scsi: cxlflash: Cleanup send_tmf()
  scsi: cxlflash: Remove AFU command lock
  scsi: cxlflash: Wait for active AFU commands to timeout upon tear down
  scsi: cxlflash: Remove private command pool
  ...
2016-12-14 10:49:33 -08:00