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269 Commits
| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Linus Torvalds
|
ac7473a179 |
Updates for the interrupt subsystem:
- Core:
- Provide a new mechanism to create interrupt domains. The existing
interfaces have already too many parameters and it's a pain to expand
any of this for new required functionality.
The new function takes a pointer to a data structure as argument. The
data structure combines all existing parameters and allows for easy
extension.
The first extension for this is to handle the instantiation of
generic interrupt chips at the core level and to allow drivers to
provide extra init/exit callbacks.
This is necessary to do the full interrupt chip initialization before
the new domain is published, so that concurrent usage sites won't see
a half initialized interrupt domain. Similar problems exist on
teardown.
This has turned out to be a real problem due to the deferred and
parallel probing which was added in recent years.
Handling this at the core level allows to remove quite some accrued
boilerplate code in existing drivers and avoids horrible workarounds
at the driver level.
- The usual small improvements all over the place
- Drivers
- Add support for LAN966x OIC and RZ/Five SoC
- Split the STM ExtI driver into a microcontroller and a SMP version to
allow building the latter as a module for multi-platform kernels.
- Enable MSI support for Armada 370XP on platforms which do not support
IPIs.
- The usual small fixes and enhancements all over the place.
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Merge tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt subsystem updates from Thomas Gleixner:
"Core:
- Provide a new mechanism to create interrupt domains. The existing
interfaces have already too many parameters and it's a pain to
expand any of this for new required functionality.
The new function takes a pointer to a data structure as argument.
The data structure combines all existing parameters and allows for
easy extension.
The first extension for this is to handle the instantiation of
generic interrupt chips at the core level and to allow drivers to
provide extra init/exit callbacks.
This is necessary to do the full interrupt chip initialization
before the new domain is published, so that concurrent usage sites
won't see a half initialized interrupt domain. Similar problems
exist on teardown.
This has turned out to be a real problem due to the deferred and
parallel probing which was added in recent years.
Handling this at the core level allows to remove quite some accrued
boilerplate code in existing drivers and avoids horrible
workarounds at the driver level.
- The usual small improvements all over the place
Drivers:
- Add support for LAN966x OIC and RZ/Five SoC
- Split the STM ExtI driver into a microcontroller and a SMP version
to allow building the latter as a module for multi-platform
kernels
- Enable MSI support for Armada 370XP on platforms which do not
support IPIs
- The usual small fixes and enhancements all over the place"
* tag 'irq-core-2024-07-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (59 commits)
irqdomain: Fix the kernel-doc and plug it into Documentation
genirq: Set IRQF_COND_ONESHOT in request_irq()
irqchip/imx-irqsteer: Handle runtime power management correctly
irqchip/gic-v3: Pass #redistributor-regions to gic_of_setup_kvm_info()
irqchip/bcm2835: Enable SKIP_SET_WAKE and MASK_ON_SUSPEND
irqchip/gic-v4: Make sure a VPE is locked when VMAPP is issued
irqchip/gic-v4: Substitute vmovp_lock for a per-VM lock
irqchip/gic-v4: Always configure affinity on VPE activation
Revert "irqchip/dw-apb-ictl: Support building as module"
Revert "Loongarch: Support loongarch avec"
arm64: Kconfig: Allow build irq-stm32mp-exti driver as module
ARM: stm32: Allow build irq-stm32mp-exti driver as module
irqchip/stm32mp-exti: Allow building as module
irqchip/stm32mp-exti: Rename internal symbols
irqchip/stm32-exti: Split MCU and MPU code
arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms
ARM: stm32: Use different EXTI driver on ARMv7m and ARMv7a
irqchip/stm32-exti: Add CONFIG_STM32MP_EXTI
irqchip/dw-apb-ictl: Support building as module
irqchip/riscv-aplic: Simplify the initialization code
...
|
||
|
Linus Torvalds
|
9c67f9084a |
power sequencing fixes for v6.11-rc1
- fix an invalid pointer dereference in error path in pwrseq core - reduce the Kconfig noise from PCI pwrctl choices -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEFp3rbAvDxGAT0sefEacuoBRx13IFAmaaMYkACgkQEacuoBRx 13L0Uw/+JdFxMWwQYKwWs84rKaALFtH4+vKzdZlyonGtTCl8X4wr5JX/jqfjBPof kO8FIKTIofWiiYkL3A5hvZbfuG9aINzOwle5nYhlSyeR5JN/ZJwVOKzfkFF1vcgK XJdxBZjD8wIB/foouleLH1+DhQu5d9BuB+NsANCcVo4IqAupK618NEVwTqRmQEPf M4JdmzVTRSVVnKS9RQ8MbXotfUSAI7GuvSCd+xs5SdTlBcgNNTLx4PUWhcLsSY5t oJ1TCx4a7MrDaFxjt8IvtsfGl0F5+0GNljxvcgSC/bckTzP6WAJJnCf8EIPpq95z HPx+7fvyKoScZbup+s2HEbRsqLUDQYFyZ8BjbkLBVn0NZSeJngFyEb2+A4JM/zK2 T2gGQk1Xe9HRwsWwi6Gd5wsL6kcknWdedh1B5m5zss2nIGXxO6Vw0Gz7U1dluS/P x/Olg2Le4oOahyFnsY4byG9hpO2898m/QHs7NMeCDZA3BEdXP2/+eVlASL6JZ2hl vRU8s6eheCBaI2iAUPF9Lc9+qtY4ry7b3DqCHDj11xxq+i4IwYErxs6ClsgpPBWZ l/VEPOFJYzFi1Y448uzn5vNPjPE7AsKn2Fl5ZERl7wTi4x8ZlJpVKiA3Cj3OPW1A hsuEOMJIVyZFEimexoIWK9sky9tY3mHsdhiE/AsF43Bj3aICTQE= =I1ot -----END PGP SIGNATURE----- Merge tag 'pwrseq-fixes-for-v6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux Pull power sequencing fixes from Bartosz Golaszewski: "There's one fix for an invalid pointer dereference in error path reported by smatch and two patches that address the noisy config choices you reported earlier this week. Summary: - fix an invalid pointer dereference in error path in pwrseq core - reduce the Kconfig noise from PCI pwrctl choices" * tag 'pwrseq-fixes-for-v6.11-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/brgl/linux: arm64: qcom: don't select HAVE_PWRCTL when PCI=n Kconfig: reduce the amount of power sequencing noise power: sequencing: fix an invalid pointer dereference in error path |
||
Arnd Bergmann
|
1a8c67a8b2 |
arm64: qcom: don't select HAVE_PWRCTL when PCI=n
The new HAVE_PWRCTL option is defined in the PCI subsystem, so
selecting it unconditionally when PCI is disabled causes a harmless
warning:
WARNING: unmet direct dependencies detected for HAVE_PWRCTL
Depends on [n]: PCI [=n]
Selected by [y]:
- ARCH_QCOM [=y]
Add 'if PCI' in the qualcomm platform to hide the warning.
Fixes:
|
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Bartosz Golaszewski
|
ed70aaac7c |
Kconfig: reduce the amount of power sequencing noise
Kconfig will ask the user twice about power sequencing: once for the QCom
WCN power sequencing driver and then again for the PCI power control
driver using it.
Let's automate the selection of PCI_PWRCTL by introducing a new hidden
symbol: HAVE_PWRCTL which should be selected by all platforms that have
the need to include PCI power control code (right now: only ARCH_QCOM).
The pwrseq-based PCI pwrctl driver itself will then be selected by the
drivers binding to devices that may require external handling of the
power-up sequence (currently: ath11k and ath12k) based on the value
of HAVE_PWRCTL.
Make all PCI pwrctl Kconfig symbols hidden so that no questions are
asked during configuration.
Fixes:
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||
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Linus Torvalds
|
a5db8e4544 |
soc: arm platform updates for 6.11
The majority of the updates here are Dmitry Torokhov's cleanups for platform code in the pxa and tegra platforms, changing custom platform_data structures into DT-compatible software node declarations. The other updates are for the MAINTAINERS file, correcting some stale or missing entries. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmaVNvgACgkQYKtH/8kJ UiddAQ//QIfU7YJbB+nLLHURWDZsFqzmdwX9Shwb810TecwkYyeltbjkwYQw6/VD Pc1C5t08Brnjwgm9Z4jU8dKDeS4znMy1MzjyGoZqYLamNojhChXG4fonhGVYncg4 m3ruXgXZ/xsmqfMloclCtOSB6DWjXk9tVyUDNymXWgATmlwVsZl6saXf5nEo11bu WKi6kHhfM1s/JKGBaScd/GnxmXpBco4T7ub8cBZ/6Kn5RS6OodSb1ZCiTTI3KHdT oLzQ+B+MjAF5jlWvrqFuKrosjHB0RiKa/GKlfwsM4ho91Rfm979wsykEacR+iOy6 usbAdfV/AgKT0C6Hd471Kdtpt0mV5lcc4QdwQTAycslHI4CzjRmQW+yHWUJxxOEB ggEtzKimpVbInN4ygJTnA8dZIawZ/CdCZQ04hQtyEuZamx3MGYVPaNIowNq4CRlv r6NRgfvQVGeQfpJCOdUySwwxVXDsq+Q8dUvswf6qfDDRyHiAtNqnoNd/G4rsI9Uy ItsGaFHpaVi1ElAO7IyEb9JzQGRIwxryseET5cUyfhJEM5RFk4aBMYJVFtDgV4H5 KldgfIWpUZyMlM6IxdWziBDvKyrToAXb9NSX7nlcP2879IztNIwW2V+7y4rdX7Mu fTjLZxkypLdJkKvdcXNwS4toZ+CvpzcjeEJlGcPcVc1JY/Ua3Ck= =/EgX -----END PGP SIGNATURE----- Merge tag 'soc-arm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull arm SoC platform updates from Arnd Bergmann: "The majority of the updates here are Dmitry Torokhov's cleanups for platform code in the pxa and tegra platforms, changing custom platform_data structures into DT-compatible software node declarations. The other updates are for the MAINTAINERS file, correcting some stale or missing entries" * tag 'soc-arm-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: pxa: fix build breakage on PXA3xx ti: omap: MAINTAINERS: move Benoît Cousson to CREDITS amazon: MAINTAINERS: change to odd fixes and Tsahee Zidenberg to CREDITS MAINTAINERS: thead: add git tree ARM: spitz: Use software nodes for the ADS7846 touchscreen ARM: spitz: Use software nodes to describe LED GPIOs ARM: spitz: Use software nodes to describe MMC GPIOs ARM: spitz: Use software nodes to describe LCD GPIOs ARM: spitz: Use software nodes to describe audio GPIOs ARM: spitz: Use software nodes to describe SPI CS lines ARM: spitz: Simplify instantiating SPI controller ARM: pxa/gumstix: convert vbus gpio to use software nodes ARM: pxa: consolidate GPIO chip platform data ARM: spitz: fix GPIO assignment for backlight ARM: tegra: paz00: Use software nodes to describe GPIOs for WiFi rfkill MAINTAINERS: ARM: airoha: add entry to cover Airoha SoC bus: vexpress-config: Add missing MODULE_DESCRIPTION() macro arm64: layerscape: remove redundant EDAC_SUPPORT selection dt-bindings: arm: Remove obsolete RTSM DCSCB binding arm: vexpress: Remove obsolete RTSM DCSCB support |
||
Pascal Paillet
|
e9a316affb
|
arm64: stm32: enable scmi regulator for stm32
Add SCMI ARM REGULATOR configuration for stm32. Signed-off-by: Pascal Paillet <p.paillet@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Acked-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20240705134554.2833835-1-alexandre.torgue@foss.st.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Antonio Borneo
|
f2605e1715 |
arm64: Kconfig: Allow build irq-stm32mp-exti driver as module
Drop auto-selecting the driver, so it can be built either as a module or built-in. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240620083115.204362-9-antonio.borneo@foss.st.com |
||
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Antonio Borneo
|
00f07f9727 |
arm64: Kconfig: Select STM32MP_EXTI on STM32 platforms
Use the new config flag to build the correct driver that will be extracted from the old code. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240620083115.204362-4-antonio.borneo@foss.st.com |
||
Baruch Siach
|
e2106e6ad2 |
arm64: layerscape: remove redundant EDAC_SUPPORT selection
CONFIG_ARM64 selects CONFIG_EDAC_SUPPORT already. Signed-off-by: Baruch Siach <baruch@tkos.co.il> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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|
Linus Torvalds
|
6bfd2d442a |
Updates for the interrupt subsystem:
- Core code:
- Interrupt storm detection for the lockup watchdog:
Lockups which are caused by interrupt storms are not easy to debug
because there is no information about the events which make the lockup
detector trigger.
To make this more user friendly, provide an extenstion to interrupt
statistics which allows to take snapshots and an interface to retrieve
the delta to the snapshot. Use this new mechanism in the watchdog code
to do a two stage lockup analysis by taking the snapshot and printing
the deltas for the topmost active interrupts on the second trigger.
Note: This contains both the interrupt and the watchdog changes as
the latter depend on the former obviously.
- Avoid summation loops in the /proc/interrupts output and use the global
counter when possible
- Skip suspended interrupts on CPU hotplug operations to ensure that they
are not delivered before the system resumes the device drivers when
coming out of suspend.
- On CPU hot-unplug interrupts which are affine to the outgoing CPU are
migrated to a different CPU in the affinity mask. This can fail when
the CPUs have no vectors left. Instead of giving up try to migrate it
to any online CPU and thereby breaking the affinity setting in order to
prevent a stale device interrupt which targets an offline CPU
- The usual small cleanups
- Driver code:
- Support for the RISCV AIA MSI controller
- Make the interrupt allocation for the Loongson PCH controller more
flexible to prevent vector exhaustion
- The usual set of cleanups and fixes all over the place
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Merge tag 'irq-core-2024-05-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull interrupt subsystem updates from Thomas Gleixner:
"Core code:
- Interrupt storm detection for the lockup watchdog:
Lockups which are caused by interrupt storms are not easy to debug
because there is no information about the events which make the
lockup detector trigger.
To make this more user friendly, provide an extenstion to interrupt
statistics which allows to take snapshots and an interface to
retrieve the delta to the snapshot. Use this new mechanism in the
watchdog code to do a two stage lockup analysis by taking the
snapshot and printing the deltas for the topmost active interrupts
on the second trigger.
Note: This contains both the interrupt and the watchdog changes as
the latter depend on the former obviously.
- Avoid summation loops in the /proc/interrupts output and use the
global counter when possible
- Skip suspended interrupts on CPU hotplug operations to ensure that
they are not delivered before the system resumes the device drivers
when coming out of suspend.
- On CPU hot-unplug interrupts which are affine to the outgoing CPU
are migrated to a different CPU in the affinity mask. This can fail
when the CPUs have no vectors left. Instead of giving up try to
migrate it to any online CPU and thereby breaking the affinity
setting in order to prevent a stale device interrupt which targets
an offline CPU
- The usual small cleanups
Driver code:
- Support for the RISCV AIA MSI controller
- Make the interrupt allocation for the Loongson PCH controller more
flexible to prevent vector exhaustion
- The usual set of cleanups and fixes all over the place"
* tag 'irq-core-2024-05-12' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (51 commits)
irqchip/gic-v3-its: Remove BUG_ON in its_vpe_irq_domain_alloc
cpuidle: Avoid explicit cpumask allocation on stack
irqchip/sifive-plic: Avoid explicit cpumask allocation on stack
irqchip/riscv-aplic-direct: Avoid explicit cpumask allocation on stack
irqchip/loongson-eiointc: Avoid explicit cpumask allocation on stack
irqchip/gic-v3-its: Avoid explicit cpumask allocation on stack
irqchip/irq-bcm6345-l1: Avoid explicit cpumask allocation on stack
cpumask: Introduce cpumask_first_and_and()
irqchip/irq-brcmstb-l2: Avoid saving mask on shutdown
genirq: Reuse irq_is_nmi()
genirq/cpuhotplug: Retry with cpu_online_mask when migration fails
genirq/cpuhotplug: Skip suspended interrupts when restoring affinity
arm64: dts: st: Add interrupt parent to pinctrl on stm32mp251
arm64: dts: st: Add exti1 and exti2 nodes on stm32mp251
ARM: dts: stm32: List exti parent interrupts on stm32mp131
ARM: dts: stm32: List exti parent interrupts on stm32mp151
arm64: Kconfig.platforms: Enable STM32_EXTI for ARCH_STM32
irqchip/stm32-exti: Mark events reserved with RIF configuration check
irqchip/stm32-exti: Skip secure events
irqchip/stm32-exti: Convert driver to standard PM
...
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||
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Linus Torvalds
|
0c2212926d |
soc: arm code changes for 6.10
The code changes are fairly minimal, there is a bit of conversion of the old orion5x platform to modern gpio descriptors, the Kconfig entry for the added EN7581 platform and a sysfs change for the i.MX PMU device. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmY+NV8ACgkQYKtH/8kJ UifY2RAAqvYWec0uzJDgUPuJCh3OL7XnpV8UvdUdc9IK4JBbXl/KPRj0m3qY1c+G uhRJ9lDYsEUd0bs3KI/qSSZ2sFmkO4TxpBEbaENCRSolW1hRWzO6a9Opiqfvyvnq 5u1hBJ2QNuVovfcAtdLkS63mafIn5m+RzuQELwcbSllCxWlfUJDnOF1ABDr6JhZ2 YF7bzdJCpTP6NGUuiG0fOk9/k573Y4xJw99h/B2+qSNA/MQrVwEZ6AcVGogRsYf+ ySpFX7itMqUCne77ULKUdP3T29+H+0y3oBln+5lxeqKpDrFBLXov5+JhRpUuhYza FNwbf9FzGpO1hTpO/pXj+IjvUj9CLn9FB/papTSh+Hnm4VNWfYEU3AG4yUlhDIdt 8ANZKL9hw4kevYFTUpP4aG/5sRu4iFLdXtMUaASSJrr9D+UH0ZEs28rqpSdnKb7D UMi7r9/yXHxIpSqLbB7RntyRZdD0Nmq78TvKRYIzZSfVb0L48YEInYS32RC1BvKY kNL5F48QHHqCktA144QaR1t0m1YAx35BignTGDZ7oL5qMvlcQvbDKL/3BzqEfqBt CnGrsErOsTrH4/jdlTn7EMrtHag/ksJqbWkh/09kQZYyaQUOpm/1SL6Pgdb/7RqN 1jmlBAZrKFDEccjetMFnXIhaxuWOR1saWrjLgTuwctZKfEUBdmk= =zzwg -----END PGP SIGNATURE----- Merge tag 'soc-arm-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC code changes from Arnd Bergmann: "The code changes are fairly minimal, there is a bit of conversion of the old orion5x platform to modern gpio descriptors, the Kconfig entry for the added EN7581 platform and a sysfs change for the i.MX PMU device" * tag 'soc-arm-6.10' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: add Airoha EN7581 platform ARM: orion5x: Convert TS409 board to GPIO descriptors for LEDs ARM: orion5x: Convert Net2big board to GPIO descriptors for LEDs ARM: orion5x: Convert MV2120 board to GPIO descriptors for LEDs ARM: orion5x: Convert DNS323 board to GPIO descriptors for LEDs ARM: orion5x: Convert D2Net board to GPIO descriptors for LEDs ARM: imx: Assign parents for mmdc event_source devices |
||
Daniel Danzberger
|
428ae88ef5 |
arm64: add Airoha EN7581 platform
Introduce the Kconfig entry for the Airoha EN7581 multicore architecture available in the Airoha EN7581 evaluation board. Signed-off-by: Daniel Danzberger <dd@embedd.com> Co-developed-by: Lorenzo Bianconi <lorenzo@kernel.org> Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org> Link: https://lore.kernel.org/r/d52d95db313e6a58ba997ba2181faf78a1014bcc.1709975956.git.lorenzo@kernel.org Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
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Antonio Borneo
|
f55e8e3256 |
arm64: Kconfig.platforms: Enable STM32_EXTI for ARCH_STM32
ARCH_STM32 needs to use STM32 EXTI interrupt controller for GPIO and wakeup interrupts. Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Link: https://lore.kernel.org/r/20240415134926.1254428-8-antonio.borneo@foss.st.com |
||
Gatien Chevallier
|
5c9668cfc6 |
firewall: introduce stm32_firewall framework
Introduce a STM32 firewall framework that offers to firewall consumers different firewall services such as the ability to check their access rights against their firewall controller(s). The STM32 firewall framework offers a generic API for STM32 firewall controllers that is defined in their drivers to best fit the specificity of each firewall. There are various types of firewalls: -Peripheral firewalls that filter accesses to peripherals -Memory firewalls that filter accesses to memories or memory regions -No type for undefined type of firewall Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
||
Brad Larson
|
646fe2e4b3 |
arm64: Add config for AMD Pensando SoC platforms
Add ARCH_PENSANDO configuration option for AMD Pensando SoC based platforms. Signed-off-by: Brad Larson <blarson@amd.com> Link: https://lore.kernel.org/r/20230925195610.47971-4-blarson@amd.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
868a11b602 |
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
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Merge tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into soc/newsoc
STM32 STM32MP25 for v6.5, round 1
Highlights:
----------
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35,
common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3,
parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH,
CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode.
-STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/A35 frequency:
-STM32MP25xY, "Y" gives information:
-Y = A means A35@1.2GHz + no cryp IP and no secure boot.
-Y = C means A35@1.2GHz + cryp IP and secure boot.
-Y = D means A35@1.5GHz + no cryp IP and no secure boot.
-Y = F means A35@1.5GHz + cryp IP and secure boot.
This PR adds the STM32MP257F EV1 board support. This board embeds a
STM32MP257FAI SoC, with 4GB of DDR4, TSN switch (2+1 ports),
2*USB typeA, 1*USB2 typeC, SNOR OctoSPI, mini PCIe, STPMIC2 for power distribution ...
* tag 'stm32-mp25-for-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32: (44 commits)
MAINTAINERS: add entry for ARM/STM32 ARCHITECTURE
arm64: defconfig: enable ARCH_STM32 and STM32 serial driver
arm64: dts: st: add stm32mp257f-ev1 board support
dt-bindings: stm32: document stm32mp257f-ev1 board
arm64: dts: st: introduce stm32mp25 pinctrl files
arm64: dts: st: introduce stm32mp25 SoCs family
arm64: introduce STM32 family on Armv8 architecture
dt-bindings: stm32: add st,stm32mp25-syscfg compatible for syscon
pinctrl: stm32: add stm32mp257 pinctrl support
dt-bindings: pinctrl: stm32: support for stm32mp257 and additional packages
ARM: dts: stm32: fix i2s endpoint format property for stm32mp15xx-dkx
ARM: dts: stm32: Fix audio routing on STM32MP15xx DHCOM PDK2
ARM: dts: stm32: add required supplies of ov5640 in stm32mp157c-ev1
ARM: dts: stm32: Update to generic ADC channel binding on DHSOM systems
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-testbench
ARM: dts: stm32: adopt generic iio bindings for adc channels on dhcor-drc
ARM: dts: stm32: adopt generic iio bindings for adc channels on emstamp-argon
ARM: dts: stm32: adopt generic iio bindings for adc channels on stm32mp157c-ed1
ARM: dts: stm32: enable adc on stm32mp15xx-dkx boards
ARM: dts: stm32: add vrefint support to adc2 on stm32mp15
...
Link: https://lore.kernel.org/r/080fc303-45c1-6cc0-4c5e-694e730896a6@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
Alexandre Torgue
|
9e4e24414c |
arm64: introduce STM32 family on Armv8 architecture
Add a dedicated ARCH_STM32 for STM32 SoCs config. First STM32 Armv8 SoC family is the STM32MP25 which is composed of STM32MP251, STM32MP253, STM32MP255, STM32MP257 SoCs. Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> |
||
Jacky Huang
|
64b88e9ff6 |
arm64: Kconfig.platforms: Add config for Nuvoton MA35 platform
Add ARCH_NUVOTON configuration option for Nuvoton MA35 family SoCs. Signed-off-by: Jacky Huang <ychuang3@nuvoton.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Linus Torvalds
|
8bf1a529cd |
arm64 updates for 6.3:
- Support for arm64 SME 2 and 2.1. SME2 introduces a new 512-bit architectural register (ZT0, for the look-up table feature) that Linux needs to save/restore. - Include TPIDR2 in the signal context and add the corresponding kselftests. - Perf updates: Arm SPEv1.2 support, HiSilicon uncore PMU updates, ACPI support to the Marvell DDR and TAD PMU drivers, reset DTM_PMU_CONFIG (ARM CMN) at probe time. - Support for DYNAMIC_FTRACE_WITH_CALL_OPS on arm64. - Permit EFI boot with MMU and caches on. Instead of cleaning the entire loaded kernel image to the PoC and disabling the MMU and caches before branching to the kernel bare metal entry point, leave the MMU and caches enabled and rely on EFI's cacheable 1:1 mapping of all of system RAM to populate the initial page tables. - Expose the AArch32 (compat) ELF_HWCAP features to user in an arm64 kernel (the arm32 kernel only defines the values). - Harden the arm64 shadow call stack pointer handling: stash the shadow stack pointer in the task struct on interrupt, load it directly from this structure. - Signal handling cleanups to remove redundant validation of size information and avoid reading the same data from userspace twice. - Refactor the hwcap macros to make use of the automatically generated ID registers. It should make new hwcaps writing less error prone. - Further arm64 sysreg conversion and some fixes. - arm64 kselftest fixes and improvements. - Pointer authentication cleanups: don't sign leaf functions, unify asm-arch manipulation. - Pseudo-NMI code generation optimisations. - Minor fixes for SME and TPIDR2 handling. - Miscellaneous updates: ARCH_FORCE_MAX_ORDER is now selectable, replace strtobool() to kstrtobool() in the cpufeature.c code, apply dynamic shadow call stack in two passes, intercept pfn changes in set_pte_at() without the required break-before-make sequence, attempt to dump all instructions on unhandled kernel faults. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmP0/QsACgkQa9axLQDI XvG+gA/+JDVEH9wRzAIZvbp9hSuohPc48xgAmIMP1eiVB0/5qeRjYAJwS33H0rXS BPC2kj9IBy/eQeM9ICg0nFd0zYznSVacITqe6NrqeJ1F+ftS4rrHdfxd+J7kIoCs V2L8e+BJvmHdhmNV2qMAgJdGlfxfQBA7fv2cy52HKYcouoOh1AUVR/x+yXVXAsCd qJP3+dlUKccgm/oc5unEC1eZ49u8O+EoasqOyfG6K5udMgzhEX3K6imT9J3hw0WT UjstYkx5uGS/prUrRCQAX96VCHoZmzEDKtQuHkHvQXEYXsYPF3ldbR2CziNJnHe7 QfSkjJlt8HAtExA+BkwEe9i0MQO/2VF5qsa2e4fA6l7uqGu3LOtS/jJd23C9n9fR Id8aBMeN6S8+MjqRA9L2uf4t6e4ISEHoG9ZRdc4WOwloxEEiJoIeun+7bHdOSZLj AFdHFCz4NXiiwC0UP0xPDI2YeCLqt5np7HmnrUqwzRpVO8UUagiJD8TIpcBSjBN9 J68eidenHUW7/SlIeaMKE2lmo8AUEAJs9AorDSugF19/ThJcQdx7vT2UAZjeVB3j 1dbbwajnlDOk/w8PQC4thFp5/MDlfst0htS3WRwa+vgkweE2EAdTU4hUZ8qEP7FQ smhYtlT1xUSTYDTqoaG/U2OWR6/UU79wP0jgcOsHXTuyYrtPI/Q= =VmXL -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - Support for arm64 SME 2 and 2.1. SME2 introduces a new 512-bit architectural register (ZT0, for the look-up table feature) that Linux needs to save/restore - Include TPIDR2 in the signal context and add the corresponding kselftests - Perf updates: Arm SPEv1.2 support, HiSilicon uncore PMU updates, ACPI support to the Marvell DDR and TAD PMU drivers, reset DTM_PMU_CONFIG (ARM CMN) at probe time - Support for DYNAMIC_FTRACE_WITH_CALL_OPS on arm64 - Permit EFI boot with MMU and caches on. Instead of cleaning the entire loaded kernel image to the PoC and disabling the MMU and caches before branching to the kernel bare metal entry point, leave the MMU and caches enabled and rely on EFI's cacheable 1:1 mapping of all of system RAM to populate the initial page tables - Expose the AArch32 (compat) ELF_HWCAP features to user in an arm64 kernel (the arm32 kernel only defines the values) - Harden the arm64 shadow call stack pointer handling: stash the shadow stack pointer in the task struct on interrupt, load it directly from this structure - Signal handling cleanups to remove redundant validation of size information and avoid reading the same data from userspace twice - Refactor the hwcap macros to make use of the automatically generated ID registers. It should make new hwcaps writing less error prone - Further arm64 sysreg conversion and some fixes - arm64 kselftest fixes and improvements - Pointer authentication cleanups: don't sign leaf functions, unify asm-arch manipulation - Pseudo-NMI code generation optimisations - Minor fixes for SME and TPIDR2 handling - Miscellaneous updates: ARCH_FORCE_MAX_ORDER is now selectable, replace strtobool() to kstrtobool() in the cpufeature.c code, apply dynamic shadow call stack in two passes, intercept pfn changes in set_pte_at() without the required break-before-make sequence, attempt to dump all instructions on unhandled kernel faults * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (130 commits) arm64: fix .idmap.text assertion for large kernels kselftest/arm64: Don't require FA64 for streaming SVE+ZA tests kselftest/arm64: Copy whole EXTRA context arm64: kprobes: Drop ID map text from kprobes blacklist perf: arm_spe: Print the version of SPE detected perf: arm_spe: Add support for SPEv1.2 inverted event filtering perf: Add perf_event_attr::config3 arm64/sme: Fix __finalise_el2 SMEver check drivers/perf: fsl_imx8_ddr_perf: Remove set-but-not-used variable arm64/signal: Only read new data when parsing the ZT context arm64/signal: Only read new data when parsing the ZA context arm64/signal: Only read new data when parsing the SVE context arm64/signal: Avoid rereading context frame sizes arm64/signal: Make interface for restore_fpsimd_context() consistent arm64/signal: Remove redundant size validation from parse_user_sigframe() arm64/signal: Don't redundantly verify FPSIMD magic arm64/cpufeature: Use helper macros to specify hwcaps arm64/cpufeature: Always use symbolic name for feature value in hwcaps arm64/sysreg: Initial unsigned annotations for ID registers arm64/sysreg: Initial annotation of signed ID registers ... |
||
Randy Dunlap
|
11fc944f7e |
arm64: Kconfig: fix spelling
Fix spelling typos in arm64: (reported by codespell) s/upto/up to/ s/familly/family/ Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Link: https://lore.kernel.org/r/20230124181605.14144-1-rdunlap@infradead.org Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
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Krzysztof Kozlowski
|
69d8a5f884
|
arm64: drop redundant "ARMv8" from Kconfig option title
All these platforms are ARMv8 or newer and choosing the platforms in menuconfig is much easier if the titles start with something specific. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230120125722.270722-1-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Lad Prabhakar
|
d84ea59e20 |
arm64: renesas: Drop selecting GPIOLIB and PINCTRL
Do not automatically select the GPIOLIB and PINCTRL config options as they are already automatically selected as part of the SOC_RENESAS config option in drivers/soc/renesas/Kconfig. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20221027112459.77413-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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|
Linus Torvalds
|
41fc64a055 |
ARM: SoC code changes for 6.1
The main changes this time are for the organization of the Kconfig files, introducing per-vendor top-level options on arm64 to match those on arm32, and making the platform selection on arm32 more uniform, in particular for the remaining StrongARM platforms that still have a couple of special cases compared to the more recent ones. I also did a cleanup of the old Footbridge platform, which was the last holdout for the phys_to_dma()/dma_to_phys() interface that is now completely gone from arm32, completing work started by Christoph Hellwig. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmM+n3EACgkQmmx57+YA GNlnjA/+JR/0Y8gzRw6lGLB254R1zLqKzoZC065+zk++qN/t9pIEAvICaTO7ooIY Iz79crIyQ7aJptVfDyb44hrC23sBsY/ujkh7WmfLDAs7Jf9a1xOgcQONz6uOk+3p qsCXEjyn6O4EPtCBxiICA7vcVUAeM+wkcuV2KQnW9b4CNlLXdhyn1ijwnGO4Zm6g h2w0gX2TVkoR2ZSqWh5CCk9OOfgQRrHGMHzX0iRXtYApJk/zA8ywnuRsqts8R3lu 04Jl17szmMoeN2RQjf/gTJc7xpWvs7SzfyNTXXoXmB7x9c27eQXyoUpWC9o/BPPb YNqv2Xmm0+cMsmPvkY/7poDlPMObh9exV2dDQ3XKoyoVPu+hBL4AsXMchQ7rsrVk +FvdTxZTpl42sx9KitRQG/7WZ1pmxBBcFVB4fmVJcCF4OcOpXH7i1VmsB6PAOaIF CKUpaIjnTZ1VbqhADqCzRfUSI4HiAHuo886rAYcCK3K47UpLjBwcwOTyXZccG0SL z9IQkm53DgsJVLEUmtwAfVF57SciWxmQZid7vM2xQX/03pwO2/x4d347EcJJZcHS vuqWZD0Wp3VBuj2fLFk83WaaQJzP5rzJAewKbR4KyxraMyTvOEYVBa18AMnZQ6sw aFecU9YXa8PhgaiFrfepZcTby0Bm+YSc8ko80se44zz07kZW/y8= =xsKV -----END PGP SIGNATURE----- Merge tag 'arm-soc-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC updates from Arnd Bergmann: "The main changes this time are for the organization of the Kconfig files, introducing per-vendor top-level options on arm64 to match those on arm32, and making the platform selection on arm32 more uniform, in particular for the remaining StrongARM platforms that still have a couple of special cases compared to the more recent ones. I also did a cleanup of the old Footbridge platform, which was the last holdout for the phys_to_dma()/dma_to_phys() interface that is now completely gone from arm32, completing work started by Christoph Hellwig" * tag 'arm-soc-6.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (21 commits) ARM: aspeed: Kconfig: Fix indentation ARM: Drop CMDLINE_* dependency on ATAGS ARM: Drop CMDLINE_FORCE dependency on !ARCH_MULTIPLATFORM ARM: s3c: remove orphan declarations from arch/arm/mach-s3c/devs.h pxa: Drop if with an always false condition ARM: orion: fix include path ARM: shmobile: Drop selecting SOC_BUS arm64: renesas: Drop selecting SOC_BUS ARM: disallow PCI with MMU=n again ARM: footbridge: remove custom DMA address handling MAINTAINERS: Add BCM4908 maintainer to BCMBCA entry ARM: footbridge: move isa-dma support into footbridge ARM: footbridge: remove leftover from personal-server ARM: footbridge: remove addin mode arm64: Kconfig.platforms: Group NXP platforms together arm64: Kconfig.platforms: Re-organized Broadcom menu ARM: make ARCH_MULTIPLATFORM user-visible ARM: fix XIP_KERNEL dependencies ARM: Kconfig: clean up platform selection ARM: simplify machdirs/platdirs handling ... |
||
|
Arnd Bergmann
|
1ee41d92f1 |
Renesas ARM SoC updates for v6.1
- Drop superfluous selects of SOC_BUS. -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCYyhVdAAKCRCKwlD9ZEnx cGMLAQCmqW2G/sOlBzR+9vHUqvvNVbLWAc+1DfW6yh1uDbLsGQD/bdZrbKyeLPuw j+xysaxRUB6Aom8h6vwgH9rSGLqnwAQ= =Cht9 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmMt/HMACgkQmmx57+YA GNnMdQ/9GU8v4CtyrB/09kUV7q+mKowGa4PTzOab/CKXqSmiIx5mNETPEQPT4yrx m82GLj0op9UbtV3obNzwejEhEDgmdmSCaKHzgWZbGwg6GILeBWNaAoG1IwVJE8gl jymu58+LGinLh8Hp2JCok/9S/CCFHALwrp+EZXhjO6jDfCYGdJ6rAIrHNRay5loa OpX1lnEd+iZmAUE/tTzEX7Ih+3YWpHb4O1Vrg/BJeHCxqEXFloROMwWZR+9Z+Xty pGvrTJmdwZJA+hSkJ4Fgon7UN0SLqCPws6/vdV8QRAXQhQmIACyYELTzRhA3buVS Tpc2uHqGKswp6X2CFLG1o+UVfsRvmAZ0Nlt0+Ic2x8hIVAgeRbwK2Avk5+r+WT3e 96PzOLkc4xgecaYEtwxkRv9HVU4Q0IhoVtyYGQKyNmCVs2Pyv2Iz93UWCb2CCCo+ iHc5sEAVCwg+cNTPJObSUDf0ASVeeaT92M7M0CNXb/xVA1btEHYriuAhqUh2UQWx U+sYXKoOM+ctsImjhVbMsIKfGTNbTUs/39Jeb46DwZwWyrHPnNUJqvhy8WB10yU8 uNg/a64bGZnVlBqzYyit/ZWJy5FrD0xRLHeddxpfuBJiM8HRPmtndESIRs56vFEc PNx41nMFVjSx3w7RyGEQlckkUh5gEJ4W6r6jhrzmRlBD9L99J1M= =/UxN -----END PGP SIGNATURE----- Merge tag 'renesas-arm-soc-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/soc Renesas ARM SoC updates for v6.1 - Drop superfluous selects of SOC_BUS. * tag 'renesas-arm-soc-for-v6.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: ARM: shmobile: Drop selecting SOC_BUS arm64: renesas: Drop selecting SOC_BUS Link: https://lore.kernel.org/r/cover.1663588781.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Lad Prabhakar
|
bb81684d2d |
arm64: renesas: Drop selecting SOC_BUS
Don't automatically select the SOC_BUS config option as we already have automatically selected it as part of the SOC_RENESAS config option [0] as renesas-soc.c [1] uses the APIs provided by SOC_BUS config option. [0] drivers/soc/renesas/Kconfig [1] drivers/soc/renesas/renesas-soc.c Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20220915233640.415305-1-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> |
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Florian Fainelli
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566e373fe0
|
arm64: Kconfig.platforms: Group NXP platforms together
Group the three NXP platforms under an ARCH_NXP menuconfig symbol to make make selection of similar vendor SoCs visually nicer. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220829173830.3567047-3-f.fainelli@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Florian Fainelli
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96796c914b
|
arm64: Kconfig.platforms: Re-organized Broadcom menu
There are now multiple Broadcom SoCs supported so group them under their own menu such that the selection is visually more appealing and we can easily add new platforms there in the future. This allows us to move ARCH_BRCMSTB back to its siblings. No functional changes introduced. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20220829173830.3567047-2-f.fainelli@gmail.com' Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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William Zhang
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dd5c672d7c |
arm64: bcmbca: Merge ARCH_BCM4908 to ARCH_BCMBCA
Delete ARCH_BCM4908 platform Kconfig for BCM4908 SoC as it is replaced by ARCH_BCMBCA and move its selection to ARCH_BCMBCA. Signed-off-by: William Zhang <william.zhang@broadcom.com> Link: https://lore.kernel.org/r/20220803175455.47638-8-william.zhang@broadcom.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Linus Torvalds
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dd65b96492 |
ARM: new SoC support for 6.0
This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLo+24ACgkQmmx57+YA GNkPVw//XAC/uK7WR4oz1D1YaPPNhEvFa6hV1gjGB7Iif72SzyDJmC+36MATU/AY neQjCOLJMhxI0hpDGY9nLYe+aP1C6vD32zsjffjt/+s9em+YZZCUkRJuQ5xO3fID Uk8ZAnCIcOqX9sjXr9ChW8irlcWFbKzhgWXnPqwQmycIaE7QVz1wx32dbc64YuAK S+290U8wbj8bukr33TyZPMdYlfqNU3c1W+dCaeVsQlX1juoHEV3stmIjslRefd6X Jre22YJE41VlPufZej76nHXuVnjKf54Oi347TcbPOWNDtEAIESt3mzKy+zICBT2p v01rNBf0SogyOtSbWDPTFCAH9W9hujSOJIUOWpbOLaPdfElXxcoTBwj2e2LMoW0k ke7YR1m6FKDam5GFU9Oe98CWIiVm/GnTA5mnhhETU1QTXQ3KeZ+Z8X779YuSWPv9 kJuOPRSk9NdcfRtxZz1vpCvhv/2hBbeBuz+GZi3bisMWdvVqS3lFqVbr6kziQbJZ kE6KJH48FdL0VLVvuy+aNSF2umLT42b+5+cmQFuP2zePQgo1DEMKEtFXpZjQJbha 3iu3sHnieOFMLcbNzbqSz2im3yYNBjl1M5qoGEXaw3Rkzqiht0kMNvAa4LmAejbh E+5BIczwWNbaUKgToV1ij65O4a78Bw98m2SIS7awEZC5MW/nXYA= =7Id+ -----END PGP SIGNATURE----- Merge tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM new SoC support from Arnd Bergmann: "This adds initial support for two SoC families that have been under review for a while. In both cases, the origonal idea was to have a minimally functional version, but we ended up leaving out the clk drivers that are still under review and will be merged through the corresponding subsystem tree. The Nuvoton NPCM8xx is a 64-bit Baseboard Management Controller and based on the 32-bit NPCM7xx family but is now getting added to arch/arm64 as well. Sunplus SP7021, also known as Plus1, is a general-purpose System-in-Package design based on the 32-bit Cortex-A7 SoC on the main chip, plus an I/O chip and memory in the same" * tag 'arm-newsoc-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (25 commits) MAINTAINERS: rectify entry for ARM/NUVOTON NPCM ARCHITECTURE arm64: defconfig: Add Nuvoton NPCM family support arm64: dts: nuvoton: Add initial NPCM845 EVB device tree arm64: dts: nuvoton: Add initial NPCM8XX device tree arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC dt-bindings: arm: npcm: Add nuvoton,npcm845 GCR compatible string dt-bindings: arm: npcm: Add nuvoton,npcm845 compatible string dt-bindings: arm: npcm: Add maintainer reset: npcm: Add NPCM8XX support dt-bindings: reset: npcm: Add support for NPCM8XX reset: npcm: using syscon instead of device data ARM: dts: nuvoton: add reset syscon property dt-bindings: reset: npcm: add GCR syscon property dt-binding: clk: npcm845: Add binding for Nuvoton NPCM8XX Clock dt-bindings: watchdog: npcm: Add npcm845 compatible string dt-bindings: timer: npcm: Add npcm845 compatible string ARM: dts: Add Sunplus SP7021-Demo-V3 board device tree ARM: sp7021_defconfig: Add Sunplus SP7021 defconfig ARM: sunplus: Add initial support for Sunplus SP7021 SoC irqchip: Add Sunplus SP7021 interrupt controller driver ... |
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Tomer Maimon
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3670d2ec13 |
arm64: npcm: Add support for Nuvoton NPCM8XX BMC SoC
This adds support for the Nuvoton NPCM8XX Board Management controller (BMC) SoC family. The NPCM8XX based quad-core Cortex-A35 ARMv8 architecture. Signed-off-by: Tomer Maimon <tmaimon77@gmail.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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26c350fe7a |
mvebu dt64 for 5.20 (part 1)
Add support for Marvell 98DX2530 (and variants) -----BEGIN PGP SIGNATURE----- iF0EABECAB0WIQQYqXDMF3cvSLY+g9cLBhiOFHI71QUCYtavZAAKCRALBhiOFHI7 1cppAKCTWos36VwvV+vKWV0+DfOUcikV2QCdHLcmQ0ygjT6AsW2/yPJfoNuM4b0= =7i0h -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLWsuIACgkQmmx57+YA GNlY0xAAqm4ruRmNyoCpkGOjg72+SLJlEZbhELMarHLopKMYrM4fIxyruuGmD1Cp r1uv21oZiDJhmr1sXqbtjOghNdsce3s1tKrYoWeMFgFTfDQGu4Bw7NWZZgY5xeqI aGxCdFgD9pCYaZgIXYlEqC2qLQP1eGypSTCFjgw+7JWnq57hZxsBYuQnAJhlu79g +xpRUVoTEc7duPKE2m2Vb2FhoJVaLSMC5T0ZiqekGX3wAO4JEHwSa8YFLPJ04HGg DESXMiWVUPYWrZ86vce6rtn0JWCBRRGeI3rZxsRYQ3xWYMhq27CL3E5PkQcrNwIH 29gr/Uzu2d5JlJgMSyT8bk+79eHbvhQoX/Daossk3DvHCOfRjv3/POdYqfaoWGAd nq3W5oxW4X+8eXP/zY7p4o7i/y03j0/VtbgtCUEOk3OkL5idqQxXeJTnr1XSPdm4 NnAAhB1xTZ8o3v8ohMAIuNvdFbJ3Mq0o+xuYPRVSJwLPgnXfpQfWMdI9Ag4eK7MI 1wkV9g8SFwqvd/vZyI+6jYYo8FPkc0JYvs88cAMXy1Tjw6ywRKprUlBrM2My9tre Ta3b2W1JUHYrniQoet+Z0GKg5xOtjkS9K9n4P3/ilq8zNYCURSaJCGmdOLwQw4Zs ZB7/PFQcLRVMBEJ913RefxcJG5ShnOiwrLtYIsB1wI0SRn3VAMw= =FqlL -----END PGP SIGNATURE----- Merge tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into arm/dt mvebu dt64 for 5.20 (part 1) Add support for Marvell 98DX2530 (and variants) * tag 'mvebu-dt64-5.20-1' of git://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu: arm64: marvell: enable the 98DX2530 pinctrl driver arm64: dts: marvell: Add Armada 98DX2530 SoC and RD-AC5X board dt-bindings: marvell: Document the AC5/AC5X compatibles Link: https://lore.kernel.org/r/87cze1qlg3.fsf@BL-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Chris Packham
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8225663e0c |
arm64: marvell: enable the 98DX2530 pinctrl driver
This commit makes sure the drivers for the 98DX2530 pin controller is enabled. Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Vadym Kochan <vadym.kochan@plvision.eu> Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com> |
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Arnd Bergmann
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2c071ce53d |
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.20, second part, please pull the following: - Rafal adds basic support for the BCM4912-based router Asus GT-AX6000, he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle we can remove ARCH_BCM4908 and continue to have make oldconfig work. Finally he spells out what BCA means to make it clearer -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLR5GMACgkQh9CWnEQH BwTQCxAAxaALuW5N/uso6vj64Zc/sLkrWupmjcz0ta57lnRus2K7CjpEGbiYEvU9 BXj4o9jNWpugCp5MwMzRSnQCC6AcrrS7vV3aLblxVwP4Dqlvb3h1i1N8qGzVJKVC vurbroIcCjqSx9J0i/bhD+X5Jyc0WYgwJajxSTU3so9YpD0asUHN/sOrz8t/LgW+ NmUwr3toe7WpvylV5eRPyqKGUWDZYhg0qePaKZJ6jgM9cQqlwIWzguWdCn6YEHZe 9EqQZjqstyq57EwNXfPOf8Ytb2/lp2j9/1NCBaJ6TFEUEruGWgHFh2m8mV0juEKG 3y0lnsh5GXhshvT6+kUKzXY1MwzHagAPv1ax0To1Zc5rsgKMIuo11We3XDVlu326 NHUXqQSoubBf5PE4jmmrpN3ay0ouXMSo0PjNZzSvS3TAWz76+q6WU4bgqvEf+vNE 5XOhAATbWY+Zpt/m9Xv0l1pP2UzdENF+lpi5T9XAnygA3N0cMB3uhxAUmGHVekIJ 4OPS2w2M0N2C43icb188o0GiswnzVZTw46SSY0gTEU6FQD3YplMtztbrK3Lr6F8q 13C/aoXY/+xgeMnsFD4Te1JfdHEknzhNT7mkOsYYKDZJGhlrShHnrRXze3QDkn18 OAkg7v+z4lkt2h7Xckoo9vVqJKrYE1582H5QmPOKQKzk0pIecFM= =fDSG -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLTFe0ACgkQmmx57+YA GNk0pBAAge+TlunaSMIGcYrh3q0If3krLoWyecACCA1TDP5K8PkEKrPok+u1rusl OeL6s/nL0uIdGEIU+6scGav/ZSFYr20vtstnyP2WmwQQUt3oEeqMfE1Ch/kCNL/K WhgwvNQA9GcvQphHSrwfZY2kHLkPUGgFA9cleaEghjuqs0kP46OABaRNIUZVRHMZ dp7SzzY/55TmxQQiYD6raAI8U0kxAaPxzqo+4sBcvNyccKfrAZP9WGyTsTmyn6uV IN+sAwsMS1WGAgXL0zQWAxEVxNdvbnt8q9+/tBzIIeZZYdeA0B/m5ZJ3DUaa8/kY zfH5UM8kNKUQx2cwdTNYiUT7YGdbZ+9iUCbiSUt9ELK0LMl1Rhu7i4wPA+K7/8Kn 10o+6kjj75kYjA3fm3wntFgtmTZLPRqpz5AQf4+XwdQ8QkiXNNCglYCUnEf9cvaQ ThFyIFfadOB2uCEJ+59kg7v8cQNLZffrNGqks0mD9/MDbRD3kMEZYrwMaGrxeeSz 3HVANUWXLoM0wyI7lC+vLwYgbGwtcglOEprtfPA9MvSUTfJPyZ7bYOnX0zBCwdLX tN1g/gIbYkQ80t/ce+HQc4sfxPgkk8W5D8eTy+t50BReEguJ39AVKByxVZLLnW/h ZwmwRrqSKD9d2Ps69K7z4nMJAEO/5mqbDw8++U18eqhDUJK+8Kw= =7JrY -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 5.20, second part, please pull the following: - Rafal adds basic support for the BCM4912-based router Asus GT-AX6000, he also has ARCH_BCM4908 select ARCH_BCMBCA such that in the next cycle we can remove ARCH_BCM4908 and continue to have make oldconfig work. Finally he spells out what BCA means to make it clearer * tag 'arm-soc/for-5.20/devicetree-arm64-part2' of https://github.com/Broadcom/stblinux: arm64: bcmbca: Include full family name in Kconfig arm64: make ARCH_BCM4908 select ARCH_BCMBCA arm64: dts: Add base DTS file for bcmbca device Asus GT-AX6000 Link: https://lore.kernel.org/r/20220715221642.297536-3-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Rafał Miłecki
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746ef3ac89 |
arm64: bcmbca: Include full family name in Kconfig
Spell out the BCA acronym to explain where these chips are coming from. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Link: https://lore.kernel.org/r/20220713145340.10599-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Rafał Miłecki
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32d3da7d2f |
arm64: make ARCH_BCM4908 select ARCH_BCMBCA
BCA is a big set / family of devices sharing multiple hardware blocks. It covers BCM4908, BCM63xx, BCM68xx devices and more. Most of drivers that depend on ARCH_BCM4908 should actually depend on ARCH_BCMBCA. To make such transition easier, cleaner and breakage-free add a proper "select". Later on - if we decide to keep ARCH_BCM4908 - it may be moved under ARCH_BCMBCA menu. Keeping it may be helpful for limited compiling of DTS files and "default" Kconfig entires. Or we may just decide to drop it. Signed-off-by: Rafał Miłecki <rafal@milecki.pl> Acked-by: William Zhang <william.zhang@broadcom.com> Acked-by: Kursad Oney <kursad.oney@broadcom.com> Link: https://lore.kernel.org/r/20220714045858.7786-1-zajec5@gmail.com Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Arnd Bergmann
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92c336e7ae |
This pull request contains Broadcom ARM64-based SocS Device Tree
updates for 5.20, please pull the following: - William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit counter part and adds basic support for these DSL/PON SoCs: 63158, 4912, 63146, 6856, 6813 - Anand adds basic support for the 6858 SoC - Krzysztof fixes a missing space between a property name and its value in a number of DTS files -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmLMT6AACgkQh9CWnEQH BwSmXhAAstUebP+FxQFCnCmrcpBktlXcPpAMDmTxgwKGQrHmITdAhvfK+eHpWsPo 9uBs1BdlHjyN/gC2p/o7S01WjI7j/Qodw106vgfhzIYuPbJUl/LVzYcubn1nhJvS fUvEh57Dw1jrqECy0nhUFltNf+C2Tw2R1Ug1BR2+K4ekLwU7Lmy6/4ugxbS1jSIH pWTqXNyTwzboYM4js5gPhPKTIrQHgYUd1YxFeExlG3LiLTI3WdnFwvsnHqFbmdHV 85UDR9Jic/tmWS7Egs7fqcxkHadWqSrgOE/79WKiWs/e+V8IxB4JfanEa6ltnZ6a JXiKPNryeZuhW0+LtqBgzU5I7DczH9zHVuBjaLvaLSGENf/bz9dhks9A1gQF/nkB ZgbtrMJJVHRXyGFovX7cjqtvVKSX4WUa/In2OKw8RJ51NKo5IWVnbn+R/4hA/6Tg kAYMeGLKggqeI4i77H6CXwgJTBJkidSEzw6zKJqALEPHT3nI+AqWUGN0DlFbQkko yd8Wte0cFXZ6/U3as7Ie159SoHj1k9R9XORhIOUKmoN11M7n+072h2VOQNsbVeni KiT7CVqy2FVL8HeCnAkJVNRbl+pBowtksJAUMl0zIzYpN9eGIelQJDIUXQxfXl29 Fvua4XALaIiNDWa9C+mX3DzB/UFGpYiQIutv2xVuHUH/VX8fshc= =WeA3 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmLQOQMACgkQmmx57+YA GNmi0w/+N7ZE7JF2Qmlf9EDmy/rq4vfZz7ZJ4pCT30pUtC16GGbbynsKWnYB7bb0 jeXxrytfr+yFZY7P8R83GkIpkBBpbhUlSWCi5W1VTQVaZLC5KZWZtPZymt4YD8KV zrIBVBX1ZxFNCOSMh5rP6ByrbJiuiQQ2DQiPgHDZMxFH8xUPKDvAOVR8JPhtlo6Q YtQgKA4zHXDkPQied4Je/NYfrh9xyLuskDmlBZ0OYvqp3XLLCBAlNKghH0bHSvt/ KW1AvQtacfI2STD2gGWlGktUJr9ff0Qhxe2DsDauhANShNSVGlFrtqJXxFDf79ly amlqhXtZI2I2osyukm4PK3Ys1smDnBmNY7nbctCAXUTtcsKI/VUqAud79++U5xcD +BrGrZ58KcLLJTcktxszdHvvP7P92B02jhPx2Oeqe0I59hbeXO1ozglBWw0VjJj1 Iar5p+SDo6k6F7t2pjLWg4hjtljIYn8RX6yKX6xisNBKioxAxv5HAYjN0IrENCrY ZXnOMpnDhnnomY4WsEEw9KOutZ1aXDphCfJs22wPyhH0cpsM4dtD+BnR2NmWnko8 h20M3b0xQui9P1N7iDNheAjuXJbOapu/D7R80NhCo9fWKILFaRI/YBkNSkc2juUT e5fMRqLpSzoRswa12PBnbZgZcPQop7DKq3rv8cGL9jR0OTqL2nU= =9IyI -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt This pull request contains Broadcom ARM64-based SocS Device Tree updates for 5.20, please pull the following: - William adds the ARCH_BCMBCA Kconfig entry to follow the ARM 32-bit counter part and adds basic support for these DSL/PON SoCs: 63158, 4912, 63146, 6856, 6813 - Anand adds basic support for the 6858 SoC - Krzysztof fixes a missing space between a property name and its value in a number of DTS files * tag 'arm-soc/for-5.20/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: Add DTS files for bcmbca SoC BCM6813 arm64: dts: Add DTS files for bcmbca SoC BCM6856 arm64: dts: Add DTS files for bcmbca SoC BCM63146 arm64: dts: broadcom: adjust whitespace around '=' ARM64: dts: Add DTS files for bcmbca SoC BCM6858 arm64: dts: Add DTS files for bcmbca SoC BCM4912 arm64: dts: Add DTS files for bcmbca SoC BCM63158 arm64: bcmbca: add arch bcmbca machine entry Link: https://lore.kernel.org/r/20220711164451.3542127-5-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Teh Wen Ping
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2b59af8cd4 |
arm64: dts: Add support for Stratix 10 Software Virtual Platform
Add Stratix 10 Software Virtual Platform device tree Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Teh Wen Ping <wen.ping.teh@intel.com> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> |
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William Zhang
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fdcd652ce2 |
arm64: bcmbca: add arch bcmbca machine entry
Add ARCH_BCMBCA config for Broadcom Broadband SoC chipsets Signed-off-by: William Zhang <william.zhang@broadcom.com> Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> |
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Linus Torvalds
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143a6252e1 |
arm64 updates for 5.19:
- Initial support for the ARMv9 Scalable Matrix Extension (SME). SME takes the approach used for vectors in SVE and extends this to provide architectural support for matrix operations. No KVM support yet, SME is disabled in guests. - Support for crashkernel reservations above ZONE_DMA via the 'crashkernel=X,high' command line option. - btrfs search_ioctl() fix for live-lock with sub-page faults. - arm64 perf updates: support for the Hisilicon "CPA" PMU for monitoring coherent I/O traffic, support for Arm's CMN-650 and CMN-700 interconnect PMUs, minor driver fixes, kerneldoc cleanup. - Kselftest updates for SME, BTI, MTE. - Automatic generation of the system register macros from a 'sysreg' file describing the register bitfields. - Update the type of the function argument holding the ESR_ELx register value to unsigned long to match the architecture register size (originally 32-bit but extended since ARMv8.0). - stacktrace cleanups. - ftrace cleanups. - Miscellaneous updates, most notably: arm64-specific huge_ptep_get(), avoid executable mappings in kexec/hibernate code, drop TLB flushing from get_clear_flush() (and rename it to get_clear_contig()), ARCH_NR_GPIO bumped to 2048 for ARCH_APPLE. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE5RElWfyWxS+3PLO2a9axLQDIXvEFAmKH19IACgkQa9axLQDI XvEFWg//bf0p6zjeNaOJmBbyVFsXsVyYiEaLUpFPUs3oB+81s2YZ+9i1rgMrNCft EIDQ9+/HgScKxJxnzWf68heMdcBDbk76VJtLALExbge6owFsjByQDyfb/b3v/bLd ezAcGzc6G5/FlI1IP7ct4Z9MnQry4v5AG8lMNAHjnf6GlBS/tYNAqpmj8HpQfgRQ ZbhfZ8Ayu3TRSLWL39NHVevpmxQm/bGcpP3Q9TtjUqg0r1FQ5sK/LCqOksueIAzT UOgUVYWSFwTpLEqbYitVqgERQp9LiLoK5RmNYCIEydfGM7+qmgoxofSq5e2hQtH2 SZM1XilzsZctRbBbhMit1qDBqMlr/XAy/R5FO0GauETVKTaBhgtj6mZGyeC9nU/+ RGDljaArbrOzRwMtSuXF+Fp6uVo5spyRn1m8UT/k19lUTdrV9z6EX5Fzuc4Mnhed oz4iokbl/n8pDObXKauQspPA46QpxUYhrAs10B/ELc3yyp/Qj3jOfzYHKDNFCUOq HC9mU+YiO9g2TbYgCrrFM6Dah2E8fU6/cR0ZPMeMgWK4tKa+6JMEINYEwak9e7M+ 8lZnvu3ntxiJLN+PrPkiPyG+XBh2sux1UfvNQ+nw4Oi9xaydeX7PCbQVWmzTFmHD q7UPQ8220e2JNCha9pULS8cxDLxiSksce06DQrGXwnHc1Ir7T04= =0DjE -----END PGP SIGNATURE----- Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux Pull arm64 updates from Catalin Marinas: - Initial support for the ARMv9 Scalable Matrix Extension (SME). SME takes the approach used for vectors in SVE and extends this to provide architectural support for matrix operations. No KVM support yet, SME is disabled in guests. - Support for crashkernel reservations above ZONE_DMA via the 'crashkernel=X,high' command line option. - btrfs search_ioctl() fix for live-lock with sub-page faults. - arm64 perf updates: support for the Hisilicon "CPA" PMU for monitoring coherent I/O traffic, support for Arm's CMN-650 and CMN-700 interconnect PMUs, minor driver fixes, kerneldoc cleanup. - Kselftest updates for SME, BTI, MTE. - Automatic generation of the system register macros from a 'sysreg' file describing the register bitfields. - Update the type of the function argument holding the ESR_ELx register value to unsigned long to match the architecture register size (originally 32-bit but extended since ARMv8.0). - stacktrace cleanups. - ftrace cleanups. - Miscellaneous updates, most notably: arm64-specific huge_ptep_get(), avoid executable mappings in kexec/hibernate code, drop TLB flushing from get_clear_flush() (and rename it to get_clear_contig()), ARCH_NR_GPIO bumped to 2048 for ARCH_APPLE. * tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/arm64/linux: (145 commits) arm64/sysreg: Generate definitions for FAR_ELx arm64/sysreg: Generate definitions for DACR32_EL2 arm64/sysreg: Generate definitions for CSSELR_EL1 arm64/sysreg: Generate definitions for CPACR_ELx arm64/sysreg: Generate definitions for CONTEXTIDR_ELx arm64/sysreg: Generate definitions for CLIDR_EL1 arm64/sve: Move sve_free() into SVE code section arm64: Kconfig.platforms: Add comments arm64: Kconfig: Fix indentation and add comments arm64: mm: avoid writable executable mappings in kexec/hibernate code arm64: lds: move special code sections out of kernel exec segment arm64/hugetlb: Implement arm64 specific huge_ptep_get() arm64/hugetlb: Use ptep_get() to get the pte value of a huge page arm64: kdump: Do not allocate crash low memory if not needed arm64/sve: Generate ZCR definitions arm64/sme: Generate defintions for SVCR arm64/sme: Generate SMPRI_EL1 definitions arm64/sme: Automatically generate SMPRIMAP_EL2 definitions arm64/sme: Automatically generate SMIDR_EL1 defines arm64/sme: Automatically generate defines for SMCR ... |
||
Juerg Haefliger
|
aea3cb356c |
arm64: Kconfig.platforms: Add comments
Add trailing comments to endmenu statements for better readability. Signed-off-by: Juerg Haefliger <juergh@canonical.com> Link: https://lore.kernel.org/r/20220517141648.331976-3-juergh@canonical.com Signed-off-by: Catalin Marinas <catalin.marinas@arm.com> |
||
Samuel Holland
|
d421fd6d1f |
irqchip: Add Kconfig symbols for sunxi drivers
Not all of these drivers are needed on every ARCH_SUNXI platform. In particular, the ARCH_SUNXI symbol will be reused for the Allwinner D1, a RISC-V SoC which contains none of these irqchips. Introduce Kconfig symbols so we can select only the drivers actually used by a particular set of platforms. This also lets us move the irqchip driver dependencies to a more appropriate location. Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20220509034941.30704-1-samuel@sholland.org |
||
Daniel Thompson
|
4efc851c36 |
irqchip/exiu: Fix acknowledgment of edge triggered interrupts
Currently the EXIU uses the fasteoi interrupt flow that is configured by
it's parent (irq-gic-v3.c). With this flow the only chance to clear the
interrupt request happens during .irq_eoi() and (obviously) this happens
after the interrupt handler has run. EXIU requires edge triggered
interrupts to be acked prior to interrupt handling. Without this we
risk incorrect interrupt dismissal when a new interrupt is delivered
after the handler reads and acknowledges the peripheral but before the
irq_eoi() takes place.
Fix this by clearing the interrupt request from .irq_ack() if we are
configured for edge triggered interrupts. This requires adopting the
fasteoi-ack flow instead of the fasteoi to ensure the ack gets called.
These changes have been tested using the power button on a
Developerbox/SC2A11 combined with some hackery in gpio-keys so I can
play with the different trigger mode [and an mdelay(500) so I can
can check what happens on a double click in both modes].
Fixes:
|
||
|
Linus Torvalds
|
ed4643521e |
ARM: DT updates for 5.18
After a somewhat quiet 5.17 release, the size of the DT changes
is a bit larger again. There are nine new SoC that get added,
all of them related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the
LG Nexus 5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs,
along with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC losely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added all
over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91, Allwinner,
i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)
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Merge tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM devicetree updates from Arnd Bergmann:
"After a somewhat quiet 5.17 release, the size of the DT changes is a
bit larger again. There are nine new SoC that get added, all of them
related to existing platforms:
- Airoha (formerly Mediatek/EcoNet) EN7523 networking SoC and EVB
- Mediatek mt6582 tablet platform with the Prestigio PMT5008 3G
tablet
- Microchip Lan966 networking SoC and it evaluation board
- Qualcomm Snapdragon 625/632 midrange phone SoCs, with the LG Nexus
5X and Fairphone FP3 phones
- Renesas RZ/G2LC and RZ/V2L general-purpose embedded SoCs, along
with their evaluation boards
- Samsung Exynos 850 phone SoC and reference board
- Samsung Exynos7885 with the Samsung Galaxy A8 (2018) phone
- Tesla FSD (Fully Self-Driving), an automotive SoC loosely derived
from the Samsung Exynos family.
- TI K3/AM62 SoC and reference board
Support for additional functionality in existing dts files is added
all over the place: Samsung, Renesas, Mstar, wpcm450, OMAP, AT91,
Allwinner, i.MX, Tegra, Aspeed, Oxnas, Qualcomm, Mediatek, and
Broadcom.
Samsung has a rework for its pinctrl schema that is a bit tricky and
requires driver changes to be included here.
A few more platforms only have smaller cleanups and DT Schema fixes,
this includes SoCFPGA, ux500, ixp4xx, STi, Xilinx Zynq, LG, and Juno.
The new machines are really too many to list, but I'll do it anyway:
Allwinner:
- A20-Marsboard development board
Amlogic:
- Amediatek X96-AIR (Amlogic S905X3)
- CYX A95XF3-AIR (Amlogic S905X3)
- Haochuangy H96-Max (Amlogic S905X3)
- Amlogic AQ222 (Amlogic S4)
- OSMC Vero 4K+ (Amlogic S905D)
Arm Juno:
- Separate DT depending on SCMI firmware version
Aspeed:
- Quanta S6Q BMC (AST2600)
- ASRock ROMED8HM3 (AST2500)
Broadcom:
- Raspberry Pi Zero 2 W
Marvell MVEBU/Armada:
- Ctera C200 V1 NAS (kirkwood)
- Ctera C200 V2 NAS (armada-370)
Mstar:
- DongShanPiOne, a low-end embedded board
- Miyoo Mini handheld game console
NXP i.MX:
- Numerous i.MX8M Mini based boards in even more variations, but
none based on other SoCs this time:
Protonic PRT8MM, emCON-MX8M Mini, Toradex Verdin, and
Gateworks GW7903
Qualcomm:
- Google Herobrine R1 Chromebook platform (Snapdragon 7c Gen 3)
- SHIFT6mq phone (Snapdragon 845)
- Samsung Galaxy Book2 (Snapdragon 850)
- Snapdragon 8 Gen 1 Hardware Development Kit
TI OMAP:
- SanCloud BeagleBone Enhanced WiFi
Rockchip:
- Pine64 PineNote ereader tablet (rk356x)
- Bananapi-R2-Pro (rk356x)
STM32:
- emtrion emSBS-Argon embedded board (stm32mp157c)"
* tag 'arm-dt-5.18' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (627 commits)
arm64: dts: n5x: drop invalid property and fix edac node name
arm64: dts: fsd: Add the MCT support
arm64: dts: stingray: Fix spi clock name
arm64: dts: ns2: Fix spi clock name
ARM: dts: rockchip: Update regulator name for PX3
ARM: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Add #clock-cells value for rk805
arm64: dts: rockchip: Remove vcc13 and vcc14 for rk808
arm64: dts: rockchip: Fix SDIO regulator supply properties on rk3399-firefly
ARM: dts: at91: sama7g5: Add NAND support
ARM: dts: at91: sama7g5: add eic node
ARM: dts: at91: sama7g5: Remove unused properties in i2c nodes
ARM: dts: at91: sam9x60ek: modify vdd_1v5 regulator to vdd_1v15
arm64: dts: lg: align pl330 node name with dtschema
arm64: dts: lg: add dma-cells to pl330 node
arm64: dts: juno: align pl330 node name with dtschema
arm64: dts: broadcom: Fix sata nodename
arm64: dts: n5x: add sdr edac support
arm64: dts: agilex/stratix10: add clock-names to USB DWC2 node
dt-bindings: usb: dwc2: add disable-over-current
...
|
||
Geert Uytterhoeven
|
1830947ee4
|
arm64: Remove ARCH_VULCAN
Commit |
||
Alim Akhtar
|
18b1db6a16 |
arm64: dts: fsd: Add initial device tree support
Add initial device tree support for "Full Self-Driving" (FSD) SoC This SoC contain three clusters of four cortex-a72 CPUs and various peripheral IPs. Cc: linux-fsd@tesla.com Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Arjun K V <arjun.kv@samsung.com> Signed-off-by: Aswani Reddy <aswani.reddy@samsung.com> Signed-off-by: Ajay Kumar <ajaykumar.rs@samsung.com> Signed-off-by: Sriranjani P <sriranjani.p@samsung.com> Signed-off-by: Chandrasekar R <rcsekar@samsung.com> Signed-off-by: Shashank Prashar <s.prashar@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220124141644.71052-15-alim.akhtar@samsung.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> |
||
|
Linus Torvalds
|
1135ec008e |
ARM: SoC updates for v5.17
These are all minor bug fixes and cleanups to code in arch/arm and
arch/arm64 that is specific to one SoC, updating Kconfig symbols,
the MAINTAINERS file, and removing some dead code.
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Merge tag 'soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC updates from Arnd Bergmann:
"These are all minor bug fixes and cleanups to code in arch/arm and
arch/arm64 that is specific to one SoC, updating Kconfig symbols, the
MAINTAINERS file, and removing some dead code"
* tag 'soc-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc:
arm64: exynos: Enable Exynos Multi-Core Timer driver
ARM: ixp4xx: remove unused header file pata_ixp4xx_cf.h
ARM: ixp4xx: remove dead configs CPU_IXP43X and CPU_IXP46X
MAINTAINERS: Add Florian as BCM5301X and BCM53573 maintainer
ARM: samsung: Remove HAVE_S3C2410_I2C and use direct dependencies
ARM: imx: rename DEBUG_IMX21_IMX27_UART to DEBUG_IMX27_UART
ARM: imx: remove dead left-over from i.MX{27,31,35} removal
ARM: s3c: add one more "fallthrough" statement in Jive
ARM: s3c: include header for prototype of s3c2410_modify_misccr
ARM: shmobile: rcar-gen2: Add missing of_node_put()
|
||
Marek Szyprowski
|
ce96a96468 |
arm64: exynos: Enable Exynos Multi-Core Timer driver
Some ARM64 Exynos SoCs have MCT timer block, e.g. Exynos850 and
Exynos5433. CLKSRC_EXYNOS_MCT option is not visible unless COMPILE_TEST
is enabled. Select CLKSRC_EXYNOS_MCT option for ARM64 ARCH_EXYNOS like
it's done in arch/arm/mach-exynos/Kconfig, to enable MCT timer support
for ARM64 Exynos SoCs.
Even though ARM architected timer is available on all ARM64 SoCs, and
used for managing timer hardware and clock source events, MCT timer
still can be used as a wakeup source, as stated in commitae460fd9164b
("clocksource/drivers/exynos_mct: Prioritise Arm arch timer on arm64").
It's also nice to be able to test available MCT IP-core.
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
Tested-by: Chanwoo Choi <cw00.choi@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Reviewed-by: Chanwoo Choi <cw00.choi@samsung.com>
Link: https://lore.kernel.org/r/20211101193531.15078-3-semen.protsenko@linaro.org
Link: https://lore.kernel.org/r/20211220165004.17005-2-krzysztof.kozlowski@canonical.com'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
||
Jerome Brunet
|
5ad77b1272 |
arm64: meson: remove COMMON_CLK
This reverts commit aea7a80ad5effd48f44a7a08c3903168be038a43. Selecting COMMON_CLK is not necessary, it is already selected by CONFIG_ARM64 Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Reviewed-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210609202009.1424879-1-jbrunet@baylibre.com |
||
|
Linus Torvalds
|
d461e96cd2 |
ARM: SoC drivers for 5.16
These are all the driver updates for SoC specific drivers. There
are a couple of subsystems with individual maintainers picking up
their patches here:
- The reset controller subsystem add support for a few new SoC
variants to existing drivers, along with other minor improvements
- The OP-TEE subsystem gets a driver for the ARM FF-A transport
- The memory controller subsystem has improvements for Tegra,
Mediatek, Renesas, Freescale and Broadcom specific drivers.
- The tegra cpuidle driver changes get merged through this
tree this time. There are only minor changes, but they depend
on other tegra driver updates here.
- The ep93xx platform finally moves to using the drivers/clk/
subsystem, moving the code out of arch/arm in the process.
This depends on a small sound driver change that is included
here as well.
- There are some minor updates for Qualcomm and Tegra specific
firmware drivers.
The other driver updates are mainly for drivers/soc, which contains
a mixture of vendor specific drivers that don't really fit elsewhere:
- Mediatek drivers gain more support for MT8192, with new support for
hw-mutex and mmsys routing, plus support for reset lines in the
mmsys driver.
- Qualcomm gains a new "sleep stats" driver, and support for
the "Generic Packet Router" in the APR driver.
- There is a new user interface for routing the UARTS on ASpeed
BMCs, something that apparently nobody else has needed so far.
- More drivers can now be built as loadable modules, in particular
for Broadcom and Samsung platforms.
- Lots of improvements to the TI sysc driver for better suspend/resume
support
Finally, there are lots of minor cleanups and new device IDs for
amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx, layerscape,
allwinner, broadcom, and omap.
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Merge tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC driver updates from Arnd Bergmann:
"These are all the driver updates for SoC specific drivers. There are a
couple of subsystems with individual maintainers picking up their
patches here:
- The reset controller subsystem add support for a few new SoC
variants to existing drivers, along with other minor improvements
- The OP-TEE subsystem gets a driver for the ARM FF-A transport
- The memory controller subsystem has improvements for Tegra,
Mediatek, Renesas, Freescale and Broadcom specific drivers.
- The tegra cpuidle driver changes get merged through this tree this
time. There are only minor changes, but they depend on other tegra
driver updates here.
- The ep93xx platform finally moves to using the drivers/clk/
subsystem, moving the code out of arch/arm in the process. This
depends on a small sound driver change that is included here as
well.
- There are some minor updates for Qualcomm and Tegra specific
firmware drivers.
The other driver updates are mainly for drivers/soc, which contains a
mixture of vendor specific drivers that don't really fit elsewhere:
- Mediatek drivers gain more support for MT8192, with new support for
hw-mutex and mmsys routing, plus support for reset lines in the
mmsys driver.
- Qualcomm gains a new "sleep stats" driver, and support for the
"Generic Packet Router" in the APR driver.
- There is a new user interface for routing the UARTS on ASpeed BMCs,
something that apparently nobody else has needed so far.
- More drivers can now be built as loadable modules, in particular
for Broadcom and Samsung platforms.
- Lots of improvements to the TI sysc driver for better
suspend/resume support"
Finally, there are lots of minor cleanups and new device IDs for
amlogic, renesas, tegra, qualcomm, mediateka, samsung, imx,
layerscape, allwinner, broadcom, and omap"
* tag 'drivers-5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (179 commits)
optee: Fix spelling mistake "reclain" -> "reclaim"
Revert "firmware: qcom: scm: Add support for MC boot address API"
qcom: spm: allow compile-testing
firmware: arm_ffa: Remove unused 'compat_version' variable
soc: samsung: exynos-chipid: add exynosautov9 SoC support
firmware: qcom: scm: Don't break compile test on non-ARM platforms
soc: qcom: smp2p: Add of_node_put() before goto
soc: qcom: apr: Add of_node_put() before return
soc: qcom: qcom_stats: Fix client votes offset
soc: qcom: rpmhpd: fix sm8350_mxc's peer domain
dt-bindings: arm: cpus: Document qcom,msm8916-smp enable-method
ARM: qcom: Add qcom,msm8916-smp enable-method identical to MSM8226
firmware: qcom: scm: Add support for MC boot address API
soc: qcom: spm: Add 8916 SPM register data
dt-bindings: soc: qcom: spm: Document qcom,msm8916-saw2-v3.0-cpu
soc: qcom: socinfo: Add PM8150C and SMB2351 models
firmware: qcom_scm: Fix error retval in __qcom_scm_is_call_available()
soc: aspeed: Add UART routing support
soc: fsl: dpio: rename the enqueue descriptor variable
soc: fsl: dpio: use an explicit NULL instead of 0
...
|
||
|
Florian Fainelli
|
9db71e8966 |
arm64: broadcom: Removed forced select of interrupt controllers
Now that the various second level interrupt controllers have been moved to IRQCHIP_PLATFORM_DRIVER and they do default to ARCH_BRCMSTB and ARCH_BCM2835 where relevant, remove their forced selection from the machine entry to allow an user to build them as modules. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20211020184859.2705451-12-f.fainelli@gmail.com |