mirror of
https://github.com/torvalds/linux.git
synced 2024-11-15 08:31:55 +00:00
Merge branch 'pci/ctrl/exynos'
- Move samsung phy-exynos-pcie init all to exynos5433_pcie_phy_init() instead of splitting across phy_init() and phy_power_on() (Marek Szyprowski) - Call phy_init() before phy_power_on() for samsung phy-exynos-pcie, as required by the PHY programming model (Marek Szyprowski) * pci/ctrl/exynos: PCI: exynos: Correct generic PHY usage phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacks
This commit is contained in:
commit
fea77e9f29
@ -258,9 +258,8 @@ static int exynos_pcie_host_init(struct dw_pcie_rp *pp)
|
||||
|
||||
exynos_pcie_assert_core_reset(ep);
|
||||
|
||||
phy_reset(ep->phy);
|
||||
phy_power_on(ep->phy);
|
||||
phy_init(ep->phy);
|
||||
phy_power_on(ep->phy);
|
||||
|
||||
exynos_pcie_deassert_core_reset(ep);
|
||||
exynos_pcie_enable_irq_pulse(ep);
|
||||
|
@ -51,6 +51,13 @@ static int exynos5433_pcie_phy_init(struct phy *phy)
|
||||
{
|
||||
struct exynos_pcie_phy *ep = phy_get_drvdata(phy);
|
||||
|
||||
regmap_update_bits(ep->pmureg, EXYNOS5433_PMU_PCIE_PHY_OFFSET,
|
||||
BIT(0), 1);
|
||||
regmap_update_bits(ep->fsysreg, PCIE_EXYNOS5433_PHY_GLOBAL_RESET,
|
||||
PCIE_APP_REQ_EXIT_L1_MODE, 0);
|
||||
regmap_update_bits(ep->fsysreg, PCIE_EXYNOS5433_PHY_L1SUB_CM_CON,
|
||||
PCIE_REFCLK_GATING_EN, 0);
|
||||
|
||||
regmap_update_bits(ep->fsysreg, PCIE_EXYNOS5433_PHY_COMMON_RESET,
|
||||
PCIE_PHY_RESET, 1);
|
||||
regmap_update_bits(ep->fsysreg, PCIE_EXYNOS5433_PHY_MAC_RESET,
|
||||
@ -109,20 +116,7 @@ static int exynos5433_pcie_phy_init(struct phy *phy)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int exynos5433_pcie_phy_power_on(struct phy *phy)
|
||||
{
|
||||
struct exynos_pcie_phy *ep = phy_get_drvdata(phy);
|
||||
|
||||
regmap_update_bits(ep->pmureg, EXYNOS5433_PMU_PCIE_PHY_OFFSET,
|
||||
BIT(0), 1);
|
||||
regmap_update_bits(ep->fsysreg, PCIE_EXYNOS5433_PHY_GLOBAL_RESET,
|
||||
PCIE_APP_REQ_EXIT_L1_MODE, 0);
|
||||
regmap_update_bits(ep->fsysreg, PCIE_EXYNOS5433_PHY_L1SUB_CM_CON,
|
||||
PCIE_REFCLK_GATING_EN, 0);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int exynos5433_pcie_phy_power_off(struct phy *phy)
|
||||
static int exynos5433_pcie_phy_exit(struct phy *phy)
|
||||
{
|
||||
struct exynos_pcie_phy *ep = phy_get_drvdata(phy);
|
||||
|
||||
@ -135,8 +129,7 @@ static int exynos5433_pcie_phy_power_off(struct phy *phy)
|
||||
|
||||
static const struct phy_ops exynos5433_phy_ops = {
|
||||
.init = exynos5433_pcie_phy_init,
|
||||
.power_on = exynos5433_pcie_phy_power_on,
|
||||
.power_off = exynos5433_pcie_phy_power_off,
|
||||
.exit = exynos5433_pcie_phy_exit,
|
||||
.owner = THIS_MODULE,
|
||||
};
|
||||
|
||||
|
Loading…
Reference in New Issue
Block a user