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Merge branch 'mlx5-misc-fixes-2024-07-30'
Tariq Toukan says: ==================== mlx5 misc fixes 2024-07-30 This patchset provides misc bug fixes from the team to the mlx5 core and Eth drivers. ==================== Link: https://patch.msgid.link/20240730061638.1831002-1-tariqt@nvidia.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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commit
fe16667f29
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@ -932,6 +932,7 @@ err_rule:
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mlx5_tc_ct_entry_destroy_mod_hdr(ct_priv, zone_rule->attr, mh);
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mlx5_put_label_mapping(ct_priv, attr->ct_attr.ct_labels_id);
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err_mod_hdr:
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*attr = *old_attr;
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kfree(old_attr);
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err_attr:
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kvfree(spec);
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@ -51,9 +51,10 @@ u32 mlx5_ipsec_device_caps(struct mlx5_core_dev *mdev)
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MLX5_CAP_FLOWTABLE_NIC_RX(mdev, decap))
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caps |= MLX5_IPSEC_CAP_PACKET_OFFLOAD;
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if ((MLX5_CAP_FLOWTABLE_NIC_TX(mdev, ignore_flow_level) &&
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MLX5_CAP_FLOWTABLE_NIC_RX(mdev, ignore_flow_level)) ||
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MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, ignore_flow_level))
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if (IS_ENABLED(CONFIG_MLX5_CLS_ACT) &&
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((MLX5_CAP_FLOWTABLE_NIC_TX(mdev, ignore_flow_level) &&
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MLX5_CAP_FLOWTABLE_NIC_RX(mdev, ignore_flow_level)) ||
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MLX5_CAP_ESW_FLOWTABLE_FDB(mdev, ignore_flow_level)))
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caps |= MLX5_IPSEC_CAP_PRIO;
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if (MLX5_CAP_FLOWTABLE_NIC_TX(mdev,
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@ -1409,7 +1409,12 @@ static int mlx5e_ethtool_set_link_ksettings(struct mlx5e_priv *priv,
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if (!an_changes && link_modes == eproto.admin)
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goto out;
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mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
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err = mlx5_port_set_eth_ptys(mdev, an_disable, link_modes, ext);
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if (err) {
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netdev_err(priv->netdev, "%s: failed to set ptys reg: %d\n", __func__, err);
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goto out;
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}
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mlx5_toggle_port_link(mdev);
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out:
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@ -207,6 +207,7 @@ int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev)
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static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev, bool unloaded)
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{
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struct mlx5_fw_reset *fw_reset = dev->priv.fw_reset;
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struct devlink *devlink = priv_to_devlink(dev);
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/* if this is the driver that initiated the fw reset, devlink completed the reload */
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if (test_bit(MLX5_FW_RESET_FLAGS_PENDING_COMP, &fw_reset->reset_flags)) {
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@ -218,9 +219,11 @@ static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev, bool unload
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mlx5_core_err(dev, "reset reload flow aborted, PCI reads still not working\n");
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else
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mlx5_load_one(dev, true);
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devlink_remote_reload_actions_performed(priv_to_devlink(dev), 0,
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devl_lock(devlink);
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devlink_remote_reload_actions_performed(devlink, 0,
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BIT(DEVLINK_RELOAD_ACTION_DRIVER_REINIT) |
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BIT(DEVLINK_RELOAD_ACTION_FW_ACTIVATE));
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devl_unlock(devlink);
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}
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}
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@ -48,6 +48,7 @@ static struct mlx5_irq *
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irq_pool_request_irq(struct mlx5_irq_pool *pool, struct irq_affinity_desc *af_desc)
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{
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struct irq_affinity_desc auto_desc = {};
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struct mlx5_irq *irq;
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u32 irq_index;
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int err;
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@ -64,9 +65,12 @@ irq_pool_request_irq(struct mlx5_irq_pool *pool, struct irq_affinity_desc *af_de
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else
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cpu_get(pool, cpumask_first(&af_desc->mask));
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}
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return mlx5_irq_alloc(pool, irq_index,
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cpumask_empty(&auto_desc.mask) ? af_desc : &auto_desc,
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NULL);
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irq = mlx5_irq_alloc(pool, irq_index,
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cpumask_empty(&auto_desc.mask) ? af_desc : &auto_desc,
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NULL);
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if (IS_ERR(irq))
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xa_erase(&pool->irqs, irq_index);
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return irq;
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}
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/* Looking for the IRQ with the smallest refcount that fits req_mask.
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@ -1538,7 +1538,7 @@ u8 mlx5_lag_get_slave_port(struct mlx5_core_dev *dev,
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goto unlock;
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for (i = 0; i < ldev->ports; i++) {
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if (ldev->pf[MLX5_LAG_P1].netdev == slave) {
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if (ldev->pf[i].netdev == slave) {
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port = i;
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break;
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}
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@ -2142,7 +2142,6 @@ static int mlx5_try_fast_unload(struct mlx5_core_dev *dev)
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/* Panic tear down fw command will stop the PCI bus communication
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* with the HCA, so the health poll is no longer needed.
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*/
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mlx5_drain_health_wq(dev);
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mlx5_stop_health_poll(dev, false);
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ret = mlx5_cmd_fast_teardown_hca(dev);
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@ -2177,6 +2176,7 @@ static void shutdown(struct pci_dev *pdev)
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mlx5_core_info(dev, "Shutdown was called\n");
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set_bit(MLX5_BREAK_FW_WAIT, &dev->intf_state);
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mlx5_drain_health_wq(dev);
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err = mlx5_try_fast_unload(dev);
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if (err)
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mlx5_unload_one(dev, false);
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@ -112,6 +112,7 @@ static void mlx5_sf_dev_shutdown(struct auxiliary_device *adev)
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struct mlx5_core_dev *mdev = sf_dev->mdev;
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set_bit(MLX5_BREAK_FW_WAIT, &mdev->intf_state);
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mlx5_drain_health_wq(mdev);
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mlx5_unload_one(mdev, false);
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}
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@ -7,7 +7,7 @@
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/* don't try to optimize STE allocation if the stack is too constaraining */
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#define DR_RULE_MAX_STES_OPTIMIZED 0
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#else
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#define DR_RULE_MAX_STES_OPTIMIZED 5
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#define DR_RULE_MAX_STES_OPTIMIZED 2
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#endif
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#define DR_RULE_MAX_STE_CHAIN_OPTIMIZED (DR_RULE_MAX_STES_OPTIMIZED + DR_ACTION_MAX_STES)
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