Devicetree fixes for the 6.7-cycle.

All over the place this time. From adapting the size of the vdec nodes
 on rk3328 and rk3399, fixing some wrong pinctrl settings on rk3128 and
 the Turing RK1 board, emmc-settings fixes on rk3588 and interrupt-name
 mishaps, down to some dt-cleanups.
 
 Also this adds the missing rockchip,rk3588-pmugrf compatible to the soc
 grf binding, that I somehow messed up during the pull requests for the
 -rc1 . At least with it included the dt-checker is happier.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmVyLSQQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgUk0CACba9tJmqxTLFf3y7jszGMf3N0ziIX8Hson
 6WSqbrkKJDzbUMYP+LO+yd0Bi8i0h2hC0XY0COnuvPS/JvWAsVrKNeoAri0XbjAr
 uoULhiFC79+JKBM8u05RIel/gR+nrCX+fm7ZX42/80TeCe9u7xnI9mF6xjwPcqdS
 XXWUboj1YOBu5x9VfqYK4ZoH160ggE612aX50tsWAoFGSPw9AatAz+TyuCN4T3Fw
 UoTIAF2z0m46mUFkTDw8jhpqNAE5nXYQsJ3EqrDZoXmCNRG7P4L+n3yhZ/hJfWDZ
 uagsKbj75eUbq1FhTlOJLK3wspK1ea1JAGemPnzk1hVHSNfXjzsu
 =xEds
 -----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmVyx3kACgkQYKtH/8kJ
 UicKOhAAusHCVBwaZ5lx2SNE0xQE5TWmtdgNzmblr1BaBwWoQB261YY1RwvTzFXm
 PfkFRNk8ZdBJxBUrrs/3cKiYcTptgp0hBVAozlHwuhgtWftKFnWjLk40a8OsVolZ
 1pzPEIoVK3t81WwwiScLyJK5d2j4ecZvJJDPVbUpEjGZ0FNEY8vA2qfzm6TdXzEQ
 juEBrZT7T+Jge8WcTW2pwOfNqhqDvfMN7cPxuGWKfDOxa6TXuEkE6hTfhR5fG2Ds
 o4NqjBitxM4Kewlc2tY+dG6t+J1V5rZ+pNHSXvWtE9ETMWasW90dOzgLiWe7uIAq
 goB9wS1E0znZqJn5jq3w5xHBossYbRnuJRRyYNmE8na4b6D+qqgFpV3kZdGymcKa
 DpeSEeuYHY92p1ro5tI+9ZCugGBVjbbbPkuKk/3VkTplS+GIuI89CRSj7cAYVxub
 AKfEIEK/D/Y0hI+hgeudjlgAUwEM+k1D46EDFXbx7dhS5LZKz4zdvmpHVo68Ecjg
 cfNtPjrsIEsPHk2v/H+ywQJGO2mncjOJoedirjDNkIxbRXDRsv3ErG1xOaM4YD/F
 EdMGF0uWzgu1f2Y/2QW2ni1aK9YZU1vz21woFC/UHmFD1RCUca6eBx7XcJt0R8FC
 V7CPjqCsCHQ6VqLfBhpXU6ulpDkqpoq1XkkwD9hjMDOu2zYE9F4=
 =YVAn
 -----END PGP SIGNATURE-----

Merge tag 'v6.7-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/fixes

Devicetree fixes for the 6.7-cycle.

All over the place this time. From adapting the size of the vdec nodes
on rk3328 and rk3399, fixing some wrong pinctrl settings on rk3128 and
the Turing RK1 board, emmc-settings fixes on rk3588 and interrupt-name
mishaps, down to some dt-cleanups.

Also this adds the missing rockchip,rk3588-pmugrf compatible to the soc
grf binding, that I somehow messed up during the pull requests for the
-rc1 . At least with it included the dt-checker is happier.

* tag 'v6.7-rockchip-dtsfixes1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: dts: rockchip: Fix eMMC Data Strobe PD on rk3588
  arm64: dts: rockchip: Fix PCI node addresses on rk3399-gru
  arm64: dts: rockchip: drop interrupt-names property from rk3588s dfi
  arm64: dts: rockchip: Fix Turing RK1 interrupt pinctrls
  ARM: dts: rockchip: Fix sdmmc_pwren's pinmux setting for RK3128
  arm64: dts: rockchip: minor whitespace cleanup around '='
  ARM: dts: rockchip: minor whitespace cleanup around '='
  dt-bindings: soc: rockchip: grf: add rockchip,rk3588-pmugrf
  arm64: dts: rockchip: fix rk356x pcie msg interrupt name
  arm64: dts: rockchip: Expand reg size of vdec node for RK3399
  arm64: dts: rockchip: Expand reg size of vdec node for RK3328

Link: https://lore.kernel.org/r/2709704.mvXUDI8C0e@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann 2023-12-08 08:36:17 +01:00
commit fd1e5745f8
14 changed files with 20 additions and 18 deletions

View File

@ -233,6 +233,7 @@ allOf:
- rockchip,rk3399-grf
- rockchip,rk3399-pmugrf
- rockchip,rk3568-pmugrf
- rockchip,rk3588-pmugrf
- rockchip,rv1108-grf
- rockchip,rv1108-pmugrf

View File

@ -848,7 +848,7 @@
};
sdmmc_pwren: sdmmc-pwren {
rockchip,pins = <1 RK_PB6 1 &pcfg_pull_default>;
rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_default>;
};
sdmmc_bus4: sdmmc-bus4 {

View File

@ -215,9 +215,9 @@
power-domain@RK3228_PD_VOP {
reg = <RK3228_PD_VOP>;
clocks =<&cru ACLK_VOP>,
<&cru DCLK_VOP>,
<&cru HCLK_VOP>;
clocks = <&cru ACLK_VOP>,
<&cru DCLK_VOP>,
<&cru HCLK_VOP>;
pm_qos = <&qos_vop>;
#power-domain-cells = <0>;
};

View File

@ -86,7 +86,7 @@
sgtl5000_clk: sgtl5000-oscillator {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <24576000>;
clock-frequency = <24576000>;
};
dc_12v: dc-12v-regulator {

View File

@ -668,7 +668,7 @@
vdec: video-codec@ff360000 {
compatible = "rockchip,rk3328-vdec", "rockchip,rk3399-vdec";
reg = <0x0 0xff360000 0x0 0x400>;
reg = <0x0 0xff360000 0x0 0x480>;
interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>,
<&cru SCLK_VDEC_CABAC>, <&cru SCLK_VDEC_CORE>;

View File

@ -509,8 +509,7 @@ ap_i2c_tp: &i2c5 {
&pci_rootport {
mvl_wifi: wifi@0,0 {
compatible = "pci1b4b,2b42";
reg = <0x83010000 0x0 0x00000000 0x0 0x00100000
0x83010000 0x0 0x00100000 0x0 0x00100000>;
reg = <0x0000 0x0 0x0 0x0 0x0>;
interrupt-parent = <&gpio0>;
interrupts = <8 IRQ_TYPE_LEVEL_LOW>;
pinctrl-names = "default";

View File

@ -34,8 +34,8 @@
&pci_rootport {
wifi@0,0 {
compatible = "qcom,ath10k";
reg = <0x00010000 0x0 0x00000000 0x0 0x00000000>,
<0x03010010 0x0 0x00000000 0x0 0x00200000>;
reg = <0x00000000 0x0 0x00000000 0x0 0x00000000>,
<0x03000010 0x0 0x00000000 0x0 0x00200000>;
qcom,ath10k-calibration-variant = "GO_DUMO";
};
};

View File

@ -489,6 +489,7 @@ ap_i2c_audio: &i2c8 {
#address-cells = <3>;
#size-cells = <2>;
ranges;
device_type = "pci";
};
};

View File

@ -1109,7 +1109,9 @@
power-domain@RK3399_PD_VDU {
reg = <RK3399_PD_VDU>;
clocks = <&cru ACLK_VDU>,
<&cru HCLK_VDU>;
<&cru HCLK_VDU>,
<&cru SCLK_VDU_CA>,
<&cru SCLK_VDU_CORE>;
pm_qos = <&qos_video_m1_r>,
<&qos_video_m1_w>;
#power-domain-cells = <0>;
@ -1384,7 +1386,7 @@
vdec: video-codec@ff660000 {
compatible = "rockchip,rk3399-vdec";
reg = <0x0 0xff660000 0x0 0x400>;
reg = <0x0 0xff660000 0x0 0x480>;
interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&cru ACLK_VDU>, <&cru HCLK_VDU>,
<&cru SCLK_VDU_CA>, <&cru SCLK_VDU_CORE>;

View File

@ -977,7 +977,7 @@
<GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "sys", "pmc", "msi", "legacy", "err";
interrupt-names = "sys", "pmc", "msg", "legacy", "err";
bus-range = <0x0 0xf>;
clocks = <&cru ACLK_PCIE20_MST>, <&cru ACLK_PCIE20_SLV>,
<&cru ACLK_PCIE20_DBI>, <&cru PCLK_PCIE20>,

View File

@ -235,13 +235,13 @@
&pinctrl {
fan {
fan_int: fan-int {
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
};
};
hym8563 {
hym8563_int: hym8563-int {
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
};
};

View File

@ -38,7 +38,7 @@
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 =<&leds_gpio>;
pinctrl-0 = <&leds_gpio>;
led-1 {
gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;

View File

@ -369,7 +369,7 @@
emmc_data_strobe: emmc-data-strobe {
rockchip,pins =
/* emmc_data_strobe */
<2 RK_PA2 1 &pcfg_pull_none>;
<2 RK_PA2 1 &pcfg_pull_down>;
};
};

View File

@ -1362,7 +1362,6 @@
<GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH 0>,
<GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH 0>;
interrupt-names = "ch0", "ch1", "ch2", "ch3";
rockchip,pmu = <&pmu1grf>;
};