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pinctrl: renesas: checker: Add reserved field checks
Add checks for discovering registers with reserved fields that could benefit from being described using variable-width reserved field shorthands, reducing kernel size. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/f5a5159ba7b396e6f09dd3f23c864a74ed8e342d.1649865241.git.geert+renesas@glider.be
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@ -877,7 +877,7 @@ static const struct sh_pfc_pin __init *sh_pfc_find_pin(
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static void __init sh_pfc_check_cfg_reg(const char *drvname,
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const struct pinmux_cfg_reg *cfg_reg)
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{
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unsigned int i, n, rw;
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unsigned int i, n, rw, r;
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int fw;
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sh_pfc_check_reg(drvname, cfg_reg->reg,
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@ -886,6 +886,15 @@ static void __init sh_pfc_check_cfg_reg(const char *drvname,
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if (cfg_reg->field_width) {
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fw = cfg_reg->field_width;
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n = (cfg_reg->reg_width / fw) << fw;
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for (i = 0, r = 0; i < n; i += 1 << fw) {
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if (is0s(&cfg_reg->enum_ids[i], 1 << fw))
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r++;
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}
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if ((r << fw) * sizeof(u16) > cfg_reg->reg_width / fw)
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sh_pfc_warn("reg 0x%x can be described with variable-width reserved fields\n",
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cfg_reg->reg);
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/* Skip field checks (done at build time) */
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goto check_enum_ids;
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}
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