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Merge branches 'sh/compressors' and 'sh/stable-updates'

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This commit is contained in:
Paul Mundt 2009-07-21 17:37:18 +09:00
commit fc6cca3917
74 changed files with 716 additions and 226 deletions
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18
arch/arm/configs/u300_defconfig
View File

@ -1,7 +1,7 @@
#
# Automatically generated make config: don't edit
# Linux kernel version: 2.6.31-rc1
# Thu Jul 2 00:16:59 2009
# Linux kernel version: 2.6.31-rc3
# Thu Jul 16 23:36:10 2009
#
CONFIG_ARM=y
CONFIG_SYS_SUPPORTS_APM_EMULATION=y
@ -9,7 +9,6 @@ CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_TIME=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_MMU=y
CONFIG_HAVE_TCM=y
CONFIG_GENERIC_HARDIRQS=y
CONFIG_STACKTRACE_SUPPORT=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
@ -113,7 +112,7 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_MODVERSIONS is not set
# CONFIG_MODULE_SRCVERSION_ALL is not set
CONFIG_BLOCK=y
CONFIG_LBDAF=y
# CONFIG_LBDAF is not set
# CONFIG_BLK_DEV_BSG is not set
# CONFIG_BLK_DEV_INTEGRITY is not set
@ -542,13 +541,14 @@ CONFIG_INPUT_EVDEV=y
#
CONFIG_INPUT_KEYBOARD=y
# CONFIG_KEYBOARD_ATKBD is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_LKKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_MATRIX is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_NEWTON is not set
# CONFIG_KEYBOARD_STOWAWAY is not set
# CONFIG_KEYBOARD_LM8323 is not set
# CONFIG_KEYBOARD_GPIO is not set
# CONFIG_KEYBOARD_SUNKBD is not set
# CONFIG_KEYBOARD_XTKBD is not set
# CONFIG_INPUT_MOUSE is not set
# CONFIG_INPUT_JOYSTICK is not set
# CONFIG_INPUT_TABLET is not set
@ -911,7 +911,6 @@ CONFIG_REGULATOR=y
# CONFIG_JFS_FS is not set
# CONFIG_FS_POSIX_ACL is not set
# CONFIG_XFS_FS is not set
# CONFIG_GFS2_FS is not set
# CONFIG_OCFS2_FS is not set
# CONFIG_BTRFS_FS is not set
CONFIG_FILE_LOCKING=y
@ -1122,7 +1121,6 @@ CONFIG_GENERIC_FIND_LAST_BIT=y
# CONFIG_CRC32 is not set
# CONFIG_CRC7 is not set
# CONFIG_LIBCRC32C is not set
CONFIG_GENERIC_ALLOCATOR=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HAS_DMA=y

1
arch/arm/mach-ep93xx/dma-m2p.c
View File

@ -33,6 +33,7 @@
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/module.h>
#include <linux/io.h>
#include <mach/dma.h>
#include <mach/hardware.h>

2
arch/arm/mach-kirkwood/mpp.h
View File

@ -289,7 +289,7 @@
#define MPP48_GPIO MPP( 48, 0x0, 1, 1, 0, 0, 0, 1 )
#define MPP48_TSMP12 MPP( 48, 0x1, 1, 1, 0, 0, 0, 1 )
#define MPP48_TDM_DTX MPP( 48. 0x2, 0, 1, 0, 0, 0, 1 )
#define MPP48_TDM_DTX MPP( 48, 0x2, 0, 1, 0, 0, 0, 1 )
#define MPP49_GPIO MPP( 49, 0x0, 1, 1, 0, 0, 0, 1 )
#define MPP49_TSMP9 MPP( 49, 0x1, 1, 1, 0, 0, 0, 1 )

8
arch/arm/mach-mx3/Kconfig
View File

@ -36,6 +36,14 @@ config MACH_PCM037
Include support for Phytec pcm037 platform. This includes
specific configurations for the board and its peripherals.
config MACH_PCM037_EET
bool "Support pcm037 EET board extensions"
depends on MACH_PCM037
help
Add support for PCM037 EET baseboard extensions. If you are using the
OLED display with EET, use "video=mx3fb:CMEL-OLED" kernel
command-line parameter.
config MACH_MX31LITE
bool "Support MX31 LITEKIT (LogicPD)"
select ARCH_MX31

1
arch/arm/mach-mx3/Makefile
View File

@ -11,6 +11,7 @@ obj-$(CONFIG_MACH_MX31ADS) += mx31ads.o
obj-$(CONFIG_MACH_MX31LILLY) += mx31lilly.o mx31lilly-db.o
obj-$(CONFIG_MACH_MX31LITE) += mx31lite.o
obj-$(CONFIG_MACH_PCM037) += pcm037.o
obj-$(CONFIG_MACH_PCM037_EET) += pcm037_eet.o
obj-$(CONFIG_MACH_MX31_3DS) += mx31pdk.o
obj-$(CONFIG_MACH_MX31MOBOARD) += mx31moboard.o mx31moboard-devboard.o \
mx31moboard-marxbot.o

63
arch/arm/mach-mx3/armadillo5x0.c
View File

@ -31,6 +31,8 @@
#include <linux/smsc911x.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/mtd/physmap.h>
#include <linux/io.h>
#include <mach/hardware.h>
#include <asm/mach-types.h>
@ -46,8 +48,10 @@
#include <mach/mmc.h>
#include <mach/ipu.h>
#include <mach/mx3fb.h>
#include <mach/mxc_nand.h>
#include "devices.h"
#include "crm_regs.h"
static int armadillo5x0_pins[] = {
/* UART1 */
@ -93,7 +97,56 @@ static int armadillo5x0_pins[] = {
MX31_PIN_FPSHIFT__FPSHIFT,
MX31_PIN_DRDY0__DRDY0,
IOMUX_MODE(MX31_PIN_LCS1, IOMUX_CONFIG_GPIO), /*ADV7125_PSAVE*/
};
/*
* NAND Flash
*/
static struct mxc_nand_platform_data armadillo5x0_nand_flash_pdata = {
.width = 1,
.hw_ecc = 1,
};
/*
* MTD NOR Flash
*/
static struct mtd_partition armadillo5x0_nor_flash_partitions[] = {
{
.name = "nor.bootloader",
.offset = 0x00000000,
.size = 4*32*1024,
}, {
.name = "nor.kernel",
.offset = MTDPART_OFS_APPEND,
.size = 16*128*1024,
}, {
.name = "nor.userland",
.offset = MTDPART_OFS_APPEND,
.size = 110*128*1024,
}, {
.name = "nor.config",
.offset = MTDPART_OFS_APPEND,
.size = 1*128*1024,
},
};
static struct physmap_flash_data armadillo5x0_nor_flash_pdata = {
.width = 2,
.parts = armadillo5x0_nor_flash_partitions,
.nr_parts = ARRAY_SIZE(armadillo5x0_nor_flash_partitions),
};
static struct resource armadillo5x0_nor_flash_resource = {
.flags = IORESOURCE_MEM,
.start = CS0_BASE_ADDR,
.end = CS0_BASE_ADDR + SZ_64M - 1,
};
static struct platform_device armadillo5x0_nor_flash = {
.name = "physmap-flash",
.id = -1,
.num_resources = 1,
.resource = &armadillo5x0_nor_flash_resource,
};
/*
@ -272,6 +325,16 @@ static void __init armadillo5x0_init(void)
/* Register FB */
mxc_register_device(&mx3_ipu, &mx3_ipu_data);
mxc_register_device(&mx3_fb, &mx3fb_pdata);
/* Register NOR Flash */
mxc_register_device(&armadillo5x0_nor_flash,
&armadillo5x0_nor_flash_pdata);
/* Register NAND Flash */
mxc_register_device(&mxc_nand_device, &armadillo5x0_nand_flash_pdata);
/* set NAND page size to 2k if not configured via boot mode pins */
__raw_writel(__raw_readl(MXC_CCM_RCSR) | (1 << 30), MXC_CCM_RCSR);
}
static void __init armadillo5x0_timer_init(void)

1
arch/arm/mach-mx3/devices.c
View File

@ -22,7 +22,6 @@
#include <linux/platform_device.h>
#include <linux/serial.h>
#include <linux/gpio.h>
#include <linux/dma-mapping.h>
#include <mach/hardware.h>
#include <mach/irqs.h>
#include <mach/common.h>

183
arch/arm/mach-mx3/pcm037.c
View File

@ -18,7 +18,7 @@
#include <linux/types.h>
#include <linux/init.h>
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/mtd/physmap.h>
#include <linux/mtd/plat-ram.h>
@ -33,29 +33,67 @@
#include <linux/irq.h>
#include <linux/fsl_devices.h>
#include <mach/hardware.h>
#include <media/soc_camera.h>
#include <asm/mach-types.h>
#include <asm/mach/arch.h>
#include <asm/mach/time.h>
#include <asm/mach/map.h>
#include <mach/board-pcm037.h>
#include <mach/common.h>
#include <mach/hardware.h>
#include <mach/i2c.h>
#include <mach/imx-uart.h>
#include <mach/iomux-mx3.h>
#include <mach/ipu.h>
#include <mach/board-pcm037.h>
#include <mach/mmc.h>
#include <mach/mx3_camera.h>
#include <mach/mx3fb.h>
#include <mach/mxc_nand.h>
#include <mach/mmc.h>
#ifdef CONFIG_I2C_IMX
#include <mach/i2c.h>
#endif
#include "devices.h"
#include "pcm037.h"
static enum pcm037_board_variant pcm037_instance = PCM037_PCM970;
static int __init pcm037_variant_setup(char *str)
{
if (!strcmp("eet", str))
pcm037_instance = PCM037_EET;
else if (strcmp("pcm970", str))
pr_warning("Unknown pcm037 baseboard variant %s\n", str);
return 1;
}
/* Supported values: "pcm970" (default) and "eet" */
__setup("pcm037_variant=", pcm037_variant_setup);
enum pcm037_board_variant pcm037_variant(void)
{
return pcm037_instance;
}
/* UART1 with RTS/CTS handshake signals */
static unsigned int pcm037_uart1_handshake_pins[] = {
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
};
/* UART1 without RTS/CTS handshake signals */
static unsigned int pcm037_uart1_pins[] = {
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
};
static unsigned int pcm037_pins[] = {
/* I2C */
MX31_PIN_CSPI2_MOSI__SCL,
MX31_PIN_CSPI2_MISO__SDA,
MX31_PIN_CSPI2_SS2__I2C3_SDA,
MX31_PIN_CSPI2_SCLK__I2C3_SCL,
/* SDHC1 */
MX31_PIN_SD1_DATA3__SD1_DATA3,
MX31_PIN_SD1_DATA2__SD1_DATA2,
@ -73,11 +111,6 @@ static unsigned int pcm037_pins[] = {
MX31_PIN_CSPI1_SS0__SS0,
MX31_PIN_CSPI1_SS1__SS1,
MX31_PIN_CSPI1_SS2__SS2,
/* UART1 */
MX31_PIN_CTS1__CTS1,
MX31_PIN_RTS1__RTS1,
MX31_PIN_TXD1__TXD1,
MX31_PIN_RXD1__RXD1,
/* UART2 */
MX31_PIN_TXD2__TXD2,
MX31_PIN_RXD2__RXD2,
@ -120,6 +153,22 @@ static unsigned int pcm037_pins[] = {
MX31_PIN_D3_SPL__D3_SPL,
MX31_PIN_D3_CLS__D3_CLS,
MX31_PIN_LCS0__GPI03_23,
/* CSI */
IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_GPIO),
MX31_PIN_CSI_D6__CSI_D6,
MX31_PIN_CSI_D7__CSI_D7,
MX31_PIN_CSI_D8__CSI_D8,
MX31_PIN_CSI_D9__CSI_D9,
MX31_PIN_CSI_D10__CSI_D10,
MX31_PIN_CSI_D11__CSI_D11,
MX31_PIN_CSI_D12__CSI_D12,
MX31_PIN_CSI_D13__CSI_D13,
MX31_PIN_CSI_D14__CSI_D14,
MX31_PIN_CSI_D15__CSI_D15,
MX31_PIN_CSI_HSYNC__CSI_HSYNC,
MX31_PIN_CSI_MCLK__CSI_MCLK,
MX31_PIN_CSI_PIXCLK__CSI_PIXCLK,
MX31_PIN_CSI_VSYNC__CSI_VSYNC,
};
static struct physmap_flash_data pcm037_flash_data = {
@ -250,19 +299,43 @@ static struct mxc_nand_platform_data pcm037_nand_board_info = {
.hw_ecc = 1,
};
#ifdef CONFIG_I2C_IMX
static struct imxi2c_platform_data pcm037_i2c_1_data = {
.bitrate = 100000,
};
static struct imxi2c_platform_data pcm037_i2c_2_data = {
.bitrate = 20000,
};
static struct at24_platform_data board_eeprom = {
.byte_len = 4096,
.page_size = 32,
.flags = AT24_FLAG_ADDR16,
};
static int pcm037_camera_power(struct device *dev, int on)
{
/* disable or enable the camera in X7 or X8 PCM970 connector */
gpio_set_value(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), !on);
return 0;
}
static struct i2c_board_info pcm037_i2c_2_devices[] = {
{
I2C_BOARD_INFO("mt9t031", 0x5d),
},
};
static struct soc_camera_link iclink = {
.bus_id = 0, /* Must match with the camera ID */
.power = pcm037_camera_power,
.board_info = &pcm037_i2c_2_devices[0],
.i2c_adapter_id = 2,
.module_name = "mt9t031",
};
static struct i2c_board_info pcm037_i2c_devices[] = {
{
{
I2C_BOARD_INFO("at24", 0x52), /* E0=0, E1=1, E2=0 */
.platform_data = &board_eeprom,
}, {
@ -270,7 +343,14 @@ static struct i2c_board_info pcm037_i2c_devices[] = {
.type = "pcf8563",
}
};
#endif
static struct platform_device pcm037_camera = {
.name = "soc-camera-pdrv",
.id = 0,
.dev = {
.platform_data = &iclink,
},
};
/* Not connected by default */
#ifdef PCM970_SDHC_RW_SWITCH
@ -334,9 +414,41 @@ static struct imxmmc_platform_data sdhc_pdata = {
.exit = pcm970_sdhc1_exit,
};
struct mx3_camera_pdata camera_pdata = {
.dma_dev = &mx3_ipu.dev,
.flags = MX3_CAMERA_DATAWIDTH_8 | MX3_CAMERA_DATAWIDTH_10,
.mclk_10khz = 2000,
};
static int __init pcm037_camera_alloc_dma(const size_t buf_size)
{
dma_addr_t dma_handle;
void *buf;
int dma;
if (buf_size < 2 * 1024 * 1024)
return -EINVAL;
buf = dma_alloc_coherent(NULL, buf_size, &dma_handle, GFP_KERNEL);
if (!buf) {
pr_err("%s: cannot allocate camera buffer-memory\n", __func__);
return -ENOMEM;
}
memset(buf, 0, buf_size);
dma = dma_declare_coherent_memory(&mx3_camera.dev,
dma_handle, dma_handle, buf_size,
DMA_MEMORY_MAP | DMA_MEMORY_EXCLUSIVE);
/* The way we call dma_declare_coherent_memory only a malloc can fail */
return dma & DMA_MEMORY_MAP ? 0 : -ENOMEM;
}
static struct platform_device *devices[] __initdata = {
&pcm037_flash,
&pcm037_sram_device,
&pcm037_camera,
};
static struct ipu_platform_data mx3_ipu_data = {
@ -377,6 +489,22 @@ static const struct fb_videomode fb_modedb[] = {
.sync = FB_SYNC_VERT_HIGH_ACT | FB_SYNC_OE_ACT_HIGH,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
}, {
/* 240x320 @ 60 Hz */
.name = "CMEL-OLED",
.refresh = 60,
.xres = 240,
.yres = 320,
.pixclock = 185925,
.left_margin = 9,
.right_margin = 16,
.upper_margin = 7,
.lower_margin = 9,
.hsync_len = 1,
.vsync_len = 1,
.sync = FB_SYNC_OE_ACT_HIGH | FB_SYNC_CLK_INVERT,
.vmode = FB_VMODE_NONINTERLACED,
.flag = 0,
},
};
@ -397,6 +525,14 @@ static void __init mxc_board_init(void)
mxc_iomux_setup_multiple_pins(pcm037_pins, ARRAY_SIZE(pcm037_pins),
"pcm037");
if (pcm037_variant() == PCM037_EET)
mxc_iomux_setup_multiple_pins(pcm037_uart1_pins,
ARRAY_SIZE(pcm037_uart1_pins), "pcm037_uart1");
else
mxc_iomux_setup_multiple_pins(pcm037_uart1_handshake_pins,
ARRAY_SIZE(pcm037_uart1_handshake_pins),
"pcm037_uart1");
platform_add_devices(devices, ARRAY_SIZE(devices));
mxc_register_device(&mxc_uart_device0, &uart_pdata);
@ -415,18 +551,30 @@ static void __init mxc_board_init(void)
}
#ifdef CONFIG_I2C_IMX
/* I2C adapters and devices */
i2c_register_board_info(1, pcm037_i2c_devices,
ARRAY_SIZE(pcm037_i2c_devices));
mxc_register_device(&mxc_i2c_device1, &pcm037_i2c_1_data);
#endif
mxc_register_device(&mxc_i2c_device2, &pcm037_i2c_2_data);
mxc_register_device(&mxc_nand_device, &pcm037_nand_board_info);
mxc_register_device(&mxcsdhc_device0, &sdhc_pdata);
mxc_register_device(&mx3_ipu, &mx3_ipu_data);
mxc_register_device(&mx3_fb, &mx3fb_pdata);
if (!gpio_usbotg_hs_activate())
mxc_register_device(&mxc_otg_udc_device, &usb_pdata);
/* CSI */
/* Camera power: default - off */
ret = gpio_request(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), "mt9t031-power");
if (!ret)
gpio_direction_output(IOMUX_TO_GPIO(MX31_PIN_CSI_D5), 1);
else
iclink.power = NULL;
if (!pcm037_camera_alloc_dma(4 * 1024 * 1024))
mxc_register_device(&mx3_camera, &camera_pdata);
}
static void __init pcm037_timer_init(void)
@ -448,4 +596,3 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037")
.init_machine = mxc_board_init,
.timer = &pcm037_timer,
MACHINE_END

11
arch/arm/mach-mx3/pcm037.h Normal file
View File

@ -0,0 +1,11 @@
#ifndef __PCM037_H__
#define __PCM037_H__
enum pcm037_board_variant {
PCM037_PCM970,
PCM037_EET,
};
extern enum pcm037_board_variant pcm037_variant(void);
#endif

204
arch/arm/mach-mx3/pcm037_eet.c Normal file
View File

@ -0,0 +1,204 @@
/*
* Copyright (C) 2009
* Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/gpio.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <linux/platform_device.h>
#include <linux/spi/spi.h>
#include <mach/common.h>
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
#include <mach/spi.h>
#endif
#include <mach/iomux-mx3.h>
#include <asm/mach-types.h>
#include "pcm037.h"
#include "devices.h"
static unsigned int pcm037_eet_pins[] = {
/* SPI #1 */
MX31_PIN_CSPI1_MISO__MISO,
MX31_PIN_CSPI1_MOSI__MOSI,
MX31_PIN_CSPI1_SCLK__SCLK,
MX31_PIN_CSPI1_SPI_RDY__SPI_RDY,
MX31_PIN_CSPI1_SS0__SS0,
MX31_PIN_CSPI1_SS1__SS1,
MX31_PIN_CSPI1_SS2__SS2,
/* Reserve and hardwire GPIO 57 high - S6E63D6 chipselect */
IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_GPIO),
/* GPIO keys */
IOMUX_MODE(MX31_PIN_GPIO1_0, IOMUX_CONFIG_GPIO), /* 0 */
IOMUX_MODE(MX31_PIN_GPIO1_1, IOMUX_CONFIG_GPIO), /* 1 */
IOMUX_MODE(MX31_PIN_GPIO1_2, IOMUX_CONFIG_GPIO), /* 2 */
IOMUX_MODE(MX31_PIN_GPIO1_3, IOMUX_CONFIG_GPIO), /* 3 */
IOMUX_MODE(MX31_PIN_SVEN0, IOMUX_CONFIG_GPIO), /* 32 */
IOMUX_MODE(MX31_PIN_STX0, IOMUX_CONFIG_GPIO), /* 33 */
IOMUX_MODE(MX31_PIN_SRX0, IOMUX_CONFIG_GPIO), /* 34 */
IOMUX_MODE(MX31_PIN_SIMPD0, IOMUX_CONFIG_GPIO), /* 35 */
IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_GPIO), /* 38 */
IOMUX_MODE(MX31_PIN_CTS1, IOMUX_CONFIG_GPIO), /* 39 */
IOMUX_MODE(MX31_PIN_KEY_ROW4, IOMUX_CONFIG_GPIO), /* 50 */
IOMUX_MODE(MX31_PIN_KEY_ROW5, IOMUX_CONFIG_GPIO), /* 51 */
IOMUX_MODE(MX31_PIN_KEY_ROW6, IOMUX_CONFIG_GPIO), /* 52 */
IOMUX_MODE(MX31_PIN_KEY_ROW7, IOMUX_CONFIG_GPIO), /* 53 */
/* LEDs */
IOMUX_MODE(MX31_PIN_DTR_DTE1, IOMUX_CONFIG_GPIO), /* 44 */
IOMUX_MODE(MX31_PIN_DSR_DTE1, IOMUX_CONFIG_GPIO), /* 45 */
IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_GPIO), /* 55 */
IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_GPIO), /* 56 */
};
/* SPI */
static struct spi_board_info pcm037_spi_dev[] = {
{
.modalias = "dac124s085",
.max_speed_hz = 400000,
.bus_num = 0,
.chip_select = 0, /* Index in pcm037_spi1_cs[] */
.mode = SPI_CPHA,
},
};
/* Platform Data for MXC CSPI */
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
static int pcm037_spi1_cs[] = {MXC_SPI_CS(1), IOMUX_TO_GPIO(MX31_PIN_KEY_COL7)};
struct spi_imx_master pcm037_spi1_master = {
.chipselect = pcm037_spi1_cs,
.num_chipselect = ARRAY_SIZE(pcm037_spi1_cs),
};
#endif
/* GPIO-keys input device */
static struct gpio_keys_button pcm037_gpio_keys[] = {
{
.type = EV_KEY,
.code = KEY_L,
.gpio = 0,
.desc = "Wheel Manual",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_A,
.gpio = 1,
.desc = "Wheel AF",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_V,
.gpio = 2,
.desc = "Wheel View",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_M,
.gpio = 3,
.desc = "Wheel Menu",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_UP,
.gpio = 32,
.desc = "Nav Pad Up",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_RIGHT,
.gpio = 33,
.desc = "Nav Pad Right",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_DOWN,
.gpio = 34,
.desc = "Nav Pad Down",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_LEFT,
.gpio = 35,
.desc = "Nav Pad Left",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_ENTER,
.gpio = 38,
.desc = "Nav Pad Ok",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = KEY_O,
.gpio = 39,
.desc = "Wheel Off",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_FORWARD,
.gpio = 50,
.desc = "Focus Forward",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_BACK,
.gpio = 51,
.desc = "Focus Backward",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_MIDDLE,
.gpio = 52,
.desc = "Release Half",
.wakeup = 0,
}, {
.type = EV_KEY,
.code = BTN_EXTRA,
.gpio = 53,
.desc = "Release Full",
.wakeup = 0,
},
};
static struct gpio_keys_platform_data pcm037_gpio_keys_platform_data = {
.buttons = pcm037_gpio_keys,
.nbuttons = ARRAY_SIZE(pcm037_gpio_keys),
.rep = 0, /* No auto-repeat */
};
static struct platform_device pcm037_gpio_keys_device = {
.name = "gpio-keys",
.id = -1,
.dev = {
.platform_data = &pcm037_gpio_keys_platform_data,
},
};
static int eet_init_devices(void)
{
if (!machine_is_pcm037() || pcm037_variant() != PCM037_EET)
return 0;
mxc_iomux_setup_multiple_pins(pcm037_eet_pins,
ARRAY_SIZE(pcm037_eet_pins), "pcm037_eet");
/* SPI */
spi_register_board_info(pcm037_spi_dev, ARRAY_SIZE(pcm037_spi_dev));
#if defined(CONFIG_SPI_IMX) || defined(CONFIG_SPI_IMX_MODULE)
mxc_register_device(&mxc_spi_device0, &pcm037_spi1_master);
#endif
platform_device_register(&pcm037_gpio_keys_device);
return 0;
}
late_initcall(eet_init_devices);

6
arch/arm/mach-pxa/include/mach/mfp-pxa300.h
View File

@ -567,9 +567,9 @@
#define GPIO37_ULPI_DATA_OUT_7 MFP_CFG(GPIO37, AF3)
#define GPIO33_ULPI_OTG_INTR MFP_CFG(GPIO33, AF1)
#define ULPI_DIR MFP_CFG_DRV(ULPI_DIR, MFP_AF0, MFP_DS01X)
#define ULPI_NXT MFP_CFG_DRV(ULPI_NXT, MFP_AF0, MFP_DS01X)
#define ULPI_STP MFP_CFG_DRV(ULPI_STP, MFP_AF0, MFP_DS01X)
#define ULPI_DIR MFP_CFG_DRV(ULPI_DIR, AF0, DS01X)
#define ULPI_NXT MFP_CFG_DRV(ULPI_NXT, AF0, DS01X)
#define ULPI_STP MFP_CFG_DRV(ULPI_STP, AF0, DS01X)
#endif /* CONFIG_CPU_PXA310 */
#endif /* __ASM_ARCH_MFP_PXA300_H */

2
arch/arm/mach-pxa/pxa3xx.c
View File

@ -250,7 +250,7 @@ static DEFINE_PXA3_CKEN(pxa3xx_mmc2, MMC2, 19500000, 0);
static struct clk_lookup pxa3xx_clkregs[] = {
INIT_CLKREG(&clk_pxa3xx_pout, NULL, "CLK_POUT"),
/* Power I2C clock is always on */
INIT_CLKREG(&clk_dummy, "pxa2xx-i2c.1", NULL),
INIT_CLKREG(&clk_dummy, "pxa3xx-pwri2c.1", NULL),
INIT_CLKREG(&clk_pxa3xx_lcd, "pxa2xx-fb", NULL),
INIT_CLKREG(&clk_pxa3xx_camera, NULL, "CAMCLK"),
INIT_CLKREG(&clk_pxa3xx_ac97, NULL, "AC97CLK"),

3
arch/arm/mach-realview/core.c
View File

@ -208,8 +208,7 @@ struct platform_device realview_i2c_device = {
static struct i2c_board_info realview_i2c_board_info[] = {
{
I2C_BOARD_INFO("rtc-ds1307", 0xd0 >> 1),
.type = "ds1338",
I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
},
};

4
arch/arm/mach-u300/core.c
View File

@ -455,8 +455,8 @@ void __init u300_init_irq(void)
for (i = 0; i < NR_IRQS; i++)
set_bit(i, (unsigned long *) &mask[0]);
u300_enable_intcon_clock();
vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], 0);
vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], 0);
vic_init((void __iomem *) U300_INTCON0_VBASE, 0, mask[0], mask[0]);
vic_init((void __iomem *) U300_INTCON1_VBASE, 32, mask[1], mask[1]);
}

3
arch/arm/mach-versatile/core.c
View File

@ -342,8 +342,7 @@ static struct platform_device versatile_i2c_device = {
static struct i2c_board_info versatile_i2c_board_info[] = {
{
I2C_BOARD_INFO("rtc-ds1307", 0xd0 >> 1),
.type = "ds1338",
I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
},
};

2
arch/arm/plat-mxc/include/mach/iomux-mx3.h
View File

@ -602,6 +602,8 @@ enum iomux_pins {
#define MX31_PIN_I2C_DAT__SDA IOMUX_MODE(MX31_PIN_I2C_DAT, IOMUX_CONFIG_FUNC)
#define MX31_PIN_DCD_DTE1__I2C2_SDA IOMUX_MODE(MX31_PIN_DCD_DTE1, IOMUX_CONFIG_ALT2)
#define MX31_PIN_RI_DTE1__I2C2_SCL IOMUX_MODE(MX31_PIN_RI_DTE1, IOMUX_CONFIG_ALT2)
#define MX31_PIN_CSPI2_SS2__I2C3_SDA IOMUX_MODE(MX31_PIN_CSPI2_SS2, IOMUX_CONFIG_ALT1)
#define MX31_PIN_CSPI2_SCLK__I2C3_SCL IOMUX_MODE(MX31_PIN_CSPI2_SCLK, IOMUX_CONFIG_ALT1)
#define MX31_PIN_CSI_D4__CSI_D4 IOMUX_MODE(MX31_PIN_CSI_D4, IOMUX_CONFIG_FUNC)
#define MX31_PIN_CSI_D5__CSI_D5 IOMUX_MODE(MX31_PIN_CSI_D5, IOMUX_CONFIG_FUNC)
#define MX31_PIN_CSI_D6__CSI_D6 IOMUX_MODE(MX31_PIN_CSI_D6, IOMUX_CONFIG_FUNC)

9
arch/arm/plat-pxa/gpio.c
View File

@ -16,7 +16,7 @@
#include <linux/irq.h>
#include <linux/io.h>
#include <linux/sysdev.h>
#include <linux/bootmem.h>
#include <linux/slab.h>
#include <mach/gpio.h>
@ -112,17 +112,12 @@ static int __init pxa_init_gpio_chip(int gpio_end)
int i, gpio, nbanks = gpio_to_bank(gpio_end) + 1;
struct pxa_gpio_chip *chips;
/* this is early, we have to use bootmem allocator, and we really
* want this to be allocated dynamically for different 'gpio_end'
*/
chips = alloc_bootmem_low(nbanks * sizeof(struct pxa_gpio_chip));
chips = kzalloc(nbanks * sizeof(struct pxa_gpio_chip), GFP_KERNEL);
if (chips == NULL) {
pr_err("%s: failed to allocate GPIO chips\n", __func__);
return -ENOMEM;
}
memset(chips, 0, nbanks * sizeof(struct pxa_gpio_chip));
for (i = 0, gpio = 0; i < nbanks; i++, gpio += 32) {
struct gpio_chip *c = &chips[i].chip;

7
arch/blackfin/include/asm/context.S
View File

@ -223,9 +223,10 @@
[--sp] = RETN;
[--sp] = RETE;
[--sp] = SEQSTAT;
#ifdef CONFIG_KGDB
r1.l = lo(IPEND);
r1.h = hi(IPEND);
#ifdef CONFIG_DEBUG_KERNEL
p1.l = lo(IPEND);
p1.h = hi(IPEND);
r1 = [p1];
[--sp] = r1;
#else
[--sp] = r0; /* Skip IPEND as well. */

1
arch/blackfin/include/asm/cpu.h
View File

@ -32,7 +32,6 @@ struct blackfin_cpudata {
struct task_struct *idle;
unsigned int imemctl;
unsigned int dmemctl;
unsigned long loops_per_jiffy;
unsigned long dcache_invld_count;
unsigned long icache_invld_count;
};

3
arch/blackfin/include/asm/hardirq.h
View File

@ -6,6 +6,9 @@
extern void ack_bad_irq(unsigned int irq);
#define ack_bad_irq ack_bad_irq
/* Define until common code gets sane defaults */
#define HARDIRQ_BITS 9
#include <asm-generic/hardirq.h>
#endif

21
arch/blackfin/include/asm/processor.h
View File

@ -105,23 +105,16 @@ static inline uint32_t __pure bfin_revid(void)
/* Always use CHIPID, to work around ANOMALY_05000234 */
uint32_t revid = (bfin_read_CHIPID() & CHIPID_VERSION) >> 28;
#ifdef CONFIG_BF52x
/* ANOMALY_05000357
#ifdef _BOOTROM_GET_DXE_ADDRESS_TWI
/*
* ANOMALY_05000364
* Incorrect Revision Number in DSPID Register
*/
if (revid == 0)
switch (bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI)) {
case 0x0010:
revid = 0;
break;
case 0x2796:
revid = 1;
break;
default:
revid = 0xFFFF;
break;
}
if (ANOMALY_05000364 &&
bfin_read16(_BOOTROM_GET_DXE_ADDRESS_TWI) == 0x2796)
revid = 1;
#endif
return revid;
}

39
arch/blackfin/kernel/bfin_dma_5xx.c
View File

@ -253,32 +253,31 @@ void __init early_dma_memcpy(void *pdst, const void *psrc, size_t size)
BUG_ON(src % 4);
BUG_ON(size % 4);
src_ch = 0;
/* Find an avalible memDMA channel */
while (1) {
if (src_ch == (struct dma_register *)MDMA_S0_NEXT_DESC_PTR) {
dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR;
src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR;
} else {
dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR;
src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR;
}
if (!bfin_read16(&src_ch->cfg))
break;
else if (bfin_read16(&dst_ch->irq_status) & DMA_DONE) {
bfin_write16(&src_ch->cfg, 0);
break;
}
}
/* Force a sync in case a previous config reset on this channel
* occurred. This is needed so subsequent writes to DMA registers
* are not spuriously lost/corrupted.
*/
__builtin_bfin_ssync();
src_ch = 0;
/* Find an avalible memDMA channel */
while (1) {
if (!src_ch || src_ch == (struct dma_register *)MDMA_S1_NEXT_DESC_PTR) {
dst_ch = (struct dma_register *)MDMA_D0_NEXT_DESC_PTR;
src_ch = (struct dma_register *)MDMA_S0_NEXT_DESC_PTR;
} else {
dst_ch = (struct dma_register *)MDMA_D1_NEXT_DESC_PTR;
src_ch = (struct dma_register *)MDMA_S1_NEXT_DESC_PTR;
}
if (!bfin_read16(&src_ch->cfg)) {
break;
} else {
if (bfin_read16(&src_ch->irq_status) & DMA_DONE)
bfin_write16(&src_ch->cfg, 0);
}
}
/* Destination */
bfin_write32(&dst_ch->start_addr, dst);
bfin_write16(&dst_ch->x_count, size >> 2);

6
arch/blackfin/kernel/bfin_gpio.c
View File

@ -686,14 +686,12 @@ void bfin_gpio_pm_hibernate_restore(void)
*port_fer[bank] = gpio_bank_saved[bank].fer;
#endif
gpio_array[bank]->inen = gpio_bank_saved[bank].inen;
gpio_array[bank]->data_set = gpio_bank_saved[bank].data
& gpio_bank_saved[bank].dir;
gpio_array[bank]->dir = gpio_bank_saved[bank].dir;
gpio_array[bank]->polar = gpio_bank_saved[bank].polar;
gpio_array[bank]->edge = gpio_bank_saved[bank].edge;
gpio_array[bank]->both = gpio_bank_saved[bank].both;
gpio_array[bank]->data_set = gpio_bank_saved[bank].data
| gpio_bank_saved[bank].dir;
gpio_array[bank]->maska = gpio_bank_saved[bank].maska;
}
AWA_DUMMY_READ(maska);

23
arch/blackfin/kernel/cplb-nompu/cplbinit.c
View File

@ -72,13 +72,24 @@ void __init generate_cplb_tables_cpu(unsigned int cpu)
}
/* Cover L1 memory. One 4M area for code and data each is enough. */
if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
d_tbl[i_d].addr = L1_DATA_A_START;
d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
if (cpu == 0) {
if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
d_tbl[i_d].addr = L1_DATA_A_START;
d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
}
i_tbl[i_i].addr = L1_CODE_START;
i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
}
i_tbl[i_i].addr = L1_CODE_START;
i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
#ifdef CONFIG_SMP
else {
if (L1_DATA_A_LENGTH || L1_DATA_B_LENGTH) {
d_tbl[i_d].addr = COREB_L1_DATA_A_START;
d_tbl[i_d++].data = L1_DMEMORY | PAGE_SIZE_4MB;
}
i_tbl[i_i].addr = COREB_L1_CODE_START;
i_tbl[i_i++].data = L1_IMEMORY | PAGE_SIZE_4MB;
}
#endif
first_switched_dcplb = i_d;
first_switched_icplb = i_i;

14
arch/blackfin/kernel/process.c
View File

@ -361,7 +361,7 @@ static inline
int in_mem_const(unsigned long addr, unsigned long size,
unsigned long const_addr, unsigned long const_size)
{
return in_mem_const_off(addr, 0, size, const_addr, const_size);
return in_mem_const_off(addr, size, 0, const_addr, const_size);
}
#define IN_ASYNC(bnum, bctlnum) \
({ \
@ -390,13 +390,13 @@ int bfin_mem_access_type(unsigned long addr, unsigned long size)
if (in_mem_const(addr, size, L1_DATA_B_START, L1_DATA_B_LENGTH))
return cpu == 0 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
#ifdef COREB_L1_CODE_START
if (in_mem_const(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH))
if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
return cpu == 1 ? BFIN_MEM_ACCESS_ITEST : BFIN_MEM_ACCESS_IDMA;
if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
return cpu == 1 ? BFIN_MEM_ACCESS_CORE_ONLY : -EFAULT;
if (in_mem_const(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH))
if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
if (in_mem_const(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH))
if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
return cpu == 1 ? BFIN_MEM_ACCESS_CORE : BFIN_MEM_ACCESS_IDMA;
#endif
if (in_mem_const(addr, size, L2_START, L2_LENGTH))
@ -472,13 +472,13 @@ int _access_ok(unsigned long addr, unsigned long size)
if (in_mem_const_off(addr, size, _ebss_b_l1 - _sdata_b_l1, L1_DATA_B_START, L1_DATA_B_LENGTH))
return 1;
#ifdef COREB_L1_CODE_START
if (in_mem_const(addr, size, COREB_L1_CODE_START, L1_CODE_LENGTH))
if (in_mem_const(addr, size, COREB_L1_CODE_START, COREB_L1_CODE_LENGTH))
return 1;
if (in_mem_const(addr, size, COREB_L1_SCRATCH_START, L1_SCRATCH_LENGTH))
return 1;
if (in_mem_const(addr, size, COREB_L1_DATA_A_START, L1_DATA_A_LENGTH))
if (in_mem_const(addr, size, COREB_L1_DATA_A_START, COREB_L1_DATA_A_LENGTH))
return 1;
if (in_mem_const(addr, size, COREB_L1_DATA_B_START, L1_DATA_B_LENGTH))
if (in_mem_const(addr, size, COREB_L1_DATA_B_START, COREB_L1_DATA_B_LENGTH))
return 1;
#endif
if (in_mem_const_off(addr, size, _ebss_l2 - _stext_l2, L2_START, L2_LENGTH))

42
arch/blackfin/kernel/setup.c
View File

@ -168,7 +168,6 @@ void __cpuinit bfin_setup_cpudata(unsigned int cpu)
struct blackfin_cpudata *cpudata = &per_cpu(cpu_data, cpu);
cpudata->idle = current;
cpudata->loops_per_jiffy = loops_per_jiffy;
cpudata->imemctl = bfin_read_IMEM_CONTROL();
cpudata->dmemctl = bfin_read_DMEM_CONTROL();
}
@ -568,17 +567,23 @@ static __init void memory_setup(void)
# endif /* ANOMALY_05000263 */
# endif /* CONFIG_ROMFS_FS */
memory_end -= mtd_size;
/* Since the default MTD_UCLINUX has no magic number, we just blindly
* read 8 past the end of the kernel's image, and look at it.
* When no image is attached, mtd_size is set to a random number
* Do some basic sanity checks before operating on things
*/
if (mtd_size == 0 || memory_end <= mtd_size) {
pr_emerg("Could not find valid ram mtd attached.\n");
} else {
memory_end -= mtd_size;
if (mtd_size == 0) {
console_init();
panic("Don't boot kernel without rootfs attached.");
/* Relocate MTD image to the top of memory after the uncached memory area */
uclinux_ram_map.phys = memory_mtd_start = memory_end;
uclinux_ram_map.size = mtd_size;
pr_info("Found mtd parition at 0x%p, (len=0x%lx), moving to 0x%p\n",
_end, mtd_size, (void *)memory_mtd_start);
dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
}
/* Relocate MTD image to the top of memory after the uncached memory area */
uclinux_ram_map.phys = memory_mtd_start = memory_end;
uclinux_ram_map.size = mtd_size;
dma_memcpy((void *)uclinux_ram_map.phys, _end, uclinux_ram_map.size);
#endif /* CONFIG_MTD_UCLINUX */
#if (defined(CONFIG_BFIN_EXTMEM_ICACHEABLE) && ANOMALY_05000263)
@ -868,13 +873,6 @@ void __init setup_arch(char **cmdline_p)
else
printk(KERN_CONT "and Disabled\n");
#if defined(CONFIG_CHR_DEV_FLASH) || defined(CONFIG_BLK_DEV_FLASH)
/* we need to initialize the Flashrom device here since we might
* do things with flash early on in the boot
*/
flash_probe();
#endif
printk(KERN_INFO "Boot Mode: %i\n", bfin_read_SYSCR() & 0xF);
/* Newer parts mirror SWRST bits in SYSCR */
@ -938,10 +936,6 @@ void __init setup_arch(char **cmdline_p)
CPU, bfin_revid());
}
/* We can't run on BF548-0.1 due to ANOMALY 05000448 */
if (bfin_cpuid() == 0x27de && bfin_revid() == 1)
panic("You can't run on this processor due to 05000448");
printk(KERN_INFO "Blackfin Linux support by http://blackfin.uclinux.org/\n");
printk(KERN_INFO "Processor Speed: %lu MHz core clock and %lu MHz System Clock\n",
@ -1164,9 +1158,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
sclk/1000000, sclk%1000000);
seq_printf(m, "bogomips\t: %lu.%02lu\n"
"Calibration\t: %lu loops\n",
(cpudata->loops_per_jiffy * HZ) / 500000,
((cpudata->loops_per_jiffy * HZ) / 5000) % 100,
(cpudata->loops_per_jiffy * HZ));
(loops_per_jiffy * HZ) / 500000,
((loops_per_jiffy * HZ) / 5000) % 100,
(loops_per_jiffy * HZ));
/* Check Cache configutation */
switch (cpudata->dmemctl & (1 << DMC0_P | 1 << DMC1_P)) {

9
arch/blackfin/kernel/traps.c
View File

@ -570,11 +570,12 @@ asmlinkage void trap_c(struct pt_regs *fp)
if (kernel_mode_regs(fp) || (current && !current->mm)) {
console_verbose();
oops_in_progress = 1;
if (strerror)
verbose_printk(strerror);
}
if (sig != SIGTRAP) {
if (strerror)
verbose_printk(strerror);
dump_bfin_process(fp);
dump_bfin_mem(fp);
show_regs(fp);
@ -619,7 +620,9 @@ asmlinkage void trap_c(struct pt_regs *fp)
force_sig_info(sig, &info, current);
}
if (ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8))
if ((ANOMALY_05000461 && trapnr == VEC_HWERR && !access_ok(VERIFY_READ, fp->pc, 8)) ||
(ANOMALY_05000281 && trapnr == VEC_HWERR) ||
(ANOMALY_05000189 && (trapnr == VEC_CPLB_I_VL || trapnr == VEC_CPLB_VL)))
fp->pc = SAFE_USER_INSTRUCTION;
traps_done:

16
arch/blackfin/lib/lshrdi3.c
View File

@ -27,21 +27,7 @@
* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#define BITS_PER_UNIT 8
typedef int SItype __attribute__ ((mode(SI)));
typedef unsigned int USItype __attribute__ ((mode(SI)));
typedef int DItype __attribute__ ((mode(DI)));
typedef int word_type __attribute__ ((mode(__word__)));
struct DIstruct {
SItype high, low;
};
typedef union {
struct DIstruct s;
DItype ll;
} DIunion;
#include "gcclib.h"
#ifdef CONFIG_ARITHMETIC_OPS_L1
DItype __lshrdi3(DItype u, word_type b)__attribute__((l1_text));

2
arch/blackfin/mach-bf518/boards/ezbrd.c
View File

@ -534,7 +534,7 @@ static struct platform_device i2c_bfin_twi_device = {
#endif
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
},

2
arch/blackfin/mach-bf518/include/mach/anomaly.h
View File

@ -82,6 +82,7 @@
#define ANOMALY_05000179 (0)
#define ANOMALY_05000182 (0)
#define ANOMALY_05000183 (0)
#define ANOMALY_05000189 (0)
#define ANOMALY_05000198 (0)
#define ANOMALY_05000202 (0)
#define ANOMALY_05000215 (0)
@ -117,6 +118,7 @@
#define ANOMALY_05000357 (0)
#define ANOMALY_05000362 (1)
#define ANOMALY_05000363 (0)
#define ANOMALY_05000364 (0)
#define ANOMALY_05000371 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (0)

2
arch/blackfin/mach-bf518/include/mach/bfin_serial_5xx.h
View File

@ -53,7 +53,7 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)

2
arch/blackfin/mach-bf527/boards/cm_bf527.c
View File

@ -793,7 +793,7 @@ static struct platform_device i2c_bfin_twi_device = {
#endif
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
.type = "pcf8574_lcd",

2
arch/blackfin/mach-bf527/boards/ezbrd.c
View File

@ -591,7 +591,7 @@ static struct platform_device i2c_bfin_twi_device = {
#endif
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
},

2
arch/blackfin/mach-bf527/boards/ezkit.c
View File

@ -858,7 +858,7 @@ static struct platform_device i2c_bfin_twi_device = {
#endif
static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
},

4
arch/blackfin/mach-bf527/include/mach/anomaly.h
View File

@ -176,6 +176,8 @@
#define ANOMALY_05000443 (1)
/* The WURESET Bit in the SYSCR Register is not Functional */
#define ANOMALY_05000445 (1)
/* USB DMA Short Packet Data Corruption */
#define ANOMALY_05000450 (1)
/* BCODE_QUICKBOOT, BCODE_ALLBOOT, and BCODE_FULLBOOT Settings in SYSCR Register Not Functional */
#define ANOMALY_05000451 (1)
/* Incorrect Default Hysteresis Setting for RESET, NMI, and BMODE Signals */
@ -201,6 +203,7 @@
#define ANOMALY_05000179 (0)
#define ANOMALY_05000182 (0)
#define ANOMALY_05000183 (0)
#define ANOMALY_05000189 (0)
#define ANOMALY_05000198 (0)
#define ANOMALY_05000202 (0)
#define ANOMALY_05000215 (0)
@ -238,6 +241,5 @@
#define ANOMALY_05000412 (0)
#define ANOMALY_05000447 (0)
#define ANOMALY_05000448 (0)
#define ANOMALY_05000450 (0)
#endif

2
arch/blackfin/mach-bf527/include/mach/bfin_serial_5xx.h
View File

@ -53,7 +53,7 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)

2
arch/blackfin/mach-bf533/boards/stamp.c
View File

@ -453,7 +453,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
.irq = 39,
},
#endif
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
},

1
arch/blackfin/mach-bf533/include/mach/anomaly.h
View File

@ -335,6 +335,7 @@
#define ANOMALY_05000323 (0)
#define ANOMALY_05000353 (1)
#define ANOMALY_05000362 (1)
#define ANOMALY_05000364 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1)
#define ANOMALY_05000389 (0)

2
arch/blackfin/mach-bf533/include/mach/bfin_serial_5xx.h
View File

@ -53,7 +53,7 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)

4
arch/blackfin/mach-bf537/boards/stamp.c
View File

@ -1313,10 +1313,10 @@ static struct i2c_board_info __initdata bfin_i2c_board_info[] = {
#if defined(CONFIG_JOYSTICK_AD7142) || defined(CONFIG_JOYSTICK_AD7142_MODULE)
{
I2C_BOARD_INFO("ad7142_joystick", 0x2C),
.irq = IRQ_PF5,
.irq = IRQ_PG5,
},
#endif
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
},

2
arch/blackfin/mach-bf537/include/mach/anomaly.h
View File

@ -167,6 +167,7 @@
#define ANOMALY_05000179 (0)
#define ANOMALY_05000182 (0)
#define ANOMALY_05000183 (0)
#define ANOMALY_05000189 (0)
#define ANOMALY_05000198 (0)
#define ANOMALY_05000202 (0)
#define ANOMALY_05000215 (0)
@ -186,6 +187,7 @@
#define ANOMALY_05000353 (1)
#define ANOMALY_05000362 (1)
#define ANOMALY_05000363 (0)
#define ANOMALY_05000364 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1)
#define ANOMALY_05000389 (0)

2
arch/blackfin/mach-bf537/include/mach/bfin_serial_5xx.h
View File

@ -53,7 +53,7 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)

2
arch/blackfin/mach-bf538/include/mach/anomaly.h
View File

@ -137,6 +137,7 @@
#define ANOMALY_05000158 (0)
#define ANOMALY_05000171 (0)
#define ANOMALY_05000182 (0)
#define ANOMALY_05000189 (0)
#define ANOMALY_05000198 (0)
#define ANOMALY_05000202 (0)
#define ANOMALY_05000215 (0)
@ -160,6 +161,7 @@
#define ANOMALY_05000353 (1)
#define ANOMALY_05000362 (1)
#define ANOMALY_05000363 (0)
#define ANOMALY_05000364 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1)
#define ANOMALY_05000389 (0)

2
arch/blackfin/mach-bf538/include/mach/bfin_serial_5xx.h
View File

@ -53,7 +53,7 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)

2
arch/blackfin/mach-bf548/boards/ezkit.c
View File

@ -864,7 +864,7 @@ static struct i2c_board_info __initdata bfin_i2c_board_info0[] = {
#if !defined(CONFIG_BF542) /* The BF542 only has 1 TWI */
static struct i2c_board_info __initdata bfin_i2c_board_info1[] = {
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_TWI_LCD_MODULE)
#if defined(CONFIG_BFIN_TWI_LCD) || defined(CONFIG_BFIN_TWI_LCD_MODULE)
{
I2C_BOARD_INFO("pcf8574_lcd", 0x22),
},

2
arch/blackfin/mach-bf548/include/mach/anomaly.h
View File

@ -195,6 +195,7 @@
#define ANOMALY_05000179 (0)
#define ANOMALY_05000182 (0)
#define ANOMALY_05000183 (0)
#define ANOMALY_05000189 (0)
#define ANOMALY_05000198 (0)
#define ANOMALY_05000202 (0)
#define ANOMALY_05000215 (0)
@ -226,6 +227,7 @@
#define ANOMALY_05000323 (0)
#define ANOMALY_05000362 (1)
#define ANOMALY_05000363 (0)
#define ANOMALY_05000364 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000400 (0)
#define ANOMALY_05000412 (0)

1
arch/blackfin/mach-bf561/include/mach/anomaly.h
View File

@ -288,6 +288,7 @@
#define ANOMALY_05000273 (0)
#define ANOMALY_05000311 (0)
#define ANOMALY_05000353 (1)
#define ANOMALY_05000364 (0)
#define ANOMALY_05000380 (0)
#define ANOMALY_05000386 (1)
#define ANOMALY_05000389 (0)

2
arch/blackfin/mach-bf561/include/mach/bfin_serial_5xx.h
View File

@ -53,7 +53,7 @@
#define UART_SET_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) | DLAB); SSYNC(); } while (0)
#define UART_CLEAR_DLAB(uart) do { UART_PUT_LCR(uart, UART_GET_LCR(uart) & ~DLAB); SSYNC(); } while (0)
#define UART_GET_CTS(x) (!gpio_get_value(x->cts_pin))
#define UART_GET_CTS(x) gpio_get_value(x->cts_pin)
#define UART_DISABLE_RTS(x) gpio_set_value(x->rts_pin, 1)
#define UART_ENABLE_RTS(x) gpio_set_value(x->rts_pin, 0)
#define UART_ENABLE_INTS(x, v) UART_PUT_IER(x, v)

23
arch/blackfin/mach-bf561/include/mach/mem_map.h
View File

@ -37,7 +37,6 @@
/* Memory Map for ADSP-BF561 processors */
#ifdef CONFIG_BF561
#define COREA_L1_CODE_START 0xFFA00000
#define COREA_L1_DATA_A_START 0xFF800000
#define COREA_L1_DATA_B_START 0xFF900000
@ -74,6 +73,28 @@
#define BFIN_DCACHESIZE (0*1024)
#define BFIN_DSUPBANKS 0
#endif /*CONFIG_BFIN_DCACHE*/
/*
* If we are in SMP mode, then the cache settings of Core B will match
* the settings of Core A. If we aren't, then we assume Core B is not
* using any cache. This allows the rest of the kernel to work with
* the core in either mode as we are only loading user code into it and
* it is the user's problem to make sure they aren't doing something
* stupid there.
*
* Note that we treat the L1 code region as a contiguous blob to make
* the rest of the kernel simpler. Easier to check one region than a
* bunch of small ones. Again, possible misbehavior here is the fault
* of the user -- don't try to use memory that doesn't exist.
*/
#ifdef CONFIG_SMP
# define COREB_L1_CODE_LENGTH L1_CODE_LENGTH
# define COREB_L1_DATA_A_LENGTH L1_DATA_A_LENGTH
# define COREB_L1_DATA_B_LENGTH L1_DATA_B_LENGTH
#else
# define COREB_L1_CODE_LENGTH 0x14000
# define COREB_L1_DATA_A_LENGTH 0x8000
# define COREB_L1_DATA_B_LENGTH 0x8000
#endif
/* Level 2 Memory */

12
arch/blackfin/mach-common/entry.S
View File

@ -218,7 +218,7 @@ ENTRY(_ex_single_step)
/* Single stepping only a single instruction, so clear the trace
* bit here. */
r7 = syscfg;
bitclr (r7, 0);
bitclr (r7, SYSCFG_SSSTEP_P);
syscfg = R7;
jump _ex_trap_c;
@ -251,7 +251,7 @@ ENTRY(_ex_single_step)
if !cc jump _bfin_return_from_exception;
r7 = syscfg;
bitclr (r7, 0);
bitclr (r7, SYSCFG_SSSTEP_P); /* Turn off single step */
syscfg = R7;
/* Fall through to _bfin_return_from_exception. */
@ -342,9 +342,11 @@ ENTRY(_ex_trap_c)
r6 = retx;
[p5 + PDA_RETX] = r6;
#endif
/* Save the state of single stepping */
r6 = SYSCFG;
[p5 + PDA_SYSCFG] = r6;
BITCLR(r6, 0);
/* Clear it while we handle the exception in IRQ5 mode */
BITCLR(r6, SYSCFG_SSSTEP_P);
SYSCFG = r6;
/* Disable all interrupts, but make sure level 5 is enabled so
@ -367,7 +369,7 @@ ENDPROC(_ex_trap_c)
* exception. This is a unrecoverable event, so crash.
* Note: this cannot be ENTRY() as we jump here with "if cc jump" ...
*/
_double_fault:
ENTRY(_double_fault)
/* Turn caches & protection off, to ensure we don't get any more
* double exceptions
*/
@ -872,7 +874,7 @@ ENTRY(_ret_from_exception)
raise 15; /* raise evt15 to do signal or reschedule */
4:
r0 = syscfg;
bitclr(r0, 0);
bitclr(r0, SYSCFG_SSSTEP_P); /* Turn off single step */
syscfg = r0;
5:
rts;

10
arch/blackfin/mach-common/smp.c
View File

@ -211,6 +211,8 @@ int smp_call_function(void (*func)(void *info), void *info, int wait)
return 0;
msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
if (!msg)
return -ENOMEM;
INIT_LIST_HEAD(&msg->list);
msg->call_struct.func = func;
msg->call_struct.info = info;
@ -252,6 +254,8 @@ int smp_call_function_single(int cpuid, void (*func) (void *info), void *info,
cpu_set(cpu, callmap);
msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
if (!msg)
return -ENOMEM;
INIT_LIST_HEAD(&msg->list);
msg->call_struct.func = func;
msg->call_struct.info = info;
@ -287,6 +291,8 @@ void smp_send_reschedule(int cpu)
return;
msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
if (!msg)
return;
memset(msg, 0, sizeof(msg));
INIT_LIST_HEAD(&msg->list);
msg->type = BFIN_IPI_RESCHEDULE;
@ -314,6 +320,8 @@ void smp_send_stop(void)
return;
msg = kmalloc(sizeof(*msg), GFP_ATOMIC);
if (!msg)
return;
memset(msg, 0, sizeof(msg));
INIT_LIST_HEAD(&msg->list);
msg->type = BFIN_IPI_CPU_STOP;
@ -450,7 +458,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
unsigned int cpu;
for_each_online_cpu(cpu)
bogosum += per_cpu(cpu_data, cpu).loops_per_jiffy;
bogosum += loops_per_jiffy;
printk(KERN_INFO "SMP: Total of %d processors activated "
"(%lu.%02lu BogoMIPS).\n",

15
arch/sh/Makefile
View File

@ -193,14 +193,16 @@ endif
libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
PHONY += maketools FORCE
BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec \
zImage vmlinux.srec
PHONY += maketools $(BOOT_TARGETS) FORCE
maketools: include/linux/version.h FORCE
$(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
all: $(KBUILD_IMAGE)
zImage uImage uImage.srec vmlinux.srec: vmlinux
$(BOOT_TARGETS): vmlinux
$(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
compressed: zImage
@ -212,10 +214,13 @@ archclean:
$(Q)$(MAKE) $(clean)=arch/sh/kernel/vsyscall
define archhelp
@echo '* zImage - Compressed kernel image'
@echo ' zImage - Compressed kernel image'
@echo ' vmlinux.srec - Create an ELF S-record'
@echo ' uImage - Create a bootable image for U-Boot'
@echo ' uImage.srec - Create an S-record for U-Boot'
@echo '* uImage - Alias to bootable U-Boot image'
@echo ' uImage.srec - Create an S-record for U-Boot'
@echo '* uImage.gz - Kernel-only image for U-Boot (gzip)'
@echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)'
@echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)'
endef
CLEAN_FILES += include/asm-sh/machtypes.h

5
arch/sh/boot/.gitignore vendored
View File

@ -1,4 +1,3 @@
zImage
vmlinux.srec
uImage
uImage.srec
vmlinux*
uImage*

39
arch/sh/boot/Makefile
View File

@ -20,7 +20,12 @@ CONFIG_BOOT_LINK_OFFSET ?= 0x00800000
CONFIG_ZERO_PAGE_OFFSET ?= 0x00001000
CONFIG_ENTRY_OFFSET ?= 0x00001000
targets := zImage vmlinux.srec uImage uImage.srec
suffix-$(CONFIG_KERNEL_GZIP) := gz
suffix-$(CONFIG_KERNEL_BZIP2) := bz2
suffix-$(CONFIG_KERNEL_LZMA) := lzma
targets := zImage vmlinux.srec uImage uImage.srec uImage.gz uImage.bz2 uImage.lzma
extra-y += vmlinux.bin vmlinux.bin.gz vmlinux.bin.bz2 vmlinux.bin.lzma
subdir- := compressed
$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
@ -40,9 +45,6 @@ KERNEL_MEMORY := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_MEMORY_START)]')
endif
export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY
KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%08x" \
$$[$(CONFIG_PAGE_OFFSET) + \
$(KERNEL_MEMORY) + \
@ -55,19 +57,30 @@ KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%08x" \
quiet_cmd_uimage = UIMAGE $@
cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
-C gzip -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
-C $(2) -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
-n 'Linux-$(KERNELRELEASE)' -d $< $@
$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
$(call if_changed,uimage)
@echo ' Image $@ is ready'
$(obj)/vmlinux.bin: vmlinux FORCE
$(call if_changed,objcopy)
$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
$(call if_changed,gzip)
$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
$(call if_changed,bzip2)
$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
$(call if_changed,lzma)
$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2
$(call if_changed,uimage,bzip2)
$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz
$(call if_changed,uimage,gzip)
$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma
$(call if_changed,uimage,lzma)
OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux
$(call if_changed,objcopy)
@ -76,5 +89,9 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec
$(obj)/uImage.srec: $(obj)/uImage
$(call if_changed,objcopy)
clean-files += uImage uImage.srec vmlinux.srec \
vmlinux.bin vmlinux.bin.gz
$(obj)/uImage: $(obj)/uImage.$(suffix-y)
@ln -sf $(notdir $<) $@
@echo ' Image $@ is ready'
export CONFIG_PAGE_OFFSET CONFIG_MEMORY_START CONFIG_BOOT_LINK_OFFSET \
CONFIG_ZERO_PAGE_OFFSET CONFIG_ENTRY_OFFSET KERNEL_MEMORY suffix-y

4
arch/sh/boot/compressed/Makefile
View File

@ -48,10 +48,6 @@ $(obj)/vmlinux.bin.bz2: $(vmlinux.bin.all-y) FORCE
$(obj)/vmlinux.bin.lzma: $(vmlinux.bin.all-y) FORCE
$(call if_changed,lzma)
suffix-$(CONFIG_KERNEL_GZIP) := gz
suffix-$(CONFIG_KERNEL_BZIP2) := bz2
suffix-$(CONFIG_KERNEL_LZMA) := lzma
OBJCOPYFLAGS += -R .empty_zero_page
LDFLAGS_piggy.o := -r --format binary --oformat $(ld-bfd) -T

2
drivers/char/hvc_console.c
View File

@ -552,7 +552,7 @@ static int hvc_chars_in_buffer(struct tty_struct *tty)
struct hvc_struct *hp = tty->driver_data;
if (!hp)
return -1;
return 0;
return hp->n_outbuf;
}

4
drivers/char/nozomi.c
View File

@ -1866,16 +1866,14 @@ static s32 ntty_chars_in_buffer(struct tty_struct *tty)
{
struct port *port = tty->driver_data;
struct nozomi *dc = get_dc_by_tty(tty);
s32 rval;
s32 rval = 0;
if (unlikely(!dc || !port)) {
rval = -ENODEV;
goto exit_in_buffer;
}
if (unlikely(!port->port.count)) {
dev_err(&dc->pdev->dev, "No tty open?\n");
rval = -ENODEV;
goto exit_in_buffer;
}

4
drivers/char/pcmcia/ipwireless/tty.c
View File

@ -320,10 +320,10 @@ static int ipw_chars_in_buffer(struct tty_struct *linux_tty)
struct ipw_tty *tty = linux_tty->driver_data;
if (!tty)
return -ENODEV;
return 0;
if (!tty->open_count)
return -EINVAL;
return 0;
return tty->tx_bytes_queued;
}

24
drivers/char/specialix.c
View File

@ -1809,10 +1809,10 @@ static int sx_tiocmset(struct tty_struct *tty, struct file *file,
if (clear & TIOCM_DTR)
port->MSVR &= ~MSVR_DTR;
}
spin_lock_irqsave(&bp->lock, flags);
spin_lock(&bp->lock);
sx_out(bp, CD186x_CAR, port_No(port));
sx_out(bp, CD186x_MSVR, port->MSVR);
spin_unlock_irqrestore(&bp->lock, flags);
spin_unlock(&bp->lock);
spin_unlock_irqrestore(&port->lock, flags);
func_exit();
return 0;
@ -1833,11 +1833,11 @@ static int sx_send_break(struct tty_struct *tty, int length)
port->break_length = SPECIALIX_TPS / HZ * length;
port->COR2 |= COR2_ETC;
port->IER |= IER_TXRDY;
spin_lock_irqsave(&bp->lock, flags);
spin_lock(&bp->lock);
sx_out(bp, CD186x_CAR, port_No(port));
sx_out(bp, CD186x_COR2, port->COR2);
sx_out(bp, CD186x_IER, port->IER);
spin_unlock_irqrestore(&bp->lock, flags);
spin_unlock(&bp->lock);
spin_unlock_irqrestore(&port->lock, flags);
sx_wait_CCR(bp);
spin_lock_irqsave(&bp->lock, flags);
@ -2023,9 +2023,9 @@ static void sx_unthrottle(struct tty_struct *tty)
if (sx_crtscts(tty))
port->MSVR |= MSVR_DTR;
/* Else clause: see remark in "sx_throttle"... */
spin_lock_irqsave(&bp->lock, flags);
spin_lock(&bp->lock);
sx_out(bp, CD186x_CAR, port_No(port));
spin_unlock_irqrestore(&bp->lock, flags);
spin_unlock(&bp->lock);
if (I_IXOFF(tty)) {
spin_unlock_irqrestore(&port->lock, flags);
sx_wait_CCR(bp);
@ -2035,9 +2035,9 @@ static void sx_unthrottle(struct tty_struct *tty)
sx_wait_CCR(bp);
spin_lock_irqsave(&port->lock, flags);
}
spin_lock_irqsave(&bp->lock, flags);
spin_lock(&bp->lock);
sx_out(bp, CD186x_MSVR, port->MSVR);
spin_unlock_irqrestore(&bp->lock, flags);
spin_unlock(&bp->lock);
spin_unlock_irqrestore(&port->lock, flags);
func_exit();
@ -2061,10 +2061,10 @@ static void sx_stop(struct tty_struct *tty)
spin_lock_irqsave(&port->lock, flags);
port->IER &= ~IER_TXRDY;
spin_lock_irqsave(&bp->lock, flags);
spin_lock(&bp->lock);
sx_out(bp, CD186x_CAR, port_No(port));
sx_out(bp, CD186x_IER, port->IER);
spin_unlock_irqrestore(&bp->lock, flags);
spin_unlock(&bp->lock);
spin_unlock_irqrestore(&port->lock, flags);
func_exit();
@ -2089,10 +2089,10 @@ static void sx_start(struct tty_struct *tty)
spin_lock_irqsave(&port->lock, flags);
if (port->xmit_cnt && port->xmit_buf && !(port->IER & IER_TXRDY)) {
port->IER |= IER_TXRDY;
spin_lock_irqsave(&bp->lock, flags);
spin_lock(&bp->lock);
sx_out(bp, CD186x_CAR, port_No(port));
sx_out(bp, CD186x_IER, port->IER);
spin_unlock_irqrestore(&bp->lock, flags);
spin_unlock(&bp->lock);
}
spin_unlock_irqrestore(&port->lock, flags);

4
drivers/char/vc_screen.c
View File

@ -495,11 +495,15 @@ void vcs_remove_sysfs(int index)
int __init vcs_init(void)
{
unsigned int i;
if (register_chrdev(VCS_MAJOR, "vcs", &vcs_fops))
panic("unable to get major %d for vcs device", VCS_MAJOR);
vc_class = class_create(THIS_MODULE, "vc");
device_create(vc_class, NULL, MKDEV(VCS_MAJOR, 0), NULL, "vcs");
device_create(vc_class, NULL, MKDEV(VCS_MAJOR, 128), NULL, "vcsa");
for (i = 0; i < MIN_NR_CONSOLES; i++)
vcs_make_sysfs(i);
return 0;
}

2
drivers/isdn/gigaset/interface.c
View File

@ -408,6 +408,8 @@ static int if_write_room(struct tty_struct *tty)
return retval;
}
/* FIXME: This function does not have error returns */
static int if_chars_in_buffer(struct tty_struct *tty)
{
struct cardstate *cs;

4
drivers/mmc/host/mvsdio.c
View File

@ -384,7 +384,7 @@ static irqreturn_t mvsd_irq(int irq, void *dev)
u16 val[2] = {0, 0};
val[0] = mvsd_read(MVSD_FIFO);
val[1] = mvsd_read(MVSD_FIFO);
memcpy(p, &val, s);
memcpy(p, ((void *)&val) + 4 - s, s);
s = 0;
intr_status = mvsd_read(MVSD_NOR_INTR_STATUS);
}
@ -423,7 +423,7 @@ static irqreturn_t mvsd_irq(int irq, void *dev)
if (s < 4) {
if (s && (intr_status & MVSD_NOR_TX_AVAIL)) {
u16 val[2] = {0, 0};
memcpy(&val, p, s);
memcpy(((void *)&val) + 4 - s, p, s);
mvsd_write(MVSD_FIFO, val[0]);
mvsd_write(MVSD_FIFO, val[1]);
s = 0;

4
drivers/mmc/host/pxamci.c
View File

@ -168,12 +168,12 @@ static void pxamci_setup_data(struct pxamci_host *host, struct mmc_data *data)
if (data->flags & MMC_DATA_READ) {
host->dma_dir = DMA_FROM_DEVICE;
dcmd = DCMD_INCTRGADDR | DCMD_FLOWTRG;
dcmd = DCMD_INCTRGADDR | DCMD_FLOWSRC;
DRCMR(host->dma_drcmrtx) = 0;
DRCMR(host->dma_drcmrrx) = host->dma | DRCMR_MAPVLD;
} else {
host->dma_dir = DMA_TO_DEVICE;
dcmd = DCMD_INCSRCADDR | DCMD_FLOWSRC;
dcmd = DCMD_INCSRCADDR | DCMD_FLOWTRG;
DRCMR(host->dma_drcmrrx) = 0;
DRCMR(host->dma_drcmrtx) = host->dma | DRCMR_MAPVLD;
}

2
drivers/usb/class/cdc-acm.c
View File

@ -750,7 +750,7 @@ static int acm_tty_chars_in_buffer(struct tty_struct *tty)
{
struct acm *acm = tty->driver_data;
if (!ACM_READY(acm))
return -EINVAL;
return 0;
/*
* This is inaccurate (overcounts), but it works.
*/

2
drivers/usb/serial/mos7720.c
View File

@ -521,7 +521,7 @@ static int mos7720_chars_in_buffer(struct tty_struct *tty)
mos7720_port = usb_get_serial_port_data(port);
if (mos7720_port == NULL) {
dbg("%s:leaving ...........", __func__);
return -ENODEV;
return 0;
}
for (i = 0; i < NUM_URBS; ++i) {

4
drivers/usb/serial/ti_usb_3410_5052.c
View File

@ -727,7 +727,7 @@ static int ti_write_room(struct tty_struct *tty)
dbg("%s - port %d", __func__, port->number);
if (tport == NULL)
return -ENODEV;
return 0;
spin_lock_irqsave(&tport->tp_lock, flags);
room = ti_buf_space_avail(tport->tp_write_buf);
@ -748,7 +748,7 @@ static int ti_chars_in_buffer(struct tty_struct *tty)
dbg("%s - port %d", __func__, port->number);
if (tport == NULL)
return -ENODEV;
return 0;
spin_lock_irqsave(&tport->tp_lock, flags);
chars = ti_buf_data_avail(tport->tp_write_buf);

2
drivers/video/backlight/pwm_bl.c
View File

@ -145,6 +145,8 @@ static int pwm_backlight_suspend(struct platform_device *pdev,
struct backlight_device *bl = platform_get_drvdata(pdev);
struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev);
if (pb->notify)
pb->notify(0);
pwm_config(pb->pwm, 0, pb->period);
pwm_disable(pb->pwm);
return 0;

1
drivers/watchdog/ep93xx_wdt.c
View File

@ -29,6 +29,7 @@
#include <linux/watchdog.h>
#include <linux/timer.h>
#include <linux/uaccess.h>
#include <linux/io.h>
#include <mach/hardware.h>
#define WDT_VERSION "0.3"

2
fs/9p/vfs_addr.c
View File

@ -57,7 +57,7 @@ static int v9fs_vfs_readpage(struct file *filp, struct page *page)
buffer = kmap(page);
offset = page_offset(page);
retval = v9fs_file_readn(filp, buffer, NULL, offset, PAGE_CACHE_SIZE);
retval = v9fs_file_readn(filp, buffer, NULL, PAGE_CACHE_SIZE, offset);
if (retval < 0)
goto done;

8
fs/cifs/cifs_debug.c
View File

@ -261,6 +261,8 @@ static ssize_t cifs_stats_proc_write(struct file *file,
atomic_set(&tcon->num_reads, 0);
atomic_set(&tcon->num_oplock_brks, 0);
atomic_set(&tcon->num_opens, 0);
atomic_set(&tcon->num_posixopens, 0);
atomic_set(&tcon->num_posixmkdirs, 0);
atomic_set(&tcon->num_closes, 0);
atomic_set(&tcon->num_deletes, 0);
atomic_set(&tcon->num_mkdirs, 0);
@ -347,11 +349,15 @@ static int cifs_stats_proc_show(struct seq_file *m, void *v)
atomic_read(&tcon->num_locks),
atomic_read(&tcon->num_hardlinks),
atomic_read(&tcon->num_symlinks));
seq_printf(m, "\nOpens: %d Closes: %d"
seq_printf(m, "\nOpens: %d Closes: %d "
"Deletes: %d",
atomic_read(&tcon->num_opens),
atomic_read(&tcon->num_closes),
atomic_read(&tcon->num_deletes));
seq_printf(m, "\nPosix Opens: %d "
"Posix Mkdirs: %d",
atomic_read(&tcon->num_posixopens),
atomic_read(&tcon->num_posixmkdirs));
seq_printf(m, "\nMkdirs: %d Rmdirs: %d",
atomic_read(&tcon->num_mkdirs),
atomic_read(&tcon->num_rmdirs));

2
fs/cifs/cifsglob.h
View File

@ -260,6 +260,8 @@ struct cifsTconInfo {
atomic_t num_closes;
atomic_t num_deletes;
atomic_t num_mkdirs;
atomic_t num_posixopens;
atomic_t num_posixmkdirs;
atomic_t num_rmdirs;
atomic_t num_renames;
atomic_t num_t2renames;

5
fs/cifs/cifssmb.c
View File

@ -1113,7 +1113,10 @@ PsxCreat:
psx_create_err:
cifs_buf_release(pSMB);
cifs_stats_inc(&tcon->num_mkdirs);
if (posix_flags & SMB_O_DIRECTORY)
cifs_stats_inc(&tcon->num_posixmkdirs);
else
cifs_stats_inc(&tcon->num_posixopens);
if (rc == -EAGAIN)
goto PsxCreat;

1
fs/cifs/connect.c
View File

@ -2726,6 +2726,7 @@ CIFSTCon(unsigned int xid, struct cifsSesInfo *ses,
strncpy(tcon->treeName, tree, MAX_TREE_SIZE);
/* mostly informational -- no need to fail on error here */
kfree(tcon->nativeFileSystem);
tcon->nativeFileSystem = cifs_strndup_from_ucs(bcc_ptr,
bytes_left, is_unicode,
nls_codepage);

13
net/9p/client.c
View File

@ -117,9 +117,6 @@ static int parse_opts(char *opts, struct p9_client *clnt)
}
}
if (!clnt->trans_mod)
clnt->trans_mod = v9fs_get_default_trans();
kfree(options);
return ret;
}
@ -689,6 +686,9 @@ struct p9_client *p9_client_create(const char *dev_name, char *options)
if (err < 0)
goto error;
if (!clnt->trans_mod)
clnt->trans_mod = v9fs_get_default_trans();
if (clnt->trans_mod == NULL) {
err = -EPROTONOSUPPORT;
P9_DPRINTK(P9_DEBUG_ERROR,
@ -1098,7 +1098,6 @@ p9_client_read(struct p9_fid *fid, char *data, char __user *udata, u64 offset,
if (data) {
memmove(data, dataptr, count);
data += count;
}
if (udata) {
@ -1192,9 +1191,9 @@ struct p9_wstat *p9_client_stat(struct p9_fid *fid)
err = p9pdu_readf(req->rc, clnt->dotu, "wS", &ignored, ret);
if (err) {
ret = ERR_PTR(err);
p9pdu_dump(1, req->rc);
goto free_and_error;
p9_free_req(clnt, req);
goto error;
}
P9_DPRINTK(P9_DEBUG_9P,
@ -1211,8 +1210,6 @@ struct p9_wstat *p9_client_stat(struct p9_fid *fid)
p9_free_req(clnt, req);
return ret;
free_and_error:
p9_free_req(clnt, req);
error:
kfree(ret);
return ERR_PTR(err);