clk: pxa: export 32kHz PLL

This clock is especially used by the RTC driver, so export it so that
devicetree users can use it.

Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
This commit is contained in:
Robert Jarzmik 2018-06-27 21:41:23 +02:00 committed by Stephen Boyd
parent ce397d215c
commit fc20654389
4 changed files with 14 additions and 9 deletions

View File

@ -292,8 +292,10 @@ static void __init pxa25x_register_plls(void)
{
clk_register_fixed_rate(NULL, "osc_3_6864mhz", NULL,
CLK_GET_RATE_NOCACHE, 3686400);
clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,
clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
CLK_GET_RATE_NOCACHE, 32768);
CLK_GET_RATE_NOCACHE,
32768));
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk_register_fixed_factor(NULL, "ppll_95_85mhz", "osc_3_6864mhz",
0, 26, 1);

View File

@ -314,9 +314,10 @@ static void __init pxa27x_register_plls(void)
clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
CLK_GET_RATE_NOCACHE,
13 * MHz);
clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,
clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
CLK_GET_RATE_NOCACHE,
32768 * KHz);
32768 * KHz));
clk_register_fixed_rate(NULL, "clk_dummy", NULL, 0, 0);
clk_register_fixed_factor(NULL, "ppll_312mhz", "osc_13mhz", 0, 24, 1);
}

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@ -286,9 +286,10 @@ static void __init pxa3xx_register_plls(void)
clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
CLK_GET_RATE_NOCACHE,
13 * MHz);
clkdev_pxa_register(CLK_OSC32k768, "osc_32_768khz", NULL,
clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
CLK_GET_RATE_NOCACHE,
32768);
32768));
clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,
CLK_GET_RATE_NOCACHE,
120 * MHz);

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@ -72,6 +72,7 @@
#define CLK_USIM 58
#define CLK_USIM1 59
#define CLK_USMI0 60
#define CLK_MAX 61
#define CLK_OSC32k768 61
#define CLK_MAX 62
#endif