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arch/tile: support kexec() for tilegx
Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
This commit is contained in:
Chris Metcalf
parent
cd6f32aa08
commit
fc0c49f5db
@ -19,12 +19,24 @@
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#include <asm/page.h>
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#ifndef __tilegx__
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/* Maximum physical address we can use pages from. */
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#define KEXEC_SOURCE_MEMORY_LIMIT TASK_SIZE
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/* Maximum address we can reach in physical address mode. */
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#define KEXEC_DESTINATION_MEMORY_LIMIT TASK_SIZE
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/* Maximum address we can use for the control code buffer. */
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#define KEXEC_CONTROL_MEMORY_LIMIT TASK_SIZE
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#else
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/* We need to limit the memory below PGDIR_SIZE since
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* we only setup page table for [0, PGDIR_SIZE) before final kexec.
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*/
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/* Maximum physical address we can use pages from. */
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#define KEXEC_SOURCE_MEMORY_LIMIT PGDIR_SIZE
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/* Maximum address we can reach in physical address mode. */
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#define KEXEC_DESTINATION_MEMORY_LIMIT PGDIR_SIZE
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/* Maximum address we can use for the control code buffer. */
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#define KEXEC_CONTROL_MEMORY_LIMIT PGDIR_SIZE
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#endif
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#define KEXEC_CONTROL_PAGE_SIZE PAGE_SIZE
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@ -13,5 +13,5 @@ obj-$(CONFIG_COMPAT) += compat.o compat_signal.o
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obj-$(CONFIG_SMP) += smpboot.o smp.o tlb.o
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obj-$(CONFIG_MODULES) += module.o
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obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
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obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel_$(BITS).o
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obj-$(CONFIG_PCI) += pci.o
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@ -31,6 +31,8 @@
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#include <asm/pgalloc.h>
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#include <asm/cacheflush.h>
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#include <asm/checksum.h>
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#include <asm/tlbflush.h>
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#include <asm/homecache.h>
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#include <hv/hypervisor.h>
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@ -222,11 +224,22 @@ struct page *kimage_alloc_pages_arch(gfp_t gfp_mask, unsigned int order)
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return alloc_pages_node(0, gfp_mask, order);
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}
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/*
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* Address range in which pa=va mapping is set in setup_quasi_va_is_pa().
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* For tilepro, PAGE_OFFSET is used since this is the largest possbile value
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* for tilepro, while for tilegx, we limit it to entire middle level page
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* table which we assume has been allocated and is undoubtedly large enough.
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*/
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#ifndef __tilegx__
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#define QUASI_VA_IS_PA_ADDR_RANGE PAGE_OFFSET
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#else
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#define QUASI_VA_IS_PA_ADDR_RANGE PGDIR_SIZE
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#endif
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static void setup_quasi_va_is_pa(void)
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{
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HV_PTE *pgtable;
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HV_PTE pte;
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int i;
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unsigned long i;
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/*
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* Flush our TLB to prevent conflicts between the previous contents
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@ -234,16 +247,22 @@ static void setup_quasi_va_is_pa(void)
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*/
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local_flush_tlb_all();
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/* setup VA is PA, at least up to PAGE_OFFSET */
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pgtable = (HV_PTE *)current->mm->pgd;
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/*
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* setup VA is PA, at least up to QUASI_VA_IS_PA_ADDR_RANGE.
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* Note here we assume that level-1 page table is defined by
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* HPAGE_SIZE.
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*/
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pte = hv_pte(_PAGE_KERNEL | _PAGE_HUGE_PAGE);
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pte = hv_pte_set_mode(pte, HV_PTE_MODE_CACHE_NO_L3);
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for (i = 0; i < pgd_index(PAGE_OFFSET); i++) {
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for (i = 0; i < (QUASI_VA_IS_PA_ADDR_RANGE >> HPAGE_SHIFT); i++) {
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unsigned long vaddr = i << HPAGE_SHIFT;
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pgd_t *pgd = pgd_offset(current->mm, vaddr);
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pud_t *pud = pud_offset(pgd, vaddr);
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pte_t *ptep = (pte_t *) pmd_offset(pud, vaddr);
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unsigned long pfn = i << (HPAGE_SHIFT - PAGE_SHIFT);
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if (pfn_valid(pfn))
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__set_pte(&pgtable[i], pfn_pte(pfn, pte));
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__set_pte(ptep, pfn_pte(pfn, pte));
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}
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}
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260
arch/tile/kernel/relocate_kernel_64.S
Normal file
260
arch/tile/kernel/relocate_kernel_64.S
Normal file
@ -0,0 +1,260 @@
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/*
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* Copyright 2011 Tilera Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation, version 2.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
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* NON INFRINGEMENT. See the GNU General Public License for
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* more details.
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*
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* copy new kernel into place and then call hv_reexec
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*
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*/
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#include <linux/linkage.h>
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#include <arch/chip.h>
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#include <asm/page.h>
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#include <hv/hypervisor.h>
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#undef RELOCATE_NEW_KERNEL_VERBOSE
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STD_ENTRY(relocate_new_kernel)
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move r30, r0 /* page list */
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move r31, r1 /* address of page we are on */
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move r32, r2 /* start address of new kernel */
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shrui r1, r1, PAGE_SHIFT
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addi r1, r1, 1
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shli sp, r1, PAGE_SHIFT
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addi sp, sp, -8
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/* we now have a stack (whether we need one or not) */
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moveli r40, hw2_last(hv_console_putc)
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shl16insli r40, r40, hw1(hv_console_putc)
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shl16insli r40, r40, hw0(hv_console_putc)
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#ifdef RELOCATE_NEW_KERNEL_VERBOSE
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moveli r0, 'r'
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jalr r40
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moveli r0, '_'
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jalr r40
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moveli r0, 'n'
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jalr r40
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moveli r0, '_'
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jalr r40
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moveli r0, 'k'
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jalr r40
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moveli r0, '\n'
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jalr r40
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#endif
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/*
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* Throughout this code r30 is pointer to the element of page
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* list we are working on.
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*
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* Normally we get to the next element of the page list by
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* incrementing r30 by eight. The exception is if the element
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* on the page list is an IND_INDIRECTION in which case we use
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* the element with the low bits masked off as the new value
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* of r30.
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*
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* To get this started, we need the value passed to us (which
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* will always be an IND_INDIRECTION) in memory somewhere with
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* r30 pointing at it. To do that, we push the value passed
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* to us on the stack and make r30 point to it.
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*/
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st sp, r30
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move r30, sp
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addi sp, sp, -16
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#if CHIP_HAS_CBOX_HOME_MAP()
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/*
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* On TILE-GX, we need to flush all tiles' caches, since we may
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* have been doing hash-for-home caching there. Note that we
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* must do this _after_ we're completely done modifying any memory
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* other than our output buffer (which we know is locally cached).
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* We want the caches to be fully clean when we do the reexec,
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* because the hypervisor is going to do this flush again at that
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* point, and we don't want that second flush to overwrite any memory.
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*/
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{
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move r0, zero /* cache_pa */
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moveli r1, hw2_last(HV_FLUSH_EVICT_L2)
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}
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{
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shl16insli r1, r1, hw1(HV_FLUSH_EVICT_L2)
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movei r2, -1 /* cache_cpumask; -1 means all client tiles */
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}
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{
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shl16insli r1, r1, hw0(HV_FLUSH_EVICT_L2) /* cache_control */
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move r3, zero /* tlb_va */
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}
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{
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move r4, zero /* tlb_length */
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move r5, zero /* tlb_pgsize */
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}
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{
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move r6, zero /* tlb_cpumask */
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move r7, zero /* asids */
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}
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{
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moveli r20, hw2_last(hv_flush_remote)
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move r8, zero /* asidcount */
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}
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shl16insli r20, r20, hw1(hv_flush_remote)
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shl16insli r20, r20, hw0(hv_flush_remote)
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jalr r20
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#endif
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/* r33 is destination pointer, default to zero */
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moveli r33, 0
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.Lloop: ld r10, r30
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andi r9, r10, 0xf /* low 4 bits tell us what type it is */
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xor r10, r10, r9 /* r10 is now value with low 4 bits stripped */
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cmpeqi r0, r9, 0x1 /* IND_DESTINATION */
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beqzt r0, .Ltry2
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move r33, r10
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#ifdef RELOCATE_NEW_KERNEL_VERBOSE
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moveli r0, 'd'
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jalr r40
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#endif
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addi r30, r30, 8
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j .Lloop
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.Ltry2:
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cmpeqi r0, r9, 0x2 /* IND_INDIRECTION */
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beqzt r0, .Ltry4
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move r30, r10
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#ifdef RELOCATE_NEW_KERNEL_VERBOSE
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moveli r0, 'i'
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jalr r40
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#endif
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j .Lloop
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.Ltry4:
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cmpeqi r0, r9, 0x4 /* IND_DONE */
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beqzt r0, .Ltry8
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mf
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#ifdef RELOCATE_NEW_KERNEL_VERBOSE
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moveli r0, 'D'
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jalr r40
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moveli r0, '\n'
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jalr r40
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#endif
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move r0, r32
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moveli r41, hw2_last(hv_reexec)
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shl16insli r41, r41, hw1(hv_reexec)
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shl16insli r41, r41, hw0(hv_reexec)
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jalr r41
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/* we should not get here */
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moveli r0, '?'
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jalr r40
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moveli r0, '\n'
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jalr r40
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j .Lhalt
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.Ltry8: cmpeqi r0, r9, 0x8 /* IND_SOURCE */
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beqz r0, .Lerr /* unknown type */
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/* copy page at r10 to page at r33 */
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move r11, r33
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moveli r0, hw2_last(PAGE_SIZE)
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shl16insli r0, r0, hw1(PAGE_SIZE)
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shl16insli r0, r0, hw0(PAGE_SIZE)
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add r33, r33, r0
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/* copy word at r10 to word at r11 until r11 equals r33 */
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/* We know page size must be multiple of 8, so we can unroll
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* 8 times safely without any edge case checking.
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*
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* Issue a flush of the destination every 8 words to avoid
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* incoherence when starting the new kernel. (Now this is
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* just good paranoia because the hv_reexec call will also
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* take care of this.)
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*/
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1:
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0; addi r11, r11, 8 }
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{ ld r0, r10; addi r10, r10, 8 }
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{ st r11, r0 }
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{ flush r11 ; addi r11, r11, 8 }
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cmpeq r0, r33, r11
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beqzt r0, 1b
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#ifdef RELOCATE_NEW_KERNEL_VERBOSE
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moveli r0, 's'
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jalr r40
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#endif
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addi r30, r30, 8
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j .Lloop
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.Lerr: moveli r0, 'e'
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jalr r40
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moveli r0, 'r'
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jalr r40
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moveli r0, 'r'
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jalr r40
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moveli r0, '\n'
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jalr r40
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.Lhalt:
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moveli r41, hw2_last(hv_halt)
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shl16insli r41, r41, hw1(hv_halt)
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shl16insli r41, r41, hw0(hv_halt)
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jalr r41
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STD_ENDPROC(relocate_new_kernel)
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.section .rodata,"a"
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.globl relocate_new_kernel_size
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relocate_new_kernel_size:
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.long .Lend_relocate_new_kernel - relocate_new_kernel
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