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PCI: Rework config space blocking services
pci_block_user_cfg_access was designed for the use case that a single context, the IPR driver, temporarily delays user space accesses to the config space via sysfs. This assumption became invalid by the time pci_dev_reset was added as locking instance. Today, if you run two loops in parallel that reset the same device via sysfs, you end up with a kernel BUG as pci_block_user_cfg_access detect the broken assumption. This reworks the pci_block_user_cfg_access to a sleeping service pci_cfg_access_lock and an atomic-compatible variant called pci_cfg_access_trylock. The former not only blocks user space access as before but also waits if access was already locked. The latter service just returns false in this case, allowing the caller to resolve the conflict instead of raising a BUG. Adaptions of the ipr driver were originally written by Brian King. Acked-by: Brian King <brking@linux.vnet.ibm.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
This commit is contained in:
parent
ae5cd86455
commit
fb51ccbf21
@ -127,20 +127,20 @@ EXPORT_SYMBOL(pci_write_vpd);
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* We have a bit per device to indicate it's blocked and a global wait queue
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* for callers to sleep on until devices are unblocked.
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*/
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static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
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static DECLARE_WAIT_QUEUE_HEAD(pci_cfg_wait);
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static noinline void pci_wait_ucfg(struct pci_dev *dev)
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static noinline void pci_wait_cfg(struct pci_dev *dev)
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{
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DECLARE_WAITQUEUE(wait, current);
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__add_wait_queue(&pci_ucfg_wait, &wait);
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__add_wait_queue(&pci_cfg_wait, &wait);
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do {
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set_current_state(TASK_UNINTERRUPTIBLE);
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raw_spin_unlock_irq(&pci_lock);
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schedule();
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raw_spin_lock_irq(&pci_lock);
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} while (dev->block_ucfg_access);
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__remove_wait_queue(&pci_ucfg_wait, &wait);
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} while (dev->block_cfg_access);
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__remove_wait_queue(&pci_cfg_wait, &wait);
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}
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/* Returns 0 on success, negative values indicate error. */
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@ -153,7 +153,8 @@ int pci_user_read_config_##size \
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if (PCI_##size##_BAD) \
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return -EINVAL; \
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raw_spin_lock_irq(&pci_lock); \
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if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
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if (unlikely(dev->block_cfg_access)) \
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pci_wait_cfg(dev); \
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ret = dev->bus->ops->read(dev->bus, dev->devfn, \
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pos, sizeof(type), &data); \
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raw_spin_unlock_irq(&pci_lock); \
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@ -172,7 +173,8 @@ int pci_user_write_config_##size \
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if (PCI_##size##_BAD) \
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return -EINVAL; \
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raw_spin_lock_irq(&pci_lock); \
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if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
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if (unlikely(dev->block_cfg_access)) \
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pci_wait_cfg(dev); \
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ret = dev->bus->ops->write(dev->bus, dev->devfn, \
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pos, sizeof(type), val); \
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raw_spin_unlock_irq(&pci_lock); \
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@ -401,36 +403,56 @@ int pci_vpd_truncate(struct pci_dev *dev, size_t size)
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EXPORT_SYMBOL(pci_vpd_truncate);
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/**
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* pci_block_user_cfg_access - Block userspace PCI config reads/writes
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* pci_cfg_access_lock - Lock PCI config reads/writes
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* @dev: pci device struct
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*
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* When user access is blocked, any reads or writes to config space will
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* sleep until access is unblocked again. We don't allow nesting of
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* block/unblock calls.
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* When access is locked, any userspace reads or writes to config
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* space and concurrent lock requests will sleep until access is
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* allowed via pci_cfg_access_unlocked again.
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*/
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void pci_block_user_cfg_access(struct pci_dev *dev)
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void pci_cfg_access_lock(struct pci_dev *dev)
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{
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unsigned long flags;
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int was_blocked;
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might_sleep();
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raw_spin_lock_irqsave(&pci_lock, flags);
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was_blocked = dev->block_ucfg_access;
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dev->block_ucfg_access = 1;
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raw_spin_unlock_irqrestore(&pci_lock, flags);
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/* If we BUG() inside the pci_lock, we're guaranteed to hose
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* the machine */
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BUG_ON(was_blocked);
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raw_spin_lock_irq(&pci_lock);
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if (dev->block_cfg_access)
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pci_wait_cfg(dev);
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dev->block_cfg_access = 1;
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raw_spin_unlock_irq(&pci_lock);
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}
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EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
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EXPORT_SYMBOL_GPL(pci_cfg_access_lock);
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/**
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* pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
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* pci_cfg_access_trylock - try to lock PCI config reads/writes
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* @dev: pci device struct
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*
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* This function allows userspace PCI config accesses to resume.
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* Same as pci_cfg_access_lock, but will return 0 if access is
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* already locked, 1 otherwise. This function can be used from
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* atomic contexts.
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*/
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void pci_unblock_user_cfg_access(struct pci_dev *dev)
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bool pci_cfg_access_trylock(struct pci_dev *dev)
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{
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unsigned long flags;
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bool locked = true;
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raw_spin_lock_irqsave(&pci_lock, flags);
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if (dev->block_cfg_access)
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locked = false;
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else
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dev->block_cfg_access = 1;
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raw_spin_unlock_irqrestore(&pci_lock, flags);
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return locked;
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}
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EXPORT_SYMBOL_GPL(pci_cfg_access_trylock);
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/**
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* pci_cfg_access_unlock - Unlock PCI config reads/writes
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* @dev: pci device struct
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*
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* This function allows PCI config accesses to resume.
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*/
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void pci_cfg_access_unlock(struct pci_dev *dev)
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{
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unsigned long flags;
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@ -438,10 +460,10 @@ void pci_unblock_user_cfg_access(struct pci_dev *dev)
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/* This indicates a problem in the caller, but we don't need
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* to kill them, unlike a double-block above. */
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WARN_ON(!dev->block_ucfg_access);
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WARN_ON(!dev->block_cfg_access);
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dev->block_ucfg_access = 0;
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wake_up_all(&pci_ucfg_wait);
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dev->block_cfg_access = 0;
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wake_up_all(&pci_cfg_wait);
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raw_spin_unlock_irqrestore(&pci_lock, flags);
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}
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EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
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EXPORT_SYMBOL_GPL(pci_cfg_access_unlock);
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@ -348,10 +348,10 @@ static int sriov_enable(struct pci_dev *dev, int nr_virtfn)
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}
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iov->ctrl |= PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE;
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pci_block_user_cfg_access(dev);
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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msleep(100);
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pci_unblock_user_cfg_access(dev);
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pci_cfg_access_unlock(dev);
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iov->initial = initial;
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if (nr_virtfn < initial)
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@ -379,10 +379,10 @@ failed:
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virtfn_remove(dev, j, 0);
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
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pci_block_user_cfg_access(dev);
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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ssleep(1);
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pci_unblock_user_cfg_access(dev);
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pci_cfg_access_unlock(dev);
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if (iov->link != dev->devfn)
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sysfs_remove_link(&dev->dev.kobj, "dep_link");
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@ -405,10 +405,10 @@ static void sriov_disable(struct pci_dev *dev)
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virtfn_remove(dev, i, 0);
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iov->ctrl &= ~(PCI_SRIOV_CTRL_VFE | PCI_SRIOV_CTRL_MSE);
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pci_block_user_cfg_access(dev);
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pci_cfg_access_lock(dev);
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pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl);
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ssleep(1);
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pci_unblock_user_cfg_access(dev);
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pci_cfg_access_unlock(dev);
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if (iov->link != dev->devfn)
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sysfs_remove_link(&dev->dev.kobj, "dep_link");
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@ -2965,7 +2965,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
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might_sleep();
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if (!probe) {
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pci_block_user_cfg_access(dev);
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pci_cfg_access_lock(dev);
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/* block PM suspend, driver probe, etc. */
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device_lock(&dev->dev);
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}
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@ -2990,7 +2990,7 @@ static int pci_dev_reset(struct pci_dev *dev, int probe)
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done:
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if (!probe) {
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device_unlock(&dev->dev);
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pci_unblock_user_cfg_access(dev);
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pci_cfg_access_unlock(dev);
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}
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return rc;
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@ -7638,8 +7638,12 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd)
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**/
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static int ipr_reset_bist_done(struct ipr_cmnd *ipr_cmd)
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{
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struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
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ENTER;
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pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev);
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if (ioa_cfg->cfg_locked)
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pci_cfg_access_unlock(ioa_cfg->pdev);
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ioa_cfg->cfg_locked = 0;
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ipr_cmd->job_step = ipr_reset_restore_cfg_space;
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LEAVE;
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return IPR_RC_JOB_CONTINUE;
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@ -7660,8 +7664,6 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
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int rc = PCIBIOS_SUCCESSFUL;
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ENTER;
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pci_block_user_cfg_access(ioa_cfg->pdev);
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if (ioa_cfg->ipr_chip->bist_method == IPR_MMIO)
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writel(IPR_UPROCI_SIS64_START_BIST,
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ioa_cfg->regs.set_uproc_interrupt_reg32);
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@ -7673,7 +7675,9 @@ static int ipr_reset_start_bist(struct ipr_cmnd *ipr_cmd)
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ipr_reset_start_timer(ipr_cmd, IPR_WAIT_FOR_BIST_TIMEOUT);
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rc = IPR_RC_JOB_RETURN;
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} else {
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pci_unblock_user_cfg_access(ipr_cmd->ioa_cfg->pdev);
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if (ioa_cfg->cfg_locked)
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pci_cfg_access_unlock(ipr_cmd->ioa_cfg->pdev);
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ioa_cfg->cfg_locked = 0;
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ipr_cmd->s.ioasa.hdr.ioasc = cpu_to_be32(IPR_IOASC_PCI_ACCESS_ERROR);
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rc = IPR_RC_JOB_CONTINUE;
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}
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@ -7716,7 +7720,6 @@ static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
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struct pci_dev *pdev = ioa_cfg->pdev;
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ENTER;
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pci_block_user_cfg_access(pdev);
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pci_set_pcie_reset_state(pdev, pcie_warm_reset);
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ipr_cmd->job_step = ipr_reset_slot_reset_done;
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ipr_reset_start_timer(ipr_cmd, IPR_PCI_RESET_TIMEOUT);
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@ -7724,6 +7727,56 @@ static int ipr_reset_slot_reset(struct ipr_cmnd *ipr_cmd)
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return IPR_RC_JOB_RETURN;
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}
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/**
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* ipr_reset_block_config_access_wait - Wait for permission to block config access
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* @ipr_cmd: ipr command struct
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*
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* Description: This attempts to block config access to the IOA.
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*
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* Return value:
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* IPR_RC_JOB_CONTINUE / IPR_RC_JOB_RETURN
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**/
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static int ipr_reset_block_config_access_wait(struct ipr_cmnd *ipr_cmd)
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{
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struct ipr_ioa_cfg *ioa_cfg = ipr_cmd->ioa_cfg;
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int rc = IPR_RC_JOB_CONTINUE;
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if (pci_cfg_access_trylock(ioa_cfg->pdev)) {
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ioa_cfg->cfg_locked = 1;
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ipr_cmd->job_step = ioa_cfg->reset;
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} else {
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if (ipr_cmd->u.time_left) {
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rc = IPR_RC_JOB_RETURN;
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ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
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ipr_reset_start_timer(ipr_cmd,
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IPR_CHECK_FOR_RESET_TIMEOUT);
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} else {
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ipr_cmd->job_step = ioa_cfg->reset;
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dev_err(&ioa_cfg->pdev->dev,
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"Timed out waiting to lock config access. Resetting anyway.\n");
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}
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}
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return rc;
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}
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/**
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* ipr_reset_block_config_access - Block config access to the IOA
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* @ipr_cmd: ipr command struct
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*
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* Description: This attempts to block config access to the IOA
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*
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* Return value:
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* IPR_RC_JOB_CONTINUE
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**/
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static int ipr_reset_block_config_access(struct ipr_cmnd *ipr_cmd)
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{
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ipr_cmd->ioa_cfg->cfg_locked = 0;
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ipr_cmd->job_step = ipr_reset_block_config_access_wait;
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ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
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return IPR_RC_JOB_CONTINUE;
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}
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/**
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* ipr_reset_allowed - Query whether or not IOA can be reset
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* @ioa_cfg: ioa config struct
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@ -7763,7 +7816,7 @@ static int ipr_reset_wait_to_start_bist(struct ipr_cmnd *ipr_cmd)
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ipr_cmd->u.time_left -= IPR_CHECK_FOR_RESET_TIMEOUT;
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ipr_reset_start_timer(ipr_cmd, IPR_CHECK_FOR_RESET_TIMEOUT);
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} else {
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ipr_cmd->job_step = ioa_cfg->reset;
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ipr_cmd->job_step = ipr_reset_block_config_access;
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rc = IPR_RC_JOB_CONTINUE;
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}
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@ -7796,7 +7849,7 @@ static int ipr_reset_alert(struct ipr_cmnd *ipr_cmd)
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writel(IPR_UPROCI_RESET_ALERT, ioa_cfg->regs.set_uproc_interrupt_reg32);
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ipr_cmd->job_step = ipr_reset_wait_to_start_bist;
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} else {
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ipr_cmd->job_step = ioa_cfg->reset;
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ipr_cmd->job_step = ipr_reset_block_config_access;
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}
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ipr_cmd->u.time_left = IPR_WAIT_FOR_RESET_TIMEOUT;
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@ -1387,6 +1387,7 @@ struct ipr_ioa_cfg {
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u8 msi_received:1;
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u8 sis64:1;
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u8 dump_timeout:1;
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u8 cfg_locked:1;
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u8 revid;
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@ -55,7 +55,8 @@ static irqreturn_t irqhandler(int irq, struct uio_info *info)
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BUILD_BUG_ON(PCI_COMMAND % 4);
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BUILD_BUG_ON(PCI_COMMAND + 2 != PCI_STATUS);
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pci_block_user_cfg_access(pdev);
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if (!pci_cfg_access_trylock(pdev))
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goto error;
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/* Read both command and status registers in a single 32-bit operation.
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* Note: we could cache the value for command and move the status read
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@ -79,7 +80,7 @@ static irqreturn_t irqhandler(int irq, struct uio_info *info)
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ret = IRQ_HANDLED;
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done:
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pci_unblock_user_cfg_access(pdev);
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pci_cfg_access_lock(pdev);
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return ret;
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}
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@ -91,7 +92,7 @@ static int __devinit verify_pci_2_3(struct pci_dev *pdev)
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u16 orig, new;
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int err = 0;
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pci_block_user_cfg_access(pdev);
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pci_cfg_access_lock(pdev);
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pci_read_config_word(pdev, PCI_COMMAND, &orig);
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pci_write_config_word(pdev, PCI_COMMAND,
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orig ^ PCI_COMMAND_INTX_DISABLE);
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@ -114,7 +115,7 @@ static int __devinit verify_pci_2_3(struct pci_dev *pdev)
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/* Now restore the original value. */
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pci_write_config_word(pdev, PCI_COMMAND, orig);
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err:
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pci_unblock_user_cfg_access(pdev);
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pci_cfg_access_unlock(pdev);
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return err;
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}
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@ -308,7 +308,7 @@ struct pci_dev {
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unsigned int is_added:1;
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unsigned int is_busmaster:1; /* device is busmaster */
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unsigned int no_msi:1; /* device may not use msi */
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unsigned int block_ucfg_access:1; /* userspace config space access is blocked */
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unsigned int block_cfg_access:1; /* config space access is blocked */
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unsigned int broken_parity_status:1; /* Device generates false positive parity */
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unsigned int irq_reroute_variant:2; /* device needs IRQ rerouting variant */
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unsigned int msi_enabled:1;
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@ -1085,8 +1085,9 @@ int ht_create_irq(struct pci_dev *dev, int idx);
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void ht_destroy_irq(unsigned int irq);
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#endif /* CONFIG_HT_IRQ */
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extern void pci_block_user_cfg_access(struct pci_dev *dev);
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extern void pci_unblock_user_cfg_access(struct pci_dev *dev);
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extern void pci_cfg_access_lock(struct pci_dev *dev);
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extern bool pci_cfg_access_trylock(struct pci_dev *dev);
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extern void pci_cfg_access_unlock(struct pci_dev *dev);
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/*
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* PCI domain support. Sometimes called PCI segment (eg by ACPI),
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@ -1283,10 +1284,13 @@ static inline void pci_release_regions(struct pci_dev *dev)
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#define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0)
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static inline void pci_block_user_cfg_access(struct pci_dev *dev)
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static inline void pci_block_cfg_access(struct pci_dev *dev)
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{ }
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|
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static inline void pci_unblock_user_cfg_access(struct pci_dev *dev)
|
||||
static inline int pci_block_cfg_access_in_atomic(struct pci_dev *dev)
|
||||
{ return 0; }
|
||||
|
||||
static inline void pci_unblock_cfg_access(struct pci_dev *dev)
|
||||
{ }
|
||||
|
||||
static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from)
|
||||
|
Loading…
Reference in New Issue
Block a user