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MIPS: Idle: Re-enable irqs at the end of r3081, au1k and loongson2 cpu_wait.
Without this, the WARN_ON_ONCE(irqs_disabled()); in the idle loop will be triggered. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -34,6 +34,7 @@ static void r3081_wait(void)
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{
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{
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unsigned long cfg = read_c0_conf();
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unsigned long cfg = read_c0_conf();
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write_c0_conf(cfg | R30XX_CONF_HALT);
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write_c0_conf(cfg | R30XX_CONF_HALT);
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local_irq_enable();
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}
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}
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static void r39xx_wait(void)
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static void r39xx_wait(void)
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@ -109,6 +110,7 @@ static void au1k_wait(void)
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" nop \n"
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" nop \n"
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" .set mips0 \n"
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" .set mips0 \n"
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: : "r" (au1k_wait));
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: : "r" (au1k_wait));
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local_irq_enable();
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}
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}
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static int __initdata nowait;
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static int __initdata nowait;
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@ -200,6 +200,7 @@ static void loongson2_cpu_wait(void)
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LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
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LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */
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LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
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LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */
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spin_unlock_irqrestore(&loongson2_wait_lock, flags);
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spin_unlock_irqrestore(&loongson2_wait_lock, flags);
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local_irq_enable();
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}
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}
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static int __init cpufreq_init(void)
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static int __init cpufreq_init(void)
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