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regmap-irq: Introduce config registers for irq types
Config registers provide a more uniform approach to handling irq type registers. They are essentially an extension of the virtual registers used by the qcom-pm8008 driver. Config registers can be represented as a 2D array: config_base[0] reg0,0 reg0,1 reg0,2 reg0,3 config_base[1] reg1,0 reg1,1 reg1,2 reg1,3 config_base[2] reg2,0 reg2,1 reg2,2 reg2,3 There are 'num_config_bases' base registers, each of which is used to address 'num_config_regs' registers. The addresses are calculated in the same way as for other bases. It is assumed that an irq's type is controlled by one column of registers; that column is identified by the irq's 'type_reg_offset'. The set_type_config() callback is responsible for updating the config register contents. It receives an array of buffers (each represents a row of registers) and the index of the column to update, along with the 'struct regmap_irq' description and requested irq type. Buffered values are written to registers in regmap_irq_sync_unlock(). Note that the entire register contents are overwritten, which is a minor change in behavior from type registers via 'type_base'. Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com> Link: https://lore.kernel.org/r/20220623211420.918875-9-aidanmacdonald.0x0@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -39,6 +39,7 @@ struct regmap_irq_chip_data {
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unsigned int *type_buf;
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unsigned int *type_buf_def;
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unsigned int **virt_buf;
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unsigned int **config_buf;
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unsigned int irq_reg_stride;
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@ -228,6 +229,17 @@ static void regmap_irq_sync_unlock(struct irq_data *data)
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}
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}
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for (i = 0; i < d->chip->num_config_bases; i++) {
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for (j = 0; j < d->chip->num_config_regs; j++) {
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reg = sub_irq_reg(d, d->chip->config_base[i], j);
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ret = regmap_write(map, reg, d->config_buf[i][j]);
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if (ret)
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dev_err(d->map->dev,
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"Failed to write config %x: %d\n",
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reg, ret);
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}
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}
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if (d->chip->runtime_pm)
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pm_runtime_put(map->dev);
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@ -287,7 +299,7 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
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struct regmap_irq_chip_data *d = irq_data_get_irq_chip_data(data);
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struct regmap *map = d->map;
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const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq);
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int reg;
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int reg, ret;
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const struct regmap_irq_type *t = &irq_data->type;
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if ((t->types_supported & type) != type)
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@ -327,9 +339,19 @@ static int regmap_irq_set_type(struct irq_data *data, unsigned int type)
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return -EINVAL;
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}
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if (d->chip->set_type_virt)
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return d->chip->set_type_virt(d->virt_buf, type, data->hwirq,
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reg);
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if (d->chip->set_type_virt) {
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ret = d->chip->set_type_virt(d->virt_buf, type, data->hwirq,
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reg);
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if (ret)
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return ret;
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}
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if (d->chip->set_type_config) {
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ret = d->chip->set_type_config(d->config_buf, type,
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irq_data, reg);
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if (ret)
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return ret;
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}
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return 0;
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}
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@ -599,6 +621,61 @@ static const struct irq_domain_ops regmap_domain_ops = {
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.xlate = irq_domain_xlate_onetwocell,
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};
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/**
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* regmap_irq_set_type_config_simple() - Simple IRQ type configuration callback.
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* @buf: Buffer containing configuration register values, this is a 2D array of
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* `num_config_bases` rows, each of `num_config_regs` elements.
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* @type: The requested IRQ type.
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* @irq_data: The IRQ being configured.
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* @idx: Index of the irq's config registers within each array `buf[i]`
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*
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* This is a &struct regmap_irq_chip->set_type_config callback suitable for
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* chips with one config register. Register values are updated according to
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* the &struct regmap_irq_type data associated with an IRQ.
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*/
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int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
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const struct regmap_irq *irq_data, int idx)
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{
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const struct regmap_irq_type *t = &irq_data->type;
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if (t->type_reg_mask)
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buf[0][idx] &= ~t->type_reg_mask;
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else
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buf[0][idx] &= ~(t->type_falling_val |
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t->type_rising_val |
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t->type_level_low_val |
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t->type_level_high_val);
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switch (type) {
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case IRQ_TYPE_EDGE_FALLING:
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buf[0][idx] |= t->type_falling_val;
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break;
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case IRQ_TYPE_EDGE_RISING:
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buf[0][idx] |= t->type_rising_val;
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break;
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case IRQ_TYPE_EDGE_BOTH:
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buf[0][idx] |= (t->type_falling_val |
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t->type_rising_val);
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break;
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case IRQ_TYPE_LEVEL_HIGH:
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buf[0][idx] |= t->type_level_high_val;
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break;
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case IRQ_TYPE_LEVEL_LOW:
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buf[0][idx] |= t->type_level_low_val;
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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EXPORT_SYMBOL_GPL(regmap_irq_set_type_config_simple);
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/**
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* regmap_add_irq_chip_fwnode() - Use standard regmap IRQ controller handling
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*
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@ -724,6 +801,24 @@ int regmap_add_irq_chip_fwnode(struct fwnode_handle *fwnode,
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}
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}
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if (chip->num_config_bases && chip->num_config_regs) {
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/*
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* Create config_buf[num_config_bases][num_config_regs]
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*/
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d->config_buf = kcalloc(chip->num_config_bases,
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sizeof(*d->config_buf), GFP_KERNEL);
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if (!d->config_buf)
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goto err_alloc;
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for (i = 0; i < chip->num_config_regs; i++) {
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d->config_buf[i] = kcalloc(chip->num_config_regs,
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sizeof(**d->config_buf),
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GFP_KERNEL);
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if (!d->config_buf[i])
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goto err_alloc;
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}
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}
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d->irq_chip = regmap_irq_chip;
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d->irq_chip.name = chip->name;
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d->irq = irq;
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@ -894,6 +989,11 @@ err_alloc:
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kfree(d->virt_buf[i]);
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kfree(d->virt_buf);
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}
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if (d->config_buf) {
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for (i = 0; i < chip->num_config_bases; i++)
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kfree(d->config_buf[i]);
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kfree(d->config_buf);
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}
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kfree(d);
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return ret;
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}
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@ -934,7 +1034,7 @@ EXPORT_SYMBOL_GPL(regmap_add_irq_chip);
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void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
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{
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unsigned int virq;
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int hwirq;
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int i, hwirq;
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if (!d)
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return;
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@ -964,6 +1064,11 @@ void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *d)
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kfree(d->mask_buf);
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kfree(d->status_reg_buf);
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kfree(d->status_buf);
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if (d->config_buf) {
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for (i = 0; i < d->chip->num_config_bases; i++)
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kfree(d->config_buf[i]);
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kfree(d->config_buf);
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}
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kfree(d);
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}
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EXPORT_SYMBOL_GPL(regmap_del_irq_chip);
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@ -1475,6 +1475,7 @@ struct regmap_irq_sub_irq_map {
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* @wake_base: Base address for wake enables. If zero unsupported.
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* @type_base: Base address for irq type. If zero unsupported.
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* @virt_reg_base: Base addresses for extra config regs.
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* @config_base: Base address for IRQ type config regs. If null unsupported.
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* @irq_reg_stride: Stride to use for chips where registers are not contiguous.
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* @init_ack_masked: Ack all masked interrupts once during initalization.
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* @mask_invert: Inverted mask register: cleared bits are masked out.
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@ -1504,12 +1505,15 @@ struct regmap_irq_sub_irq_map {
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* @num_type_reg: Number of type registers.
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* @num_virt_regs: Number of non-standard irq configuration registers.
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* If zero unsupported.
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* @num_config_bases: Number of config base registers.
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* @num_config_regs: Number of config registers for each config base register.
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* @handle_pre_irq: Driver specific callback to handle interrupt from device
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* before regmap_irq_handler process the interrupts.
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* @handle_post_irq: Driver specific callback to handle interrupt from device
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* after handling the interrupts in regmap_irq_handler().
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* @set_type_virt: Driver specific callback to extend regmap_irq_set_type()
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* and configure virt regs.
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* @set_type_config: Callback used for configuring irq types.
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* @irq_drv_data: Driver specific IRQ data which is passed as parameter when
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* driver specific pre/post interrupt handler is called.
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*
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@ -1532,6 +1536,7 @@ struct regmap_irq_chip {
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unsigned int wake_base;
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unsigned int type_base;
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unsigned int *virt_reg_base;
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const unsigned int *config_base;
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unsigned int irq_reg_stride;
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unsigned int init_ack_masked:1;
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unsigned int mask_invert:1;
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@ -1553,16 +1558,23 @@ struct regmap_irq_chip {
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int num_type_reg;
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int num_virt_regs;
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int num_config_bases;
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int num_config_regs;
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int (*handle_pre_irq)(void *irq_drv_data);
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int (*handle_post_irq)(void *irq_drv_data);
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int (*set_type_virt)(unsigned int **buf, unsigned int type,
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unsigned long hwirq, int reg);
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int (*set_type_config)(unsigned int **buf, unsigned int type,
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const struct regmap_irq *irq_data, int idx);
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void *irq_drv_data;
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};
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struct regmap_irq_chip_data;
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int regmap_irq_set_type_config_simple(unsigned int **buf, unsigned int type,
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const struct regmap_irq *irq_data, int idx);
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int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
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int irq_base, const struct regmap_irq_chip *chip,
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struct regmap_irq_chip_data **data);
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