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drm/amdgpu/gfx: enable mes to map legacy queue support
Enable mes to map legacy queue support. v2: kiq_set_resources is required. Signed-off-by: Jack Xiao <Jack.Xiao@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -623,10 +623,14 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
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queue_mask |= (1ull << amdgpu_queue_mask_bit_to_set_resource_bit(adev, i));
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}
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DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
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kiq_ring->queue);
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amdgpu_device_flush_hdp(adev, NULL);
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if (adev->enable_mes)
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queue_mask = ~0ULL;
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DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe,
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kiq_ring->queue);
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spin_lock(&kiq->ring_lock);
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r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size *
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adev->gfx.num_compute_rings +
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@ -637,14 +641,14 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
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return r;
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}
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if (adev->enable_mes)
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queue_mask = ~0ULL;
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kiq->pmf->kiq_set_resources(kiq_ring, queue_mask);
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for (i = 0; i < adev->gfx.num_compute_rings; i++) {
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j = i + xcc_id * adev->gfx.num_compute_rings;
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kiq->pmf->kiq_map_queues(kiq_ring,
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&adev->gfx.compute_ring[j]);
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if (!adev->enable_mes) {
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for (i = 0; i < adev->gfx.num_compute_rings; i++) {
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j = i + xcc_id * adev->gfx.num_compute_rings;
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kiq->pmf->kiq_map_queues(kiq_ring,
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&adev->gfx.compute_ring[j]);
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}
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}
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r = amdgpu_ring_test_helper(kiq_ring);
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@ -652,6 +656,20 @@ int amdgpu_gfx_enable_kcq(struct amdgpu_device *adev, int xcc_id)
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if (r)
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DRM_ERROR("KCQ enable failed\n");
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if (adev->enable_mes) {
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for (i = 0; i < adev->gfx.num_compute_rings; i++) {
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j = i + xcc_id * adev->gfx.num_compute_rings;
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r = amdgpu_mes_map_legacy_queue(adev,
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&adev->gfx.compute_ring[j]);
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if (r) {
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DRM_ERROR("failed to map compute queue\n");
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return r;
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}
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}
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return 0;
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}
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return r;
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}
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@ -666,6 +684,20 @@ int amdgpu_gfx_enable_kgq(struct amdgpu_device *adev, int xcc_id)
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amdgpu_device_flush_hdp(adev, NULL);
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if (adev->enable_mes) {
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for (i = 0; i < adev->gfx.num_gfx_rings; i++) {
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j = i + xcc_id * adev->gfx.num_gfx_rings;
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r = amdgpu_mes_map_legacy_queue(adev,
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&adev->gfx.gfx_ring[j]);
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if (r) {
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DRM_ERROR("failed to map gfx queue\n");
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return r;
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}
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}
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return 0;
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}
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spin_lock(&kiq->ring_lock);
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/* No need to map kcq on the slave */
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if (amdgpu_gfx_is_master_xcc(adev, xcc_id)) {
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