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powerpc fixes for 5.5 #3
One fix for a regression introduced by our recent rework of cache flushing on memory hotunplug. Like several other arches, our VDSO clock_getres() needed a fix to match the semantics of posix_get_hrtimer_res(). A fix for a boot crash on Power9 LPARs using PCI LSI interrupts. A commit disabling use of the trace_imc PMU (not the core PMU) on Power9 systems, because it can lead to checkstops, until a workaround is developed. A handful of other minor fixes. Thanks to: Aneesh Kumar K.V, Anju T Sudhakar, Ard Biesheuvel, Christophe Leroy, Cédric Le Goater, Madhavan Srinivasan, Vincenzo Frascino. -----BEGIN PGP SIGNATURE----- iQJHBAABCAAxFiEEJFGtCPCthwEv2Y/bUevqPMjhpYAFAl3qRJcTHG1wZUBlbGxl cm1hbi5pZC5hdQAKCRBR6+o8yOGlgDymD/4lqWlFnXBUJA0MrYGa6PI7AA7W+oFC vVAFobQ0kCI7RiWv8UW1GKAOkQKIhIhCxl/TEv5DNevajelsvfaPeF/nlI5fL2y9 klrvpMvQmEvBVTDispKQy3+pIr8EDWlvVOhFzU8YQMSZirxACLCmM/XNSmboCSR8 Y3chFNgEL9nYpEVxX+IhN9oTJ8/eCJqfp8QhcVt1kG/jXnf8CVfSx7z/Qr1IarIT 3LiiDBCCJbtG4WWH3Ku9WaCBZ66QxcTz/3RonGffYhalguhQjXl2vSdz9gg/icos G0H372ONZ5MkUj+IkyTTs/tmg2QVEzn1ZsVkstJZphbJ+/5VmrpdiAH0FvuJ/CaN kJ0dww4I9IEC2bl9Ok9XKNZSoQaXckfkPdX6JcHqD52pCIaBCoG+MdOvi0eMfcBj SDKuCK2BiAz+aOt0buSaqlgUNA6wXneb96h3I0u7CcV/CuzKChkJMLC6aJYB32DB gPZsnaespvOHBtbcLFP6RFAlY/nwaeLHTfSlLrbvs6k+5w9+ZUHA81uMzEBhNLN6 ANPx57lDOzmlAQ/8fLyvGRWCdYZVGKmO4GaQXV9eDKn6lNV94hHkYMe0JX0bI0M9 1SZP20t+zBBBV80nO7+JHEAxpTnT4RA6GNJ8p/bPyawEo6xdD1IMIZQy+EKYg++Q BeK76ccKp7wtZg== =1Q9O -----END PGP SIGNATURE----- Merge tag 'powerpc-5.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: "One fix for a regression introduced by our recent rework of cache flushing on memory hotunplug. Like several other arches, our VDSO clock_getres() needed a fix to match the semantics of posix_get_hrtimer_res(). A fix for a boot crash on Power9 LPARs using PCI LSI interrupts. A commit disabling use of the trace_imc PMU (not the core PMU) on Power9 systems, because it can lead to checkstops, until a workaround is developed. A handful of other minor fixes. Thanks to: Aneesh Kumar K.V, Anju T Sudhakar, Ard Biesheuvel, Christophe Leroy, Cédric Le Goater, Madhavan Srinivasan, Vincenzo Frascino" * tag 'powerpc-5.5-3' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/perf: Disable trace_imc pmu powerpc/powernv: Avoid re-registration of imc debugfs directory powerpc/pmem: Convert to EXPORT_SYMBOL_GPL powerpc/archrandom: fix arch_get_random_seed_int() powerpc: Fix vDSO clock_getres() powerpc/pmem: Fix kernel crash due to wrong range value usage in flush_dcache_range powerpc/xive: Skip ioremap() of ESB pages for LSI interrupts powerpc/kasan: Fix boot failure with RELOCATABLE && FSL_BOOKE
This commit is contained in:
commit
f89d416a86
@ -28,7 +28,7 @@ static inline int arch_get_random_seed_int(unsigned int *v)
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unsigned long val;
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int rc;
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rc = arch_get_random_long(&val);
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rc = arch_get_random_seed_long(&val);
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if (rc)
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*v = val;
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@ -83,6 +83,7 @@ struct vdso_data {
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__s64 wtom_clock_sec; /* Wall to monotonic clock sec */
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__s64 stamp_xtime_sec; /* xtime secs as at tb_orig_stamp */
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__s64 stamp_xtime_nsec; /* xtime nsecs as at tb_orig_stamp */
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__u32 hrtimer_res; /* hrtimer resolution */
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__u32 syscall_map_64[SYSCALL_MAP_SIZE]; /* map of syscalls */
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__u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
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};
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@ -105,6 +106,7 @@ struct vdso_data {
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__s32 stamp_xtime_sec; /* xtime seconds as at tb_orig_stamp */
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__s32 stamp_xtime_nsec; /* xtime nsecs as at tb_orig_stamp */
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__u32 stamp_sec_fraction; /* fractional seconds of stamp_xtime */
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__u32 hrtimer_res; /* hrtimer resolution */
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__u32 syscall_map_32[SYSCALL_MAP_SIZE]; /* map of syscalls */
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__u32 dcache_block_size; /* L1 d-cache block size */
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__u32 icache_block_size; /* L1 i-cache block size */
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@ -388,6 +388,7 @@ int main(void)
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OFFSET(STAMP_XTIME_SEC, vdso_data, stamp_xtime_sec);
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OFFSET(STAMP_XTIME_NSEC, vdso_data, stamp_xtime_nsec);
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OFFSET(STAMP_SEC_FRAC, vdso_data, stamp_sec_fraction);
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OFFSET(CLOCK_HRTIMER_RES, vdso_data, hrtimer_res);
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OFFSET(CFG_ICACHE_BLOCKSZ, vdso_data, icache_block_size);
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OFFSET(CFG_DCACHE_BLOCKSZ, vdso_data, dcache_block_size);
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OFFSET(CFG_ICACHE_LOGBLOCKSZ, vdso_data, icache_log_block_size);
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@ -413,7 +414,6 @@ int main(void)
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DEFINE(CLOCK_REALTIME_COARSE, CLOCK_REALTIME_COARSE);
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DEFINE(CLOCK_MONOTONIC_COARSE, CLOCK_MONOTONIC_COARSE);
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DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
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DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
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#ifdef CONFIG_BUG
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DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
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@ -240,6 +240,9 @@ set_ivor:
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bl early_init
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#ifdef CONFIG_KASAN
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bl kasan_early_init
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#endif
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#ifdef CONFIG_RELOCATABLE
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mr r3,r30
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mr r4,r31
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@ -266,9 +269,6 @@ set_ivor:
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/*
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* Decide what sort of machine this is and initialize the MMU.
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*/
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#ifdef CONFIG_KASAN
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bl kasan_early_init
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#endif
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mr r3,r30
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mr r4,r31
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bl machine_init
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@ -960,6 +960,7 @@ void update_vsyscall(struct timekeeper *tk)
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vdso_data->stamp_xtime_sec = xt.tv_sec;
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vdso_data->stamp_xtime_nsec = xt.tv_nsec;
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vdso_data->stamp_sec_fraction = frac_sec;
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vdso_data->hrtimer_res = hrtimer_resolution;
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smp_wmb();
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++(vdso_data->tb_update_count);
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}
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@ -154,12 +154,15 @@ V_FUNCTION_BEGIN(__kernel_clock_getres)
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cror cr0*4+eq,cr0*4+eq,cr1*4+eq
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bne cr0,99f
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mflr r12
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.cfi_register lr,r12
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bl __get_datapage@local /* get data page */
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lwz r5, CLOCK_HRTIMER_RES(r3)
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mtlr r12
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li r3,0
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cmpli cr0,r4,0
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crclr cr0*4+so
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beqlr
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lis r5,CLOCK_REALTIME_RES@h
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ori r5,r5,CLOCK_REALTIME_RES@l
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stw r3,TSPC32_TV_SEC(r4)
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stw r5,TSPC32_TV_NSEC(r4)
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blr
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@ -186,12 +186,15 @@ V_FUNCTION_BEGIN(__kernel_clock_getres)
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cror cr0*4+eq,cr0*4+eq,cr1*4+eq
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bne cr0,99f
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mflr r12
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.cfi_register lr,r12
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bl V_LOCAL_FUNC(__get_datapage)
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lwz r5, CLOCK_HRTIMER_RES(r3)
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mtlr r12
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li r3,0
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cmpldi cr0,r4,0
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crclr cr0*4+so
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beqlr
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lis r5,CLOCK_REALTIME_RES@h
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ori r5,r5,CLOCK_REALTIME_RES@l
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std r3,TSPC64_TV_SEC(r4)
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std r5,TSPC64_TV_NSEC(r4)
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blr
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@ -17,14 +17,14 @@ void arch_wb_cache_pmem(void *addr, size_t size)
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unsigned long start = (unsigned long) addr;
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flush_dcache_range(start, start + size);
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}
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EXPORT_SYMBOL(arch_wb_cache_pmem);
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EXPORT_SYMBOL_GPL(arch_wb_cache_pmem);
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void arch_invalidate_pmem(void *addr, size_t size)
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{
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unsigned long start = (unsigned long) addr;
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flush_dcache_range(start, start + size);
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}
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EXPORT_SYMBOL(arch_invalidate_pmem);
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EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
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/*
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* CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE symbols
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@ -121,7 +121,7 @@ static void flush_dcache_range_chunked(unsigned long start, unsigned long stop,
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unsigned long i;
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for (i = start; i < stop; i += chunk) {
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flush_dcache_range(i, min(stop, start + chunk));
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flush_dcache_range(i, min(stop, i + chunk));
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cond_resched();
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}
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}
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@ -59,10 +59,6 @@ static void export_imc_mode_and_cmd(struct device_node *node,
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imc_debugfs_parent = debugfs_create_dir("imc", powerpc_debugfs_root);
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/*
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* Return here, either because 'imc' directory already exists,
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* Or failed to create a new one.
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*/
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if (!imc_debugfs_parent)
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return;
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@ -135,7 +131,6 @@ static int imc_get_mem_addr_nest(struct device_node *node,
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}
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pmu_ptr->imc_counter_mmaped = true;
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export_imc_mode_and_cmd(node, pmu_ptr);
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kfree(base_addr_arr);
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kfree(chipid_arr);
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return 0;
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@ -151,7 +146,7 @@ error:
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* and domain as the inputs.
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* Allocates memory for the struct imc_pmu, sets up its domain, size and offsets
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*/
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static int imc_pmu_create(struct device_node *parent, int pmu_index, int domain)
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static struct imc_pmu *imc_pmu_create(struct device_node *parent, int pmu_index, int domain)
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{
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int ret = 0;
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struct imc_pmu *pmu_ptr;
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@ -159,28 +154,24 @@ static int imc_pmu_create(struct device_node *parent, int pmu_index, int domain)
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/* Return for unknown domain */
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if (domain < 0)
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return -EINVAL;
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return NULL;
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/* memory for pmu */
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pmu_ptr = kzalloc(sizeof(*pmu_ptr), GFP_KERNEL);
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if (!pmu_ptr)
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return -ENOMEM;
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return NULL;
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/* Set the domain */
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pmu_ptr->domain = domain;
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ret = of_property_read_u32(parent, "size", &pmu_ptr->counter_mem_size);
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if (ret) {
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ret = -EINVAL;
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if (ret)
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goto free_pmu;
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}
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if (!of_property_read_u32(parent, "offset", &offset)) {
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if (imc_get_mem_addr_nest(parent, pmu_ptr, offset)) {
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ret = -EINVAL;
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if (imc_get_mem_addr_nest(parent, pmu_ptr, offset))
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goto free_pmu;
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}
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}
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/* Function to register IMC pmu */
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ret = init_imc_pmu(parent, pmu_ptr, pmu_index);
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@ -190,14 +181,14 @@ static int imc_pmu_create(struct device_node *parent, int pmu_index, int domain)
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if (pmu_ptr->domain == IMC_DOMAIN_NEST)
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kfree(pmu_ptr->mem_info);
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kfree(pmu_ptr);
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return ret;
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return NULL;
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}
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return 0;
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return pmu_ptr;
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free_pmu:
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kfree(pmu_ptr);
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return ret;
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return NULL;
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}
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static void disable_nest_pmu_counters(void)
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@ -254,6 +245,7 @@ int get_max_nest_dev(void)
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static int opal_imc_counters_probe(struct platform_device *pdev)
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{
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struct device_node *imc_dev = pdev->dev.of_node;
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struct imc_pmu *pmu;
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int pmu_count = 0, domain;
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bool core_imc_reg = false, thread_imc_reg = false;
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u32 type;
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@ -269,6 +261,7 @@ static int opal_imc_counters_probe(struct platform_device *pdev)
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}
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for_each_compatible_node(imc_dev, NULL, IMC_DTB_UNIT_COMPAT) {
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pmu = NULL;
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if (of_property_read_u32(imc_dev, "type", &type)) {
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pr_warn("IMC Device without type property\n");
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continue;
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@ -285,7 +278,14 @@ static int opal_imc_counters_probe(struct platform_device *pdev)
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domain = IMC_DOMAIN_THREAD;
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break;
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case IMC_TYPE_TRACE:
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domain = IMC_DOMAIN_TRACE;
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/*
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* FIXME. Using trace_imc events to monitor application
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* or KVM thread performance can cause a checkstop
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* (system crash).
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* Disable it for now.
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*/
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pr_info_once("IMC: disabling trace_imc PMU\n");
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domain = -1;
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break;
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default:
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pr_warn("IMC Unknown Device type \n");
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@ -293,9 +293,13 @@ static int opal_imc_counters_probe(struct platform_device *pdev)
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break;
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}
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if (!imc_pmu_create(imc_dev, pmu_count, domain)) {
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if (domain == IMC_DOMAIN_NEST)
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pmu = imc_pmu_create(imc_dev, pmu_count, domain);
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if (pmu != NULL) {
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if (domain == IMC_DOMAIN_NEST) {
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if (!imc_debugfs_parent)
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export_imc_mode_and_cmd(imc_dev, pmu);
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pmu_count++;
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}
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if (domain == IMC_DOMAIN_CORE)
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core_imc_reg = true;
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if (domain == IMC_DOMAIN_THREAD)
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@ -303,10 +307,6 @@ static int opal_imc_counters_probe(struct platform_device *pdev)
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}
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}
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/* If none of the nest units are registered, remove debugfs interface */
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if (pmu_count == 0)
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debugfs_remove_recursive(imc_debugfs_parent);
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/* If core imc is not registered, unregister thread-imc */
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if (!core_imc_reg && thread_imc_reg)
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unregister_thread_imc();
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@ -392,20 +392,28 @@ static int xive_spapr_populate_irq_data(u32 hw_irq, struct xive_irq_data *data)
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data->esb_shift = esb_shift;
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data->trig_page = trig_page;
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data->hw_irq = hw_irq;
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/*
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* No chip-id for the sPAPR backend. This has an impact how we
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* pick a target. See xive_pick_irq_target().
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*/
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data->src_chip = XIVE_INVALID_CHIP_ID;
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/*
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* When the H_INT_ESB flag is set, the H_INT_ESB hcall should
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* be used for interrupt management. Skip the remapping of the
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* ESB pages which are not available.
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*/
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if (data->flags & XIVE_IRQ_FLAG_H_INT_ESB)
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return 0;
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data->eoi_mmio = ioremap(data->eoi_page, 1u << data->esb_shift);
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if (!data->eoi_mmio) {
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pr_err("Failed to map EOI page for irq 0x%x\n", hw_irq);
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return -ENOMEM;
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}
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data->hw_irq = hw_irq;
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/* Full function page supports trigger */
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if (flags & XIVE_SRC_TRIGGER) {
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data->trig_mmio = data->eoi_mmio;
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