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pinctrl: ingenic: Factorize irq_set_type function

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Simplify the code of the driver's irq_set_type() function by doing some
factorization. The behaviour is unchanged.

Signed-off-by: Paul Cercueil <paul@crapouillou.net>
Link: https://lore.kernel.org/r/20200106232711.559727-5-paul@crapouillou.net
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Paul Cercueil 2020-01-07 00:27:10 +01:00 committed by Linus Walleij
parent 5ffdbb7ec9
commit f831f93af6
1 changed files with 26 additions and 42 deletions
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62
drivers/pinctrl/pinctrl-ingenic.c
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@ -1676,6 +1676,25 @@ static void irq_set_type(struct ingenic_gpio_chip *jzgc,
u8 offset, unsigned int type)
{
u8 reg1, reg2;
bool val1, val2;
switch (type) {
case IRQ_TYPE_EDGE_RISING:
val1 = val2 = true;
break;
case IRQ_TYPE_EDGE_FALLING:
val1 = false;
val2 = true;
break;
case IRQ_TYPE_LEVEL_HIGH:
val1 = true;
val2 = false;
break;
case IRQ_TYPE_LEVEL_LOW:
default:
val1 = val2 = false;
break;
}
if (jzgc->jzpc->info->version >= ID_JZ4760) {
reg1 = JZ4760_GPIO_PAT1;
@ -1685,48 +1704,13 @@ static void irq_set_type(struct ingenic_gpio_chip *jzgc,
reg2 = JZ4740_GPIO_DIR;
}
switch (type) {
case IRQ_TYPE_EDGE_RISING:
if (jzgc->jzpc->info->version >= ID_X1000) {
ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, true);
ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, true);
ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, val1);
ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, val2);
ingenic_gpio_shadow_set_bit_load(jzgc);
} else {
ingenic_gpio_set_bit(jzgc, reg2, offset, true);
ingenic_gpio_set_bit(jzgc, reg1, offset, true);
}
break;
case IRQ_TYPE_EDGE_FALLING:
if (jzgc->jzpc->info->version >= ID_X1000) {
ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, false);
ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, true);
ingenic_gpio_shadow_set_bit_load(jzgc);
} else {
ingenic_gpio_set_bit(jzgc, reg2, offset, false);
ingenic_gpio_set_bit(jzgc, reg1, offset, true);
}
break;
case IRQ_TYPE_LEVEL_HIGH:
if (jzgc->jzpc->info->version >= ID_X1000) {
ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, true);
ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, false);
ingenic_gpio_shadow_set_bit_load(jzgc);
} else {
ingenic_gpio_set_bit(jzgc, reg2, offset, true);
ingenic_gpio_set_bit(jzgc, reg1, offset, false);
}
break;
case IRQ_TYPE_LEVEL_LOW:
default:
if (jzgc->jzpc->info->version >= ID_X1000) {
ingenic_gpio_shadow_set_bit(jzgc, reg2, offset, false);
ingenic_gpio_shadow_set_bit(jzgc, reg1, offset, false);
ingenic_gpio_shadow_set_bit_load(jzgc);
} else {
ingenic_gpio_set_bit(jzgc, reg2, offset, false);
ingenic_gpio_set_bit(jzgc, reg1, offset, false);
}
break;
ingenic_gpio_set_bit(jzgc, reg2, offset, val1);
ingenic_gpio_set_bit(jzgc, reg1, offset, val2);
}
}