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[ARM] 4221/1: S3C2443: DMA support
Add initialisation and mappings for S3C2443 DMA system Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Ben Dooks
Russell King
parent
48adbcf33b
commit
f8271e5756
@ -12,6 +12,12 @@ config CPU_S3C2443
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help
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Support for the S3C2443 SoC from the S3C24XX line
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config S3C2443_DMA
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bool
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depends on CPU_S3C2443
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help
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Internal config node for S3C2443 DMA support
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menu "S3C2443 Machines"
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config MACH_SMDK2443
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@ -13,6 +13,8 @@ obj-$(CONFIG_CPU_S3C2443) += s3c2443.o
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obj-$(CONFIG_CPU_S3C2443) += irq.o
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obj-$(CONFIG_CPU_S3C2443) += clock.o
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obj-$(CONFIG_S3C2443_DMA) += dma.o
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# Machine support
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obj-$(CONFIG_MACH_SMDK2443) += mach-smdk2443.o
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180
arch/arm/mach-s3c2443/dma.c
Normal file
180
arch/arm/mach-s3c2443/dma.c
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@ -0,0 +1,180 @@
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/* linux/arch/arm/mach-s3c2443/dma.c
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*
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* Copyright (c) 2007 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* S3C2443 DMA selection
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*
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* http://armlinux.simtec.co.uk/
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <asm/dma.h>
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#include <asm/arch/dma.h>
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#include <asm/io.h>
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#include <asm/plat-s3c24xx/dma.h>
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#include <asm/plat-s3c24xx/cpu.h>
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#include <asm/arch/regs-serial.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-ac97.h>
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#include <asm/arch/regs-mem.h>
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#include <asm/arch/regs-lcd.h>
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#include <asm/arch/regs-sdi.h>
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#include <asm/arch/regs-iis.h>
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#include <asm/arch/regs-spi.h>
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#define MAP(x) { \
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[0] = (x) | DMA_CH_VALID, \
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[1] = (x) | DMA_CH_VALID, \
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[2] = (x) | DMA_CH_VALID, \
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[3] = (x) | DMA_CH_VALID, \
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[4] = (x) | DMA_CH_VALID, \
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[5] = (x) | DMA_CH_VALID, \
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}
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static struct s3c24xx_dma_map __initdata s3c2443_dma_mappings[] = {
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[DMACH_XD0] = {
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.name = "xdreq0",
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.channels = MAP(S3C2443_DMAREQSEL_XDREQ0),
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},
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[DMACH_XD1] = {
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.name = "xdreq1",
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.channels = MAP(S3C2443_DMAREQSEL_XDREQ1),
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},
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[DMACH_SDI] = {
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.name = "sdi",
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.channels = MAP(S3C2443_DMAREQSEL_SDI),
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.hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
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.hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
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},
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[DMACH_SPI0] = {
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.name = "spi0",
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.channels = MAP(S3C2443_DMAREQSEL_SPI0TX),
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.hw_addr.to = S3C2410_PA_SPI + S3C2410_SPTDAT,
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.hw_addr.from = S3C2410_PA_SPI + S3C2410_SPRDAT,
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},
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[DMACH_SPI1] = {
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.name = "spi1",
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.channels = MAP(S3C2443_DMAREQSEL_SPI1TX),
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.hw_addr.to = S3C2410_PA_SPI + 0x20 + S3C2410_SPTDAT,
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.hw_addr.from = S3C2410_PA_SPI + 0x20 + S3C2410_SPRDAT,
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},
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[DMACH_UART0] = {
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.name = "uart0",
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.channels = MAP(S3C2443_DMAREQSEL_UART0_0),
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.hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
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},
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[DMACH_UART1] = {
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.name = "uart1",
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.channels = MAP(S3C2443_DMAREQSEL_UART1_0),
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.hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
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},
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[DMACH_UART2] = {
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.name = "uart2",
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.channels = MAP(S3C2443_DMAREQSEL_UART2_0),
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.hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
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},
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[DMACH_UART3] = {
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.name = "uart3",
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.channels = MAP(S3C2443_DMAREQSEL_UART3_0),
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.hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
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.hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
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},
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[DMACH_UART0_SRC2] = {
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.name = "uart0",
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.channels = MAP(S3C2443_DMAREQSEL_UART0_1),
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.hw_addr.to = S3C2410_PA_UART0 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART0 + S3C2410_URXH,
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},
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[DMACH_UART1_SRC2] = {
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.name = "uart1",
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.channels = MAP(S3C2443_DMAREQSEL_UART1_1),
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.hw_addr.to = S3C2410_PA_UART1 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART1 + S3C2410_URXH,
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},
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[DMACH_UART2_SRC2] = {
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.name = "uart2",
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.channels = MAP(S3C2443_DMAREQSEL_UART2_1),
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.hw_addr.to = S3C2410_PA_UART2 + S3C2410_UTXH,
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.hw_addr.from = S3C2410_PA_UART2 + S3C2410_URXH,
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},
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[DMACH_UART3_SRC2] = {
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.name = "uart3",
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.channels = MAP(S3C2443_DMAREQSEL_UART3_1),
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.hw_addr.to = S3C2443_PA_UART3 + S3C2410_UTXH,
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.hw_addr.from = S3C2443_PA_UART3 + S3C2410_URXH,
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},
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[DMACH_TIMER] = {
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.name = "timer",
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.channels = MAP(S3C2443_DMAREQSEL_TIMER),
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},
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[DMACH_I2S_IN] = {
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.name = "i2s-sdi",
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.channels = MAP(S3C2443_DMAREQSEL_I2SRX),
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.hw_addr.from = S3C2410_PA_IIS + S3C2410_IISFIFO,
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},
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[DMACH_I2S_OUT] = {
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.name = "i2s-sdo",
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.channels = MAP(S3C2443_DMAREQSEL_I2STX),
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.hw_addr.to = S3C2410_PA_IIS + S3C2410_IISFIFO,
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},
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[DMACH_PCM_IN] = {
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.name = "pcm-in",
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.channels = MAP(S3C2443_DMAREQSEL_PCMIN),
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.hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
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},
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[DMACH_PCM_OUT] = {
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.name = "pcm-out",
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.channels = MAP(S3C2443_DMAREQSEL_PCMOUT),
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.hw_addr.to = S3C2440_PA_AC97 + S3C_AC97_PCM_DATA,
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},
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[DMACH_MIC_IN] = {
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.name = "mic-in",
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.channels = MAP(S3C2443_DMAREQSEL_MICIN),
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.hw_addr.from = S3C2440_PA_AC97 + S3C_AC97_MIC_DATA,
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},
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};
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static void s3c2443_dma_select(struct s3c2410_dma_chan *chan,
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struct s3c24xx_dma_map *map)
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{
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writel(map->channels[0] | S3C2443_DMAREQSEL_HW,
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chan->regs + S3C2443_DMA_DMAREQSEL);
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}
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static struct s3c24xx_dma_selection __initdata s3c2443_dma_sel = {
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.select = s3c2443_dma_select,
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.dcon_mask = 0,
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.map = s3c2443_dma_mappings,
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.map_size = ARRAY_SIZE(s3c2443_dma_mappings),
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};
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static int s3c2443_dma_add(struct sys_device *sysdev)
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{
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s3c24xx_dma_init(6, IRQ_S3C2443_DMA0, 0x100);
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return s3c24xx_dma_init_map(&s3c2443_dma_sel);
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}
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static struct sysdev_driver s3c2443_dma_driver = {
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.add = s3c2443_dma_add,
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};
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static int __init s3c2443_dma_init(void)
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{
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return sysdev_driver_register(&s3c2443_sysclass, &s3c2443_dma_driver);
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}
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arch_initcall(s3c2443_dma_init);
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