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drm/msm/a6xx: Add A642L speedbin (0x81)

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According to downstream, A642L's speedbin is 129 and uses 4 as index

Signed-off-by: Eugene Lepshy <fekz115@gmail.com>
Signed-off-by: Danila Tikhonov <danila@jiaxyga.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/606722/
Signed-off-by: Rob Clark <robdclark@chromium.org>
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Eugene Lepshy 2024-07-31 21:45:49 +03:00 committed by Rob Clark
parent ce9db67747
commit f7f14b1088
1 changed files with 1 additions and 0 deletions
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drivers/gpu/drm/msm/adreno/a6xx_catalog.c
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@ -869,6 +869,7 @@ static const struct adreno_info a6xx_gpus[] = {
.speedbins = ADRENO_SPEEDBINS(
{ 0, 0 },
{ 117, 0 },
{ 129, 4 },
{ 172, 2 }, /* Called speedbin 1 downstream, but let's not break things! */
{ 190, 1 },
),