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Merge branches 'fixes' and 'misc' into for-linus
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commit
f5137a45c2
@ -96,7 +96,7 @@ tune-$(CONFIG_CPU_V6K) =$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)
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tune-y := $(tune-y)
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ifeq ($(CONFIG_AEABI),y)
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CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork
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CFLAGS_ABI :=-mabi=aapcs-linux -mno-thumb-interwork -mfpu=vfp
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else
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CFLAGS_ABI :=$(call cc-option,-mapcs-32,-mabi=apcs-gnu) $(call cc-option,-mno-thumb-interwork,)
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endif
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@ -37,6 +37,12 @@
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#define isa_page_to_bus page_to_phys
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#define isa_bus_to_virt phys_to_virt
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/*
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* Atomic MMIO-wide IO modify
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*/
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extern void atomic_io_modify(void __iomem *reg, u32 mask, u32 set);
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extern void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set);
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/*
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* Generic IO read/write. These perform native-endian accesses. Note
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* that some architectures will want to re-define __raw_{read,write}w.
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@ -451,9 +451,11 @@ __und_usr_thumb:
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.arch armv6t2
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#endif
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2: ldrht r5, [r4]
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ARM_BE8(rev16 r5, r5) @ little endian instruction
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cmp r5, #0xe800 @ 32bit instruction if xx != 0
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blo __und_usr_fault_16 @ 16bit undefined instruction
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3: ldrht r0, [r2]
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ARM_BE8(rev16 r0, r0) @ little endian instruction
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add r2, r2, #2 @ r2 is PC + 2, make it PC + 4
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str r2, [sp, #S_PC] @ it's a 2x16bit instr, update
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orr r0, r0, r5, lsl #16
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@ -52,7 +52,8 @@
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.equ swapper_pg_dir, KERNEL_RAM_VADDR - PG_DIR_SIZE
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.macro pgtbl, rd, phys
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add \rd, \phys, #TEXT_OFFSET - PG_DIR_SIZE
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add \rd, \phys, #TEXT_OFFSET
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sub \rd, \rd, #PG_DIR_SIZE
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.endm
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/*
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@ -1,6 +1,41 @@
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#include <linux/export.h>
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#include <linux/types.h>
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#include <linux/io.h>
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#include <linux/spinlock.h>
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static DEFINE_RAW_SPINLOCK(__io_lock);
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/*
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* Generic atomic MMIO modify.
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*
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* Allows thread-safe access to registers shared by unrelated subsystems.
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* The access is protected by a single MMIO-wide lock.
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*/
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void atomic_io_modify_relaxed(void __iomem *reg, u32 mask, u32 set)
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{
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unsigned long flags;
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u32 value;
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raw_spin_lock_irqsave(&__io_lock, flags);
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value = readl_relaxed(reg) & ~mask;
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value |= (set & mask);
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writel_relaxed(value, reg);
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raw_spin_unlock_irqrestore(&__io_lock, flags);
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}
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EXPORT_SYMBOL(atomic_io_modify_relaxed);
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void atomic_io_modify(void __iomem *reg, u32 mask, u32 set)
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{
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unsigned long flags;
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u32 value;
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raw_spin_lock_irqsave(&__io_lock, flags);
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value = readl_relaxed(reg) & ~mask;
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value |= (set & mask);
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writel(value, reg);
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raw_spin_unlock_irqrestore(&__io_lock, flags);
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}
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EXPORT_SYMBOL(atomic_io_modify);
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/*
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* Copy data from IO memory space to "real" memory space.
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@ -290,10 +290,11 @@ void __init arm_memblock_init(struct meminfo *mi,
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#endif
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#ifdef CONFIG_BLK_DEV_INITRD
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/* FDT scan will populate initrd_start */
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if (initrd_start) {
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if (initrd_start && !phys_initrd_size) {
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phys_initrd_start = __virt_to_phys(initrd_start);
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phys_initrd_size = initrd_end - initrd_start;
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}
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initrd_start = initrd_end = 0;
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if (phys_initrd_size &&
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!memblock_is_region_memory(phys_initrd_start, phys_initrd_size)) {
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pr_err("INITRD: 0x%08llx+0x%08lx is not a memory region - disabling initrd\n",
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