dt-bindings: watchdog: arm,sp805: document the reset signal

The reset signal needs to be deasserted before operation of sp805
module. Document in the binding.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Yang Xiwen <forbidden405@outlook.com>
Reviewed-by: Guenter Roeck <linux@roeck-us.net>
Link: https://lore.kernel.org/r/20240221-hisi-wdt-v3-2-9642613dc2e6@outlook.com
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: Wim Van Sebroeck <wim@linux-watchdog.org>
This commit is contained in:
Yang Xiwen 2024-02-21 19:56:42 +08:00 committed by Wim Van Sebroeck
parent 575f100c1c
commit f4c5358253

View File

@ -50,6 +50,10 @@ properties:
- const: wdog_clk
- const: apb_pclk
resets:
maxItems: 1
description: WDOGRESn input reset signal for sp805 module.
required:
- compatible
- reg
@ -67,4 +71,5 @@ examples:
interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&wdt_clk>, <&apb_pclk>;
clock-names = "wdog_clk", "apb_pclk";
resets = <&wdt_rst>;
};