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x86, ioapic: Introduce helper utilities to walk ioapics and pins
Introduce helper utilities for_each_ioapic(), for_each_ioapic_reverse(), for_each_pin() and for_each_ioapic_pin() to walk ioapics and pins. They will be rewritten e will rewrite later to support IOAPIC hotplug. Signed-off-by: Jiang Liu <jiang.liu@linux.intel.com> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Tony Luck <tony.luck@intel.com> Cc: Joerg Roedel <joro@8bytes.org> Cc: Paul Gortmaker <paul.gortmaker@windriver.com> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Grant Likely <grant.likely@linaro.org> Cc: Rafael J. Wysocki <rjw@rjwysocki.net> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Yinghai Lu <yinghai@kernel.org> Link: http://lkml.kernel.org/r/1402302011-23642-14-git-send-email-jiang.liu@linux.intel.com Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -62,6 +62,16 @@
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#define __apicdebuginit(type) static type __init
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#define for_each_ioapic(idx) \
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for ((idx) = 0; (idx) < nr_ioapics; (idx)++)
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#define for_each_ioapic_reverse(idx) \
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for ((idx) = nr_ioapics - 1; (idx) >= 0; (idx)--)
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#define for_each_pin(idx, pin) \
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for ((pin) = 0; (pin) < ioapics[(idx)].nr_registers; (pin)++)
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#define for_each_ioapic_pin(idx, pin) \
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for_each_ioapic((idx)) \
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for_each_pin((idx), (pin))
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#define for_each_irq_pin(entry, head) \
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for (entry = head; entry; entry = entry->next)
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@ -191,7 +201,7 @@ int __init arch_early_irq_init(void)
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if (!legacy_pic->nr_legacy_irqs)
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io_apic_irqs = ~0UL;
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for (i = 0; i < nr_ioapics; i++) {
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for_each_ioapic(i) {
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ioapics[i].saved_registers =
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kzalloc(sizeof(struct IO_APIC_route_entry) *
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ioapics[i].nr_registers, GFP_KERNEL);
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@ -624,9 +634,8 @@ static void clear_IO_APIC (void)
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{
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int apic, pin;
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for (apic = 0; apic < nr_ioapics; apic++)
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for (pin = 0; pin < ioapics[apic].nr_registers; pin++)
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clear_IO_APIC_pin(apic, pin);
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for_each_ioapic_pin(apic, pin)
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clear_IO_APIC_pin(apic, pin);
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}
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#ifdef CONFIG_X86_32
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@ -675,13 +684,13 @@ int save_ioapic_entries(void)
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int apic, pin;
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int err = 0;
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for (apic = 0; apic < nr_ioapics; apic++) {
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for_each_ioapic(apic) {
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if (!ioapics[apic].saved_registers) {
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err = -ENOMEM;
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continue;
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}
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for (pin = 0; pin < ioapics[apic].nr_registers; pin++)
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for_each_pin(apic, pin)
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ioapics[apic].saved_registers[pin] =
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ioapic_read_entry(apic, pin);
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}
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@ -696,11 +705,11 @@ void mask_ioapic_entries(void)
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{
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int apic, pin;
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for (apic = 0; apic < nr_ioapics; apic++) {
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for_each_ioapic(apic) {
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if (!ioapics[apic].saved_registers)
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continue;
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for (pin = 0; pin < ioapics[apic].nr_registers; pin++) {
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for_each_pin(apic, pin) {
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struct IO_APIC_route_entry entry;
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entry = ioapics[apic].saved_registers[pin];
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@ -719,11 +728,11 @@ int restore_ioapic_entries(void)
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{
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int apic, pin;
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for (apic = 0; apic < nr_ioapics; apic++) {
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for_each_ioapic(apic) {
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if (!ioapics[apic].saved_registers)
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continue;
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for (pin = 0; pin < ioapics[apic].nr_registers; pin++)
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for_each_pin(apic, pin)
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ioapic_write_entry(apic, pin,
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ioapics[apic].saved_registers[pin]);
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}
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@ -782,7 +791,7 @@ static int __init find_isa_irq_apic(int irq, int type)
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if (i < mp_irq_entries) {
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int ioapic_idx;
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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for_each_ioapic(ioapic_idx)
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if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic)
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return ioapic_idx;
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}
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@ -1001,7 +1010,7 @@ int IO_APIC_get_PCI_irq_vector(int bus, int slot, int pin,
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for (i = 0; i < mp_irq_entries; i++) {
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int lbus = mp_irqs[i].srcbus;
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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for_each_ioapic(ioapic_idx)
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if (mpc_ioapic_id(ioapic_idx) == mp_irqs[i].dstapic ||
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mp_irqs[i].dstapic == MP_APIC_ALL)
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break;
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@ -1224,12 +1233,10 @@ static inline int IO_APIC_irq_trigger(int irq)
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{
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int apic, idx, pin;
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for (apic = 0; apic < nr_ioapics; apic++) {
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for (pin = 0; pin < ioapics[apic].nr_registers; pin++) {
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idx = find_irq_entry(apic, pin, mp_INT);
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if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin)))
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return irq_trigger(idx);
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}
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for_each_ioapic_pin(apic, pin) {
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idx = find_irq_entry(apic, pin, mp_INT);
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if ((idx != -1) && (irq == pin_2_irq(idx, apic, pin)))
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return irq_trigger(idx);
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}
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/*
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* nonexistent IRQs are edge default
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@ -1349,7 +1356,7 @@ static void __init __io_apic_setup_irqs(unsigned int ioapic_idx)
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struct io_apic_irq_attr attr;
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unsigned int pin, irq;
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for (pin = 0; pin < ioapics[ioapic_idx].nr_registers; pin++) {
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for_each_pin(ioapic_idx, pin) {
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idx = find_irq_entry(ioapic_idx, pin, mp_INT);
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if (io_apic_pin_not_connected(idx, ioapic_idx, pin))
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continue;
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@ -1380,7 +1387,7 @@ static void __init setup_IO_APIC_irqs(void)
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apic_printk(APIC_VERBOSE, KERN_DEBUG "init IO_APIC IRQs\n");
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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for_each_ioapic(ioapic_idx)
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__io_apic_setup_irqs(ioapic_idx);
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}
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@ -1583,7 +1590,7 @@ __apicdebuginit(void) print_IO_APICs(void)
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struct irq_chip *chip;
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printk(KERN_DEBUG "number of MP IRQ sources: %d.\n", mp_irq_entries);
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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for_each_ioapic(ioapic_idx)
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printk(KERN_DEBUG "number of IO-APIC #%d registers: %d.\n",
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mpc_ioapic_id(ioapic_idx),
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ioapics[ioapic_idx].nr_registers);
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@ -1594,7 +1601,7 @@ __apicdebuginit(void) print_IO_APICs(void)
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*/
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printk(KERN_INFO "testing the IO APIC.......................\n");
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++)
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for_each_ioapic(ioapic_idx)
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print_IO_APIC(ioapic_idx);
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printk(KERN_DEBUG "IRQ to pin mappings:\n");
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@ -1825,26 +1832,22 @@ static struct { int pin, apic; } ioapic_i8259 = { -1, -1 };
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void __init enable_IO_APIC(void)
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{
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int i8259_apic, i8259_pin;
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int apic;
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int apic, pin;
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if (!legacy_pic->nr_legacy_irqs)
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return;
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for(apic = 0; apic < nr_ioapics; apic++) {
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int pin;
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for_each_ioapic_pin(apic, pin) {
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/* See if any of the pins is in ExtINT mode */
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for (pin = 0; pin < ioapics[apic].nr_registers; pin++) {
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struct IO_APIC_route_entry entry;
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entry = ioapic_read_entry(apic, pin);
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struct IO_APIC_route_entry entry = ioapic_read_entry(apic, pin);
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/* If the interrupt line is enabled and in ExtInt mode
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* I have found the pin where the i8259 is connected.
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*/
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if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) {
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ioapic_i8259.apic = apic;
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ioapic_i8259.pin = pin;
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goto found_i8259;
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}
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/* If the interrupt line is enabled and in ExtInt mode
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* I have found the pin where the i8259 is connected.
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*/
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if ((entry.mask == 0) && (entry.delivery_mode == dest_ExtINT)) {
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ioapic_i8259.apic = apic;
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ioapic_i8259.pin = pin;
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goto found_i8259;
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}
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}
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found_i8259:
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@ -1947,7 +1950,7 @@ void __init setup_ioapic_ids_from_mpc_nocheck(void)
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/*
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* Set the IOAPIC ID to the value stored in the MPC table.
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*/
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for (ioapic_idx = 0; ioapic_idx < nr_ioapics; ioapic_idx++) {
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for_each_ioapic(ioapic_idx) {
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/* Read the register 0 value */
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raw_spin_lock_irqsave(&ioapic_lock, flags);
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reg_00.raw = io_apic_read(ioapic_idx, 0);
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@ -2863,7 +2866,7 @@ static void ioapic_resume(void)
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{
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int ioapic_idx;
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for (ioapic_idx = nr_ioapics - 1; ioapic_idx >= 0; ioapic_idx--)
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for_each_ioapic_reverse(ioapic_idx)
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resume_ioapic_id(ioapic_idx);
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restore_ioapic_entries();
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@ -3457,9 +3460,8 @@ static u8 __init io_apic_unique_id(u8 id)
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DECLARE_BITMAP(used, 256);
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bitmap_zero(used, 256);
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for (i = 0; i < nr_ioapics; i++) {
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for_each_ioapic(i)
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__set_bit(mpc_ioapic_id(i), used);
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}
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if (!test_bit(id, used))
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return id;
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return find_first_zero_bit(used, 256);
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@ -3517,8 +3519,7 @@ void __init setup_ioapic_dest(void)
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if (skip_ioapic_setup == 1)
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return;
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for (ioapic = 0; ioapic < nr_ioapics; ioapic++)
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for (pin = 0; pin < ioapics[ioapic].nr_registers; pin++) {
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for_each_ioapic_pin(ioapic, pin) {
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irq_entry = find_irq_entry(ioapic, pin, mp_INT);
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if (irq_entry == -1)
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continue;
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@ -3547,29 +3548,33 @@ void __init setup_ioapic_dest(void)
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static struct resource *ioapic_resources;
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static struct resource * __init ioapic_setup_resources(int nr_ioapics)
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static struct resource * __init ioapic_setup_resources(void)
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{
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unsigned long n;
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struct resource *res;
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char *mem;
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int i;
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int i, num = 0;
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if (nr_ioapics <= 0)
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for_each_ioapic(i)
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num++;
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if (num == 0)
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return NULL;
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n = IOAPIC_RESOURCE_NAME_SIZE + sizeof(struct resource);
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n *= nr_ioapics;
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n *= num;
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mem = alloc_bootmem(n);
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res = (void *)mem;
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mem += sizeof(struct resource) * nr_ioapics;
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mem += sizeof(struct resource) * num;
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for (i = 0; i < nr_ioapics; i++) {
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res[i].name = mem;
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res[i].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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num = 0;
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for_each_ioapic(i) {
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res[num].name = mem;
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res[num].flags = IORESOURCE_MEM | IORESOURCE_BUSY;
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snprintf(mem, IOAPIC_RESOURCE_NAME_SIZE, "IOAPIC %u", i);
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mem += IOAPIC_RESOURCE_NAME_SIZE;
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num++;
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}
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ioapic_resources = res;
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@ -3583,8 +3588,8 @@ void __init native_io_apic_init_mappings(void)
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struct resource *ioapic_res;
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int i;
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ioapic_res = ioapic_setup_resources(nr_ioapics);
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for (i = 0; i < nr_ioapics; i++) {
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ioapic_res = ioapic_setup_resources();
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for_each_ioapic(i) {
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if (smp_found_config) {
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ioapic_phys = mpc_ioapic_addr(i);
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#ifdef CONFIG_X86_32
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@ -3629,7 +3634,7 @@ void __init ioapic_insert_resources(void)
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return;
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}
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for (i = 0; i < nr_ioapics; i++) {
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for_each_ioapic(i) {
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insert_resource(&iomem_resource, r);
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r++;
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}
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@ -3637,16 +3642,15 @@ void __init ioapic_insert_resources(void)
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int mp_find_ioapic(u32 gsi)
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{
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int i = 0;
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int i;
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if (nr_ioapics == 0)
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return -1;
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/* Find the IOAPIC that manages this GSI. */
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for (i = 0; i < nr_ioapics; i++) {
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for_each_ioapic(i) {
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struct mp_ioapic_gsi *gsi_cfg = mp_ioapic_gsi_routing(i);
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if ((gsi >= gsi_cfg->gsi_base)
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&& (gsi <= gsi_cfg->gsi_end))
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if (gsi >= gsi_cfg->gsi_base && gsi <= gsi_cfg->gsi_end)
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return i;
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}
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@ -3658,7 +3662,7 @@ int mp_find_ioapic_pin(int ioapic, u32 gsi)
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{
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struct mp_ioapic_gsi *gsi_cfg;
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if (WARN_ON(ioapic == -1))
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if (WARN_ON(ioapic < 0))
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return -1;
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gsi_cfg = mp_ioapic_gsi_routing(ioapic);
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