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spi: rspi: Add support for active-high chip selects
All RSPI variants support setting the polarity of the SSL signal. Advertize support for active-high chip selects, and configure polarity according to the state of the flag. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20200309171537.21551-1-geert+renesas@glider.be Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -24,6 +24,7 @@
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#include <linux/sh_dma.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/rspi.h>
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#include <linux/spinlock.h>
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#define RSPI_SPCR 0x00 /* Control Register */
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#define RSPI_SSLP 0x01 /* Slave Select Polarity Register */
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@ -79,8 +80,7 @@
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#define SPCR_BSWAP 0x01 /* Byte Swap of read-data for DMAC */
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/* SSLP - Slave Select Polarity Register */
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#define SSLP_SSL1P 0x02 /* SSL1 Signal Polarity Setting */
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#define SSLP_SSL0P 0x01 /* SSL0 Signal Polarity Setting */
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#define SSLP_SSLP(i) BIT(i) /* SSLi Signal Polarity Setting */
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/* SPPCR - Pin Control Register */
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#define SPPCR_MOIFE 0x20 /* MOSI Idle Value Fixing Enable */
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@ -181,7 +181,9 @@ struct rspi_data {
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void __iomem *addr;
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u32 max_speed_hz;
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struct spi_controller *ctlr;
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struct platform_device *pdev;
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wait_queue_head_t wait;
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spinlock_t lock; /* Protects RMW-access to RSPI_SSLP */
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struct clk *clk;
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u16 spcmd;
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u8 spsr;
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@ -919,6 +921,29 @@ static int qspi_setup_sequencer(struct rspi_data *rspi,
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return 0;
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}
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static int rspi_setup(struct spi_device *spi)
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{
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struct rspi_data *rspi = spi_controller_get_devdata(spi->controller);
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u8 sslp;
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if (spi->cs_gpiod)
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return 0;
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pm_runtime_get_sync(&rspi->pdev->dev);
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spin_lock_irq(&rspi->lock);
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sslp = rspi_read8(rspi, RSPI_SSLP);
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if (spi->mode & SPI_CS_HIGH)
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sslp |= SSLP_SSLP(spi->chip_select);
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else
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sslp &= ~SSLP_SSLP(spi->chip_select);
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rspi_write8(rspi, sslp, RSPI_SSLP);
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spin_unlock_irq(&rspi->lock);
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pm_runtime_put(&rspi->pdev->dev);
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return 0;
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}
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static int rspi_prepare_message(struct spi_controller *ctlr,
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struct spi_message *msg)
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{
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@ -1248,17 +1273,20 @@ static int rspi_probe(struct platform_device *pdev)
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goto error1;
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}
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rspi->pdev = pdev;
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pm_runtime_enable(&pdev->dev);
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init_waitqueue_head(&rspi->wait);
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spin_lock_init(&rspi->lock);
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ctlr->bus_num = pdev->id;
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ctlr->setup = rspi_setup;
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ctlr->auto_runtime_pm = true;
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ctlr->transfer_one = ops->transfer_one;
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ctlr->prepare_message = rspi_prepare_message;
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ctlr->unprepare_message = rspi_unprepare_message;
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ctlr->mode_bits = SPI_CPHA | SPI_CPOL | SPI_LSB_FIRST | SPI_LOOP |
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ops->extra_mode_bits;
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ctlr->mode_bits = SPI_CPHA | SPI_CPOL | SPI_CS_HIGH | SPI_LSB_FIRST |
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SPI_LOOP | ops->extra_mode_bits;
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ctlr->flags = ops->flags;
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ctlr->dev.of_node = pdev->dev.of_node;
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ctlr->use_gpio_descriptors = true;
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