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ARM: dts: socfpga: Add SPI Master1 for Arria10 SR chip

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Add the Altera Arria10 SPI Master Node in preparation for
the A10SR MFD node.

Signed-off-by: Thor Thayer <tthayer@opensource.altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
This commit is contained in:
Thor Thayer 2016-06-02 17:52:25 +00:00 committed by Dinh Nguyen
parent ecba2390e3
commit f2d6f8f817
1 changed files with 15 additions and 0 deletions
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15
arch/arm/boot/dts/socfpga_arria10.dtsi
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@ -562,6 +562,21 @@
status = "disabled";
};
spi1: spi@ffda5000 {
compatible = "snps,dw-apb-ssi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0xffda5000 0x100>;
interrupts = <0 102 4>;
num-chipselect = <4>;
bus-num = <0>;
/*32bit_access;*/
tx-dma-channel = <&pdma 16>;
rx-dma-channel = <&pdma 17>;
clocks = <&spi_m_clk>;
status = "disabled";
};
sdr: sdr@ffc25000 {
compatible = "syscon";
reg = <0xffcfb100 0x80>;