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irqchip / GIC: Convert the GIC driver to ACPI probing
Now that we have a basic infrastructure to register irqchips and call them on discovery of a matching entry in MADT, convert the GIC driver to this new probing method. It ends up being a code deletion party, which is a rather good thing. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Reviewed-by: Hanjun Guo <hanjun.guo@linaro.org> Acked-by: Thomas Gleixner <tglx@linutronix.de> Tested-by: Hanjun Guo <hanjun.guo@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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@ -12,7 +12,6 @@
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#ifndef _ASM_ACPI_H
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#define _ASM_ACPI_H
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#include <linux/irqchip/arm-gic-acpi.h>
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#include <linux/mm.h>
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#include <linux/psci.h>
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@ -1,8 +1,6 @@
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#ifndef __ASM_IRQ_H
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#define __ASM_IRQ_H
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#include <linux/irqchip/arm-gic-acpi.h>
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#include <asm-generic/irq.h>
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struct pt_regs;
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@ -205,28 +205,3 @@ void __init acpi_boot_table_init(void)
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disable_acpi();
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}
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}
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void __init acpi_gic_init(void)
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{
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struct acpi_table_header *table;
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acpi_status status;
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acpi_size tbl_size;
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int err;
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if (acpi_disabled)
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return;
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status = acpi_get_table_with_size(ACPI_SIG_MADT, 0, &table, &tbl_size);
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if (ACPI_FAILURE(status)) {
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const char *msg = acpi_format_exception(status);
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pr_err("Failed to get MADT table, %s\n", msg);
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return;
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}
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err = gic_v2_acpi_init(table);
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if (err)
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pr_err("Failed to initialize GIC IRQ controller");
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early_acpi_os_unmap_memory((char *)table, tbl_size);
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}
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@ -41,7 +41,6 @@
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#include <linux/irqchip.h>
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#include <linux/irqchip/chained_irq.h>
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#include <linux/irqchip/arm-gic.h>
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#include <linux/irqchip/arm-gic-acpi.h>
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#include <asm/cputype.h>
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#include <asm/irq.h>
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@ -1195,7 +1194,7 @@ IRQCHIP_DECLARE(msm_qgic2, "qcom,msm-qgic2", gic_of_init);
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#endif
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#ifdef CONFIG_ACPI
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static phys_addr_t dist_phy_base, cpu_phy_base __initdata;
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static phys_addr_t cpu_phy_base __initdata;
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static int __init
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gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header,
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@ -1223,60 +1222,56 @@ gic_acpi_parse_madt_cpu(struct acpi_subtable_header *header,
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return 0;
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}
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static int __init
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gic_acpi_parse_madt_distributor(struct acpi_subtable_header *header,
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const unsigned long end)
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/* The things you have to do to just *count* something... */
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static int __init acpi_dummy_func(struct acpi_subtable_header *header,
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const unsigned long end)
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{
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struct acpi_madt_generic_distributor *dist;
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dist = (struct acpi_madt_generic_distributor *)header;
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if (BAD_MADT_ENTRY(dist, end))
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return -EINVAL;
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dist_phy_base = dist->base_address;
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return 0;
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}
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int __init
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gic_v2_acpi_init(struct acpi_table_header *table)
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static bool __init acpi_gic_redist_is_present(void)
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{
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return acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR,
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acpi_dummy_func, 0) > 0;
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}
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static bool __init gic_validate_dist(struct acpi_subtable_header *header,
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struct acpi_probe_entry *ape)
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{
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struct acpi_madt_generic_distributor *dist;
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dist = (struct acpi_madt_generic_distributor *)header;
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return (dist->version == ape->driver_data &&
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(dist->version != ACPI_MADT_GIC_VERSION_NONE ||
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!acpi_gic_redist_is_present()));
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}
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#define ACPI_GICV2_DIST_MEM_SIZE (SZ_4K)
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#define ACPI_GIC_CPU_IF_MEM_SIZE (SZ_8K)
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static int __init gic_v2_acpi_init(struct acpi_subtable_header *header,
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const unsigned long end)
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{
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struct acpi_madt_generic_distributor *dist;
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void __iomem *cpu_base, *dist_base;
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int count;
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/* Collect CPU base addresses */
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count = acpi_parse_entries(ACPI_SIG_MADT,
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sizeof(struct acpi_table_madt),
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gic_acpi_parse_madt_cpu, table,
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ACPI_MADT_TYPE_GENERIC_INTERRUPT, 0);
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count = acpi_table_parse_madt(ACPI_MADT_TYPE_GENERIC_INTERRUPT,
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gic_acpi_parse_madt_cpu, 0);
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if (count <= 0) {
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pr_err("No valid GICC entries exist\n");
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return -EINVAL;
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}
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/*
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* Find distributor base address. We expect one distributor entry since
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* ACPI 5.1 spec neither support multi-GIC instances nor GIC cascade.
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*/
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count = acpi_parse_entries(ACPI_SIG_MADT,
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sizeof(struct acpi_table_madt),
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gic_acpi_parse_madt_distributor, table,
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ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR, 0);
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if (count <= 0) {
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pr_err("No valid GICD entries exist\n");
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return -EINVAL;
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} else if (count > 1) {
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pr_err("More than one GICD entry detected\n");
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return -EINVAL;
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}
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cpu_base = ioremap(cpu_phy_base, ACPI_GIC_CPU_IF_MEM_SIZE);
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if (!cpu_base) {
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pr_err("Unable to map GICC registers\n");
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return -ENOMEM;
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}
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dist_base = ioremap(dist_phy_base, ACPI_GICV2_DIST_MEM_SIZE);
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dist = (struct acpi_madt_generic_distributor *)header;
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dist_base = ioremap(dist->base_address, ACPI_GICV2_DIST_MEM_SIZE);
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if (!dist_base) {
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pr_err("Unable to map GICD registers\n");
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iounmap(cpu_base);
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@ -1302,4 +1297,10 @@ gic_v2_acpi_init(struct acpi_table_header *table)
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acpi_irq_model = ACPI_IRQ_MODEL_GIC;
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return 0;
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}
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IRQCHIP_ACPI_DECLARE(gic_v2, ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR,
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gic_validate_dist, ACPI_MADT_GIC_VERSION_V2,
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gic_v2_acpi_init);
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IRQCHIP_ACPI_DECLARE(gic_v2_maybe, ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR,
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gic_validate_dist, ACPI_MADT_GIC_VERSION_NONE,
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gic_v2_acpi_init);
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#endif
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@ -27,8 +27,5 @@ extern struct of_device_id __irqchip_of_table[];
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void __init irqchip_init(void)
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{
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of_irq_init(__irqchip_of_table);
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#if defined(CONFIG_ARM64) && defined(CONFIG_ACPI)
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acpi_gic_init(); /* Temporary hack */
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#endif
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acpi_probe_device_table(irqchip);
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}
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@ -1,31 +0,0 @@
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/*
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* Copyright (C) 2014, Linaro Ltd.
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* Author: Tomasz Nowicki <tomasz.nowicki@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef ARM_GIC_ACPI_H_
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#define ARM_GIC_ACPI_H_
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#ifdef CONFIG_ACPI
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/*
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* Hard code here, we can not get memory size from MADT (but FDT does),
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* Actually no need to do that, because this size can be inferred
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* from GIC spec.
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*/
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#define ACPI_GICV2_DIST_MEM_SIZE (SZ_4K)
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#define ACPI_GIC_CPU_IF_MEM_SIZE (SZ_8K)
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struct acpi_table_header;
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int gic_v2_acpi_init(struct acpi_table_header *table);
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void acpi_gic_init(void);
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#else
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static inline void acpi_gic_init(void) { }
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#endif
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#endif /* ARM_GIC_ACPI_H_ */
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