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ath9k: Remove a few unused macros and fix indentation
Signed-off-by: Sujith Manoharan <Sujith.Manoharan@atheros.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Sujith
John W. Linville
parent
06df8bea27
commit
f22f558dca
@ -51,24 +51,24 @@ struct ath_node;
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/* Macro to expand scalars to 64-bit objects */
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#define ito64(x) (sizeof(x) == 8) ? \
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(((unsigned long long int)(x)) & (0xff)) : \
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(sizeof(x) == 16) ? \
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(((unsigned long long int)(x)) & 0xffff) : \
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((sizeof(x) == 32) ? \
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#define ito64(x) (sizeof(x) == 8) ? \
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(((unsigned long long int)(x)) & (0xff)) : \
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(sizeof(x) == 16) ? \
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(((unsigned long long int)(x)) & 0xffff) : \
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((sizeof(x) == 32) ? \
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(((unsigned long long int)(x)) & 0xffffffff) : \
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(unsigned long long int)(x))
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(unsigned long long int)(x))
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/* increment with wrap-around */
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#define INCR(_l, _sz) do { \
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(_l)++; \
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(_l) &= ((_sz) - 1); \
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#define INCR(_l, _sz) do { \
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(_l)++; \
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(_l) &= ((_sz) - 1); \
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} while (0)
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/* decrement with wrap-around */
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#define DECR(_l, _sz) do { \
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(_l)--; \
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(_l) &= ((_sz) - 1); \
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#define DECR(_l, _sz) do { \
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(_l)--; \
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(_l) &= ((_sz) - 1); \
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} while (0)
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#define A_MAX(a, b) ((a) > (b) ? (a) : (b))
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@ -136,12 +136,11 @@ enum ATH_DEBUG {
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/* Per-instance load-time (note: NOT run-time) configurations
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* for Atheros Device */
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struct ath_config {
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u32 ath_aggr_prot;
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u16 txpowlimit;
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u16 txpowlimit_override;
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u8 cabqReadytime; /* Cabq Readytime % */
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u8 swBeaconProcess; /* Process received beacons
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in SW (vs HW) */
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u32 ath_aggr_prot;
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u16 txpowlimit;
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u16 txpowlimit_override;
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u8 cabqReadytime; /* Cabq Readytime % */
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u8 swBeaconProcess; /* Process received beacons in SW (vs HW) */
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};
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/***********************/
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@ -161,12 +160,12 @@ struct ath_config {
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#define ATH_CHAINMASK_SEL_DOWN_RSSI_THRES 35
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/* Struct to store the chainmask select related info */
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struct ath_chainmask_sel {
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struct timer_list timer;
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int cur_tx_mask; /* user configured or 3x3 */
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int cur_rx_mask; /* user configured or 3x3 */
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int tx_avgrssi;
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u8 switch_allowed:1, /* timer will set this */
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cm_sel_enabled:1;
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struct timer_list timer;
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int cur_tx_mask; /* user configured or 3x3 */
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int cur_rx_mask; /* user configured or 3x3 */
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int tx_avgrssi;
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u8 switch_allowed:1, /* timer will set this */
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cm_sel_enabled : 1;
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};
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int ath_chainmask_sel_logic(struct ath_softc *sc, struct ath_node *an);
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@ -192,8 +191,8 @@ chains is due to FF aggregation in the driver. */
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struct ath_buf_state {
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int bfs_nframes; /* # frames in aggregate */
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u16 bfs_al; /* length of aggregate */
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u16 bfs_frmlen; /* length of frame */
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u16 bfs_al; /* length of aggregate */
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u16 bfs_frmlen; /* length of frame */
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int bfs_seqno; /* sequence number */
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int bfs_tidno; /* tid of this frame */
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int bfs_retries; /* current retries */
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@ -205,7 +204,7 @@ struct ath_buf_state {
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u8 bfs_isretried:1; /* is retried */
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u8 bfs_isxretried:1; /* is excessive retried */
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u8 bfs_shpreamble:1; /* is short preamble */
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u8 bfs_isbar:1; /* is a BAR */
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u8 bfs_isbar:1; /* is a BAR */
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u8 bfs_ispspoll:1; /* is a PS-Poll */
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u8 bfs_aggrburst:1; /* is a aggr burst */
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u8 bfs_calcairtime:1; /* requests airtime be calculated
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@ -247,7 +246,7 @@ struct ath_buf {
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struct list_head list;
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struct list_head *last;
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struct ath_buf *bf_lastbf; /* last buf of this unit (a frame or
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an aggregate) */
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an aggregate) */
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struct ath_buf *bf_lastfrm; /* last buf of this frame */
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struct ath_buf *bf_next; /* next subframe in the aggregate */
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struct ath_buf *bf_rifslast; /* last buf for RIFS burst */
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@ -257,7 +256,7 @@ struct ath_buf {
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dma_addr_t bf_daddr; /* physical addr of desc */
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dma_addr_t bf_buf_addr; /* physical addr of data buffer */
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u32 bf_status;
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u16 bf_flags; /* tx descriptor flags */
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u16 bf_flags; /* tx descriptor flags */
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struct ath_buf_state bf_state; /* buffer state */
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dma_addr_t bf_dmacontext;
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};
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@ -331,8 +330,8 @@ struct ath_recv_status {
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int8_t rssictl[ATH_MAX_ANTENNA]; /* RSSI (noise floor ajusted) */
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int8_t rssiextn[ATH_MAX_ANTENNA]; /* RSSI (noise floor ajusted) */
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int8_t abs_rssi; /* absolute RSSI */
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u8 rateieee; /* data rate received (IEEE rate code) */
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u8 ratecode; /* phy rate code */
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u8 rateieee; /* data rate received (IEEE rate code) */
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u8 ratecode; /* phy rate code */
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int rateKbps; /* data rate received (Kbps) */
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int antenna; /* rx antenna */
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int flags; /* status of associated skb */
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@ -351,28 +350,28 @@ struct ath_recv_status {
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};
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struct ath_rxbuf {
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struct sk_buff *rx_wbuf; /* buffer */
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unsigned long rx_time; /* system time when received */
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struct ath_recv_status rx_status; /* cached rx status */
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struct sk_buff *rx_wbuf;
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unsigned long rx_time; /* system time when received */
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struct ath_recv_status rx_status; /* cached rx status */
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};
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/* Per-TID aggregate receiver state for a node */
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struct ath_arx_tid {
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struct ath_node *an; /* parent ath node */
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struct ath_rxbuf *rxbuf; /* re-ordering buffer */
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struct timer_list timer;
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spinlock_t tidlock; /* lock to protect this TID structure */
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int baw_head; /* seq_next at head */
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int baw_tail; /* tail of block-ack window */
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int seq_reset; /* need to reset start sequence */
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int addba_exchangecomplete;
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u16 seq_next; /* next expected sequence */
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u16 baw_size; /* block-ack window size */
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struct ath_node *an;
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struct ath_rxbuf *rxbuf; /* re-ordering buffer */
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struct timer_list timer;
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spinlock_t tidlock;
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int baw_head; /* seq_next at head */
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int baw_tail; /* tail of block-ack window */
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int seq_reset; /* need to reset start sequence */
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int addba_exchangecomplete;
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u16 seq_next; /* next expected sequence */
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u16 baw_size; /* block-ack window size */
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};
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/* Per-node receiver aggregate state */
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struct ath_arx {
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struct ath_arx_tid tid[WME_NUM_TID];
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struct ath_arx_tid tid[WME_NUM_TID];
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};
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int ath_startrecv(struct ath_softc *sc);
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@ -444,96 +443,95 @@ enum ATH_SM_PWRSAV{
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* hardware queue).
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*/
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struct ath_txq {
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u32 axq_qnum; /* hardware q number */
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u32 *axq_link; /* link ptr in last TX desc */
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struct list_head axq_q; /* transmit queue */
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spinlock_t axq_lock; /* lock on q and link */
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unsigned long axq_lockflags; /* intr state when must cli */
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u32 axq_depth; /* queue depth */
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u8 axq_aggr_depth; /* aggregates queued */
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u32 axq_totalqueued;/* total ever queued */
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u32 axq_intrcnt; /* count to determine
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if descriptor should generate
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int on this txq. */
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bool stopped; /* Is mac80211 queue
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stopped ? */
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/* State for patching up CTS when bursting */
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struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/
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struct ath_desc *axq_lastdsWithCTS; /* first desc of the
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last descriptor that contains CTS */
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struct ath_desc *axq_gatingds; /* final desc of the gating desc
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* that determines whether lastdsWithCTS has
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* been DMA'ed or not */
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struct list_head axq_acq;
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u32 axq_qnum; /* hardware q number */
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u32 *axq_link; /* link ptr in last TX desc */
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struct list_head axq_q; /* transmit queue */
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spinlock_t axq_lock;
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unsigned long axq_lockflags; /* intr state when must cli */
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u32 axq_depth; /* queue depth */
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u8 axq_aggr_depth; /* aggregates queued */
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u32 axq_totalqueued; /* total ever queued */
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/* count to determine if descriptor should generate int on this txq. */
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u32 axq_intrcnt;
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bool stopped; /* Is mac80211 queue stopped ? */
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struct ath_buf *axq_linkbuf; /* virtual addr of last buffer*/
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/* first desc of the last descriptor that contains CTS */
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struct ath_desc *axq_lastdsWithCTS;
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/* final desc of the gating desc that determines whether
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lastdsWithCTS has been DMA'ed or not */
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struct ath_desc *axq_gatingds;
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struct list_head axq_acq;
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};
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/* per TID aggregate tx state for a destination */
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struct ath_atx_tid {
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struct list_head list; /* round-robin tid entry */
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struct list_head buf_q; /* pending buffers */
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struct ath_node *an; /* parent node structure */
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struct ath_atx_ac *ac; /* parent access category */
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struct ath_buf *tx_buf[ATH_TID_MAX_BUFS];/* active tx frames */
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u16 seq_start; /* starting seq of BA window */
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u16 seq_next; /* next seq to be used */
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u16 baw_size; /* BA window size */
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int tidno; /* TID number */
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int baw_head; /* first un-acked tx buffer */
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int baw_tail; /* next unused tx buffer slot */
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int sched; /* TID is scheduled */
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int paused; /* TID is paused */
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int cleanup_inprogress; /* aggr of this TID is
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being teared down */
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u32 addba_exchangecomplete:1; /* ADDBA state */
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int32_t addba_exchangeinprogress;
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int addba_exchangeattempts;
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struct list_head list; /* round-robin tid entry */
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struct list_head buf_q; /* pending buffers */
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struct ath_node *an;
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struct ath_atx_ac *ac;
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struct ath_buf *tx_buf[ATH_TID_MAX_BUFS]; /* active tx frames */
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u16 seq_start;
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u16 seq_next;
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u16 baw_size;
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int tidno;
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int baw_head; /* first un-acked tx buffer */
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int baw_tail; /* next unused tx buffer slot */
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int sched;
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int paused;
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int cleanup_inprogress;
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u32 addba_exchangecomplete:1;
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int32_t addba_exchangeinprogress;
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int addba_exchangeattempts;
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};
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/* per access-category aggregate tx state for a destination */
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struct ath_atx_ac {
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int sched; /* dest-ac is scheduled */
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int qnum; /* H/W queue number associated
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with this AC */
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struct list_head list; /* round-robin txq entry */
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struct list_head tid_q; /* queue of TIDs with buffers */
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int sched; /* dest-ac is scheduled */
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int qnum; /* H/W queue number associated
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with this AC */
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struct list_head list; /* round-robin txq entry */
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struct list_head tid_q; /* queue of TIDs with buffers */
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};
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/* per dest tx state */
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struct ath_atx {
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struct ath_atx_tid tid[WME_NUM_TID];
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struct ath_atx_ac ac[WME_NUM_AC];
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struct ath_atx_tid tid[WME_NUM_TID];
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struct ath_atx_ac ac[WME_NUM_AC];
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};
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/* per-frame tx control block */
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struct ath_tx_control {
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struct ath_node *an; /* destination to sent to */
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int if_id; /* only valid for cab traffic */
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int qnum; /* h/w queue number */
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u32 ht:1; /* if it can be transmitted using HT */
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u32 ps:1; /* if one or more stations are in PS mode */
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u32 use_minrate:1; /* if this frame should transmitted using
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minimum rate */
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enum ath9k_pkt_type atype; /* Atheros packet type */
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enum ath9k_key_type keytype; /* key type */
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u32 flags; /* HAL flags */
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u16 seqno; /* sequence number */
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u16 tidno; /* tid number */
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u16 txpower; /* transmit power */
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u16 frmlen; /* frame length */
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u32 keyix; /* key index */
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int min_rate; /* minimum rate */
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int mcast_rate; /* multicast rate */
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u16 nextfraglen; /* next fragment length */
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/* below is set only by ath_dev */
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struct ath_softc *dev; /* device handle */
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struct ath_node *an;
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int if_id;
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int qnum;
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u32 ht:1;
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u32 ps:1;
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u32 use_minrate:1;
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enum ath9k_pkt_type atype;
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enum ath9k_key_type keytype;
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u32 flags;
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u16 seqno;
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u16 tidno;
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u16 txpower;
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u16 frmlen;
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u32 keyix;
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int min_rate;
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int mcast_rate;
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u16 nextfraglen;
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struct ath_softc *dev;
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dma_addr_t dmacontext;
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};
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/* per frame tx status block */
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struct ath_xmit_status {
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int retries; /* number of retries to successufully
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transmit this frame */
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int flags; /* status of transmit */
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int retries; /* number of retries to successufully
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transmit this frame */
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int flags; /* status of transmit */
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#define ATH_TX_ERROR 0x01
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#define ATH_TX_XRETRY 0x02
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#define ATH_TX_BAR 0x04
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@ -647,20 +645,20 @@ struct aggr_rifs_param {
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/* Per-node aggregation state */
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struct ath_node_aggr {
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struct ath_atx tx; /* node transmit state */
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struct ath_arx rx; /* node receive state */
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struct ath_atx tx; /* node transmit state */
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struct ath_arx rx; /* node receive state */
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};
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/* driver-specific node state */
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struct ath_node {
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struct list_head list;
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struct ath_softc *an_sc; /* back pointer */
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atomic_t an_refcnt;
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struct list_head list;
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struct ath_softc *an_sc;
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atomic_t an_refcnt;
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struct ath_chainmask_sel an_chainmask_sel;
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struct ath_node_aggr an_aggr; /* A-MPDU aggregation state */
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u8 an_smmode; /* SM Power save mode */
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u8 an_flags;
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u8 an_addr[ETH_ALEN];
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struct ath_node_aggr an_aggr;
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u8 an_smmode; /* SM Power save mode */
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u8 an_flags;
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u8 an_addr[ETH_ALEN];
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};
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void ath_tx_resume_tid(struct ath_softc *sc,
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@ -754,15 +752,6 @@ int ath_update_beacon(struct ath_softc *sc,
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/* VAPs */
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/********/
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#define ATH_IF_HW_OFF 0x0001 /* hardware state needs to turn off */
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#define ATH_IF_HW_ON 0x0002 /* hardware state needs to turn on */
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/* STA only: the associated AP is HT capable */
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#define ATH_IF_HT 0x0004
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/* AP/IBSS only: current BSS has privacy on */
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#define ATH_IF_PRIVACY 0x0008
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#define ATH_IF_BEACON_ENABLE 0x0010 /* AP/IBSS only: enable beacon */
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#define ATH_IF_BEACON_SYNC 0x0020 /* IBSS only: need to sync beacon */
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/*
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* Define the scheme that we select MAC address for multiple
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* BSS on the same radio. The very first VAP will just use the MAC
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@ -782,19 +771,15 @@ struct ath_vap_config {
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/* driver-specific vap state */
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struct ath_vap {
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struct ieee80211_vif *av_if_data; /* interface(vap)
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instance from 802.11 protocal layer */
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enum ath9k_opmode av_opmode; /* VAP operational mode */
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struct ath_buf *av_bcbuf; /* beacon buffer */
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struct ath_beacon_offset av_boff; /* dynamic update state */
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struct ath_tx_control av_btxctl; /* tx control information
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for beacon */
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int av_bslot; /* beacon slot index */
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struct ath_txq av_mcastq; /* multicast
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transmit queue */
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struct ath_vap_config av_config; /* vap configuration
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parameters from 802.11 protocol layer*/
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struct ath_rate_node *rc_node;
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struct ieee80211_vif *av_if_data;
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enum ath9k_opmode av_opmode; /* VAP operational mode */
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struct ath_buf *av_bcbuf; /* beacon buffer */
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struct ath_beacon_offset av_boff; /* dynamic update state */
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struct ath_tx_control av_btxctl; /* txctl information for beacon */
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int av_bslot; /* beacon slot index */
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struct ath_txq av_mcastq; /* multicast transmit queue */
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struct ath_vap_config av_config;/* vap configuration parameters*/
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struct ath_rate_node *rc_node;
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};
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int ath_vap_attach(struct ath_softc *sc,
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