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Fourth Round of Renesas ARM based SoC fixes for v3.12
* Remove unused #gpio-ranges-cells DT property * Remove usage of deprecated #gpio-range-cells DT property from GPIO R-Car Property was deprecated in v3.11-rc2 * Correct ether pinctl naming for armadillo800eva board Regression introduced in v3.10-rc5 * Add Micrel KSZ8041 PHY fixup to lager board This resolves a problem that has been present since 3.11-rc2 * Update SDHI DT compatibility string to the <unit>-<soc> format This makes compatibility strings consistent across all renesas hardware which currently supports DT. The bindings which are being updated where intorodiced on a per-SoC basis starting in v3.8-rc7. They may have been internally consistent when originally added. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSSPX/AAoJENfPZGlqN0++OYkP/28MR5D2vqT/8zQ91o0AGAXg CNS0CCekccTM+t7gTRQhgp9khrPmFlFOWrd+S35+eagOIfhCGfABxzCZijSKbai6 HFYuhkTg3UCg1pMaPMCP1H7iV63kZHHocyPOBnb9titplJ0w5GoDh8R2oslDf/62 vYM7XeZO9K99j1YxHH4+jMUws353XBgyQ87nHaQvT9Jhb45ZCXrXADw7sUOaUeEa Zw3O6mfCb1bOOQqTMcouvPh6va+RNL/G/dREj8FDdrDXOz5KdTekHKON8fluq+LM nWSUebzBJEMunHAnkncXxDJ229tu2x1j05ex+XwLYKcBx5gJ5omh0ugMOeYnnB8U wMUpEhnXLGBuNdNS0qR6Ql4wiS+2kKPXDn4sSKOW1ORbHeklFbtfnyZDu+rJfu6n +lc+KbZFd63ct9IIB2W7D3ZELEgWP3Z82eAXcj6yNcBXIgUYjEihZeFf51EB5EaF 2oIpiAQXbPdnzkUPNSR46h2Kg5w1alJgs5Elu/WO7RF+GT0lBZOrhP8Yxav30h1j w6JJnG9Oq96TJ4FrzZbX8/Szmhheu8DrAo3JslxT+hjSJv2CweM+8Dbwcp5it+Vw 0rh/efDa84RPDS4YiwSXJQd6/DuskPE04qnry09WS5g67ediBLf1NNX4r26R68l5 plIISkrqCxYxUhNjbOJa =WVMt -----END PGP SIGNATURE----- Merge tag 'renesas-fixes4-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into fixes From Simon Horman: Fourth Round of Renesas ARM based SoC fixes for v3.12 * Remove unused #gpio-ranges-cells DT property * Remove usage of deprecated #gpio-range-cells DT property from GPIO R-Car Property was deprecated in v3.11-rc2 * Correct ether pinctl naming for armadillo800eva board Regression introduced in v3.10-rc5 * Add Micrel KSZ8041 PHY fixup to lager board This resolves a problem that has been present since 3.11-rc2 * Update SDHI DT compatibility string to the <unit>-<soc> format This makes compatibility strings consistent across all renesas hardware which currently supports DT. The bindings which are being updated where intorodiced on a per-SoC basis starting in v3.8-rc7. They may have been internally consistent when originally added. * tag 'renesas-fixes4-for-v3.12' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: Remove #gpio-ranges-cells DT property gpio: rcar: Remove #gpio-range-cells DT property usage ARM: shmobile: armadillo: fixup ether pinctrl naming ARM: shmobile: Lager: add Micrel KSZ8041 PHY fixup ARM: shmobile: update SDHI DT compatibility string to the <unit>-<soc> format Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
f1bb7cd5a1
@ -9,12 +9,15 @@ compulsory and any optional properties, common to all SD/MMC drivers, as
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described in mmc.txt, can be used. Additionally the following tmio_mmc-specific
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optional bindings can be used.
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Required properties:
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- compatible: "renesas,sdhi-shmobile" - a generic sh-mobile SDHI unit
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"renesas,sdhi-sh7372" - SDHI IP on SH7372 SoC
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"renesas,sdhi-sh73a0" - SDHI IP on SH73A0 SoC
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"renesas,sdhi-r8a73a4" - SDHI IP on R8A73A4 SoC
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"renesas,sdhi-r8a7740" - SDHI IP on R8A7740 SoC
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"renesas,sdhi-r8a7778" - SDHI IP on R8A7778 SoC
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"renesas,sdhi-r8a7779" - SDHI IP on R8A7779 SoC
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"renesas,sdhi-r8a7790" - SDHI IP on R8A7790 SoC
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Optional properties:
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- toshiba,mmc-wrprotect-disable: write-protect detection is unavailable
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When used with Renesas SDHI hardware, the following compatibility strings
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configure various model-specific properties:
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"renesas,sh7372-sdhi": (default) compatible with SH7372
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"renesas,r8a7740-sdhi": compatible with R8A7740: certain MMC/SD commands have to
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wait for the interface to become idle.
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@ -193,7 +193,7 @@
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};
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sdhi0: sdhi@ee100000 {
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compatible = "renesas,r8a73a4-sdhi";
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compatible = "renesas,sdhi-r8a73a4";
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reg = <0 0xee100000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 165 4>;
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@ -202,7 +202,7 @@
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};
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sdhi1: sdhi@ee120000 {
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compatible = "renesas,r8a73a4-sdhi";
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compatible = "renesas,sdhi-r8a73a4";
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reg = <0 0xee120000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 166 4>;
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@ -211,7 +211,7 @@
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};
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sdhi2: sdhi@ee140000 {
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compatible = "renesas,r8a73a4-sdhi";
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compatible = "renesas,sdhi-r8a73a4";
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reg = <0 0xee140000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 4>;
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@ -96,6 +96,5 @@
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pfc: pfc@fffc0000 {
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compatible = "renesas,pfc-r8a7778";
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reg = <0xfffc000 0x118>;
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#gpio-range-cells = <3>;
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};
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};
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@ -188,7 +188,6 @@
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pfc: pfc@fffc0000 {
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compatible = "renesas,pfc-r8a7779";
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reg = <0xfffc0000 0x23c>;
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#gpio-range-cells = <3>;
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};
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thermal@ffc48000 {
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@ -148,11 +148,10 @@
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pfc: pfc@e6060000 {
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compatible = "renesas,pfc-r8a7790";
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reg = <0 0xe6060000 0 0x250>;
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#gpio-range-cells = <3>;
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};
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sdhi0: sdhi@ee100000 {
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compatible = "renesas,r8a7790-sdhi";
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee100000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 165 4>;
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@ -161,7 +160,7 @@
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};
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sdhi1: sdhi@ee120000 {
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compatible = "renesas,r8a7790-sdhi";
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee120000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 166 4>;
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@ -170,7 +169,7 @@
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};
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sdhi2: sdhi@ee140000 {
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compatible = "renesas,r8a7790-sdhi";
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee140000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 167 4>;
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@ -179,7 +178,7 @@
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};
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sdhi3: sdhi@ee160000 {
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compatible = "renesas,r8a7790-sdhi";
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compatible = "renesas,sdhi-r8a7790";
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reg = <0 0xee160000 0 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 168 4>;
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@ -196,7 +196,7 @@
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};
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sdhi0: sdhi@ee100000 {
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compatible = "renesas,r8a7740-sdhi";
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compatible = "renesas,sdhi-r8a7740";
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reg = <0xee100000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 83 4
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@ -208,7 +208,7 @@
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/* SDHI1 and SDHI2 have no CD pins, no need for CD IRQ */
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sdhi1: sdhi@ee120000 {
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compatible = "renesas,r8a7740-sdhi";
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compatible = "renesas,sdhi-r8a7740";
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reg = <0xee120000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 88 4
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@ -219,7 +219,7 @@
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};
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sdhi2: sdhi@ee140000 {
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compatible = "renesas,r8a7740-sdhi";
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compatible = "renesas,sdhi-r8a7740";
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reg = <0xee140000 0x100>;
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interrupt-parent = <&gic>;
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interrupts = <0 104 4
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@ -1108,9 +1108,9 @@ static const struct pinctrl_map eva_pinctrl_map[] = {
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PIN_MAP_MUX_GROUP_DEFAULT("asoc-simple-card.1", "pfc-r8a7740",
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"fsib_mclk_in", "fsib"),
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/* GETHER */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
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"gether_mii", "gether"),
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PIN_MAP_MUX_GROUP_DEFAULT("sh-eth", "pfc-r8a7740",
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PIN_MAP_MUX_GROUP_DEFAULT("r8a7740-gether", "pfc-r8a7740",
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"gether_int", "gether"),
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/* HDMI */
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PIN_MAP_MUX_GROUP_DEFAULT("sh-mobile-hdmi", "pfc-r8a7740",
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@ -29,6 +29,7 @@
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#include <linux/pinctrl/machine.h>
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#include <linux/platform_data/gpio-rcar.h>
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#include <linux/platform_device.h>
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#include <linux/phy.h>
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#include <linux/regulator/fixed.h>
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#include <linux/regulator/machine.h>
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#include <linux/sh_eth.h>
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@ -155,6 +156,30 @@ static void __init lager_add_standard_devices(void)
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ðer_pdata, sizeof(ether_pdata));
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}
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/*
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* Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
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* to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
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* 14-15. We have to set them back to 01 from the default 00 value each time
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* the PHY is reset. It's also important because the PHY's LED0 signal is
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* connected to SoC's ETH_LINK signal and in the PHY's default mode it will
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* bounce on and off after each packet, which we apparently want to avoid.
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*/
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static int lager_ksz8041_fixup(struct phy_device *phydev)
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{
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u16 phyctrl1 = phy_read(phydev, 0x1e);
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phyctrl1 &= ~0xc000;
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phyctrl1 |= 0x4000;
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return phy_write(phydev, 0x1e, phyctrl1);
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}
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static void __init lager_init(void)
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{
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lager_add_standard_devices();
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phy_register_fixup_for_id("r8a7790-ether-ff:01", lager_ksz8041_fixup);
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}
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static const char *lager_boards_compat_dt[] __initdata = {
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"renesas,lager",
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NULL,
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@ -163,6 +188,6 @@ static const char *lager_boards_compat_dt[] __initdata = {
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DT_MACHINE_START(LAGER_DT, "lager")
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.init_early = r8a7790_init_delay,
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.init_time = r8a7790_timer_init,
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.init_machine = lager_add_standard_devices,
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.init_machine = lager_init,
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.dt_compat = lager_boards_compat_dt,
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MACHINE_END
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@ -293,10 +293,9 @@ static void gpio_rcar_parse_pdata(struct gpio_rcar_priv *p)
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if (pdata) {
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p->config = *pdata;
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} else if (IS_ENABLED(CONFIG_OF) && np) {
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ret = of_parse_phandle_with_args(np, "gpio-ranges",
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"#gpio-range-cells", 0, &args);
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p->config.number_of_pins = ret == 0 && args.args_count == 3
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? args.args[2]
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ret = of_parse_phandle_with_fixed_args(np, "gpio-ranges", 3, 0,
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&args);
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p->config.number_of_pins = ret == 0 ? args.args[2]
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: RCAR_MAX_GPIO_PER_BANK;
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p->config.gpio_base = -1;
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}
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@ -113,14 +113,14 @@ static const struct sh_mobile_sdhi_ops sdhi_ops = {
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};
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static const struct of_device_id sh_mobile_sdhi_of_match[] = {
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{ .compatible = "renesas,shmobile-sdhi" },
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{ .compatible = "renesas,sh7372-sdhi" },
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{ .compatible = "renesas,sh73a0-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,r8a73a4-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,r8a7740-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,r8a7778-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,r8a7779-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,r8a7790-sdhi", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,sdhi-shmobile" },
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{ .compatible = "renesas,sdhi-sh7372" },
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{ .compatible = "renesas,sdhi-sh73a0", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,sdhi-r8a73a4", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,sdhi-r8a7740", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,sdhi-r8a7778", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,sdhi-r8a7779", .data = &sh_mobile_sdhi_of_cfg[0], },
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{ .compatible = "renesas,sdhi-r8a7790", .data = &sh_mobile_sdhi_of_cfg[0], },
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{},
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};
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MODULE_DEVICE_TABLE(of, sh_mobile_sdhi_of_match);
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