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mlxsw: reg: Add Port Module Memory Map Properties register

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Add the Port Module Memory Map Properties register. It will be used to
set the power mode of a module in subsequent patches.

Signed-off-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Ido Schimmel 2021-10-06 13:46:43 +03:00 committed by Jakub Kicinski
parent 353407d917
commit f10ba086f7
1 changed files with 50 additions and 0 deletions
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50
drivers/net/ethernet/mellanox/mlxsw/reg.h
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@ -5946,6 +5946,55 @@ static inline void mlxsw_reg_pddr_pack(char *payload, u8 local_port,
mlxsw_reg_pddr_page_select_set(payload, page_select);
}
/* PMMP - Port Module Memory Map Properties Register
* -------------------------------------------------
* The PMMP register allows to override the module memory map advertisement.
* The register can only be set when the module is disabled by PMAOS register.
*/
#define MLXSW_REG_PMMP_ID 0x5044
#define MLXSW_REG_PMMP_LEN 0x2C
MLXSW_REG_DEFINE(pmmp, MLXSW_REG_PMMP_ID, MLXSW_REG_PMMP_LEN);
/* reg_pmmp_module
* Module number.
* Access: Index
*/
MLXSW_ITEM32(reg, pmmp, module, 0x00, 16, 8);
/* reg_pmmp_sticky
* When set, will keep eeprom_override values after plug-out event.
* Access: OP
*/
MLXSW_ITEM32(reg, pmmp, sticky, 0x00, 0, 1);
/* reg_pmmp_eeprom_override_mask
* Write mask bit (negative polarity).
* 0 - Allow write
* 1 - Ignore write
* On write, indicates which of the bits from eeprom_override field are
* updated.
* Access: WO
*/
MLXSW_ITEM32(reg, pmmp, eeprom_override_mask, 0x04, 16, 16);
enum {
/* Set module to low power mode */
MLXSW_REG_PMMP_EEPROM_OVERRIDE_LOW_POWER_MASK = BIT(8),
};
/* reg_pmmp_eeprom_override
* Override / ignore EEPROM advertisement properties bitmask
* Access: RW
*/
MLXSW_ITEM32(reg, pmmp, eeprom_override, 0x04, 0, 16);
static inline void mlxsw_reg_pmmp_pack(char *payload, u8 module)
{
MLXSW_REG_ZERO(pmmp, payload);
mlxsw_reg_pmmp_module_set(payload, module);
}
/* PLLP - Port Local port to Label Port mapping Register
* -----------------------------------------------------
* The PLLP register returns the mapping from Local Port into Label Port.
@ -12348,6 +12397,7 @@ static const struct mlxsw_reg_info *mlxsw_reg_infos[] = {
MLXSW_REG(pmtdb),
MLXSW_REG(pmpe),
MLXSW_REG(pddr),
MLXSW_REG(pmmp),
MLXSW_REG(pllp),
MLXSW_REG(htgt),
MLXSW_REG(hpkt),