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ARM: mmp: update cpuid of pxa168 and pxa910
Correct the cpuid of pxa168 and pxa910. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
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@ -10,13 +10,20 @@
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <asm/page.h>
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#include <asm/page.h>
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#include <asm/mach/map.h>
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#include <asm/mach/map.h>
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#include <mach/addr-map.h>
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#include <mach/addr-map.h>
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#include <mach/cputype.h>
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#include "common.h"
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#include "common.h"
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#define MMP_CHIPID (AXI_VIRT_BASE + 0x82c00)
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unsigned int mmp_chip_id;
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EXPORT_SYMBOL(mmp_chip_id);
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static struct map_desc standard_io_desc[] __initdata = {
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static struct map_desc standard_io_desc[] __initdata = {
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{
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{
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.pfn = __phys_to_pfn(APB_PHYS_BASE),
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.pfn = __phys_to_pfn(APB_PHYS_BASE),
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@ -34,4 +41,7 @@ static struct map_desc standard_io_desc[] __initdata = {
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void __init mmp_map_io(void)
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void __init mmp_map_io(void)
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{
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{
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iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
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iotable_init(standard_io_desc, ARRAY_SIZE(standard_io_desc));
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/* this is early, initialize mmp_chip_id here */
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mmp_chip_id = __raw_readl(MMP_CHIPID);
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}
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}
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@ -4,36 +4,51 @@
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#include <asm/cputype.h>
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#include <asm/cputype.h>
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/*
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/*
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* CPU Stepping OLD_ID CPU_ID CHIP_ID
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* CPU Stepping CPU_ID CHIP_ID
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*
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*
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* PXA168 A0 0x41159263 0x56158400 0x00A0A333
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* PXA168 S0 0x56158400 0x0000C910
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* PXA910 Y0 0x41159262 0x56158000 0x00F0C910
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* PXA168 A0 0x56158400 0x00A0A168
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* MMP2 Z0 0x560f5811
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* PXA910 Y1 0x56158400 0x00F2C920
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* PXA910 A0 0x56158400 0x00F2C910
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* PXA910 A1 0x56158400 0x00A0C910
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* PXA920 Y0 0x56158400 0x00F2C920
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* PXA920 A0 0x56158400 0x00A0C920
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* PXA920 A1 0x56158400 0x00A1C920
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* MMP2 Z0 0x560f5811 0x00F00410
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* MMP2 Z1 0x560f5811 0x00E00410
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* MMP2 A0 0x560f5811 0x00A0A610
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*/
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*/
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extern unsigned int mmp_chip_id;
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#ifdef CONFIG_CPU_PXA168
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#ifdef CONFIG_CPU_PXA168
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# define __cpu_is_pxa168(id) \
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static inline int cpu_is_pxa168(void)
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({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x84; })
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{
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return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
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((mmp_chip_id & 0xfff) == 0x168);
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}
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#else
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#else
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# define __cpu_is_pxa168(id) (0)
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#define cpu_is_pxa168() (0)
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#endif
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#endif
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/* cpu_is_pxa910() is shared on both pxa910 and pxa920 */
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#ifdef CONFIG_CPU_PXA910
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#ifdef CONFIG_CPU_PXA910
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# define __cpu_is_pxa910(id) \
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static inline int cpu_is_pxa910(void)
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({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x80; })
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{
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return (((read_cpuid_id() >> 8) & 0xff) == 0x84) &&
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(((mmp_chip_id & 0xfff) == 0x910) ||
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((mmp_chip_id & 0xfff) == 0x920));
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}
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#else
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#else
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# define __cpu_is_pxa910(id) (0)
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#define cpu_is_pxa910() (0)
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#endif
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#endif
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#ifdef CONFIG_CPU_MMP2
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#ifdef CONFIG_CPU_MMP2
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# define __cpu_is_mmp2(id) \
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static inline int cpu_is_mmp2(void)
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({ unsigned int _id = ((id) >> 8) & 0xff; _id == 0x58; })
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{
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return (((cpu_readid_id() >> 8) & 0xff) == 0x58);
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#else
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#else
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# define __cpu_is_mmp2(id) (0)
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#define cpu_is_mmp2() (0)
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#endif
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#endif
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#define cpu_is_pxa168() ({ __cpu_is_pxa168(read_cpuid_id()); })
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#define cpu_is_pxa910() ({ __cpu_is_pxa910(read_cpuid_id()); })
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#define cpu_is_mmp2() ({ __cpu_is_mmp2(read_cpuid_id()); })
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#endif /* __ASM_MACH_CPUTYPE_H */
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#endif /* __ASM_MACH_CPUTYPE_H */
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