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clk: qcom: dispcc-sm8250: Disable link_div_clk_src for sm8150
SM8150 does not have any of the link_div_clk_src clocks, so let's disable them for this SoC. Signed-off-by: Robert Foss <robert.foss@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20221102090140.965450-6-robert.foss@linaro.org
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commit
f05dbd1a50
@ -1289,6 +1289,17 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev)
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disp_cc_pll1_config.config_ctl_hi1_val = 0x00000024;
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disp_cc_pll1_config.user_ctl_hi1_val = 0x000000D0;
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disp_cc_pll1_init.ops = &clk_alpha_pll_trion_ops;
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disp_cc_mdss_dp_link_intf_clk.clkr.hw.init->parent_hws[0] =
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&disp_cc_mdss_dp_link_clk_src.clkr.hw;
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disp_cc_mdss_dp_link1_intf_clk.clkr.hw.init->parent_hws[0] =
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&disp_cc_mdss_dp_link1_clk_src.clkr.hw;
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disp_cc_mdss_edp_link_intf_clk.clkr.hw.init->parent_hws[0] =
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&disp_cc_mdss_edp_link_clk_src.clkr.hw;
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disp_cc_sm8250_clocks[DISP_CC_MDSS_DP_LINK1_DIV_CLK_SRC] = NULL;
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disp_cc_sm8250_clocks[DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC] = NULL;
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disp_cc_sm8250_clocks[DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC] = NULL;
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} else if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8350-dispcc")) {
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static struct clk_rcg2 * const rcgs[] = {
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&disp_cc_mdss_byte0_clk_src,
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