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V4L/DVB (13913): saa7127: Add support for generating SECAM output for the SAA712[89] chips
This change fixes up saa7127_s_std() generate SECAM out, if the user has requested a 50 Hz video standard set that only contains a request for SECAM standards and not PAL. Only the SAA712[89] chips can generate SECAM, the SAA712[67] chips cannot. I was unclear on the burst start and end values - I couldn't figure out the units - so I left them the same as for the PAL systems. A the video decoders on both a PVR-350 (SAA7115) and an HVR-1600 (CX23418) identify the SECAM signal generated by a SAA7129 with this patch as SECAM. Signed-off-by: Andy Walls <awalls@radix.net> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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@ -181,7 +181,7 @@ static const struct i2c_reg_value saa7127_init_config_common[] = {
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#define SAA7127_60HZ_DAC_CONTROL 0x15
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static const struct i2c_reg_value saa7127_init_config_60hz[] = {
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{ SAA7127_REG_BURST_START, 0x19 },
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/* BURST_END is also used as a chip ID in saa7127_detect_client */
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/* BURST_END is also used as a chip ID in saa7127_probe */
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{ SAA7127_REG_BURST_END, 0x1d },
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{ SAA7127_REG_CHROMA_PHASE, 0xa3 },
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{ SAA7127_REG_GAINU, 0x98 },
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@ -200,10 +200,10 @@ static const struct i2c_reg_value saa7127_init_config_60hz[] = {
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{ 0, 0 }
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};
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#define SAA7127_50HZ_DAC_CONTROL 0x02
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static struct i2c_reg_value saa7127_init_config_50hz[] = {
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#define SAA7127_50HZ_PAL_DAC_CONTROL 0x02
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static struct i2c_reg_value saa7127_init_config_50hz_pal[] = {
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{ SAA7127_REG_BURST_START, 0x21 },
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/* BURST_END is also used as a chip ID in saa7127_detect_client */
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/* BURST_END is also used as a chip ID in saa7127_probe */
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{ SAA7127_REG_BURST_END, 0x1d },
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{ SAA7127_REG_CHROMA_PHASE, 0x3f },
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{ SAA7127_REG_GAINU, 0x7d },
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@ -222,6 +222,28 @@ static struct i2c_reg_value saa7127_init_config_50hz[] = {
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{ 0, 0 }
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};
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#define SAA7127_50HZ_SECAM_DAC_CONTROL 0x08
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static struct i2c_reg_value saa7127_init_config_50hz_secam[] = {
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{ SAA7127_REG_BURST_START, 0x21 },
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/* BURST_END is also used as a chip ID in saa7127_probe */
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{ SAA7127_REG_BURST_END, 0x1d },
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{ SAA7127_REG_CHROMA_PHASE, 0x3f },
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{ SAA7127_REG_GAINU, 0x6a },
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{ SAA7127_REG_GAINV, 0x81 },
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{ SAA7127_REG_BLACK_LEVEL, 0x33 },
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{ SAA7127_REG_BLANKING_LEVEL, 0x35 },
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{ SAA7127_REG_VBI_BLANKING, 0x35 },
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{ SAA7127_REG_DAC_CONTROL, 0x08 },
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{ SAA7127_REG_BURST_AMP, 0x2f },
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{ SAA7127_REG_SUBC3, 0xb2 },
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{ SAA7127_REG_SUBC2, 0x3b },
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{ SAA7127_REG_SUBC1, 0xa3 },
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{ SAA7127_REG_SUBC0, 0x28 },
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{ SAA7127_REG_MULTI, 0x90 },
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{ SAA7127_REG_CLOSED_CAPTION, 0x00 },
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{ 0, 0 }
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};
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/*
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**********************************************************************
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*
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@ -463,10 +485,21 @@ static int saa7127_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
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v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n");
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inittab = saa7127_init_config_60hz;
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state->reg_61 = SAA7127_60HZ_DAC_CONTROL;
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} else if (state->ident == V4L2_IDENT_SAA7129 &&
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(std & V4L2_STD_SECAM) &&
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!(std & (V4L2_STD_625_50 & ~V4L2_STD_SECAM))) {
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/* If and only if SECAM, with a SAA712[89] */
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v4l2_dbg(1, debug, sd,
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"Selecting 50 Hz SECAM video Standard\n");
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inittab = saa7127_init_config_50hz_secam;
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state->reg_61 = SAA7127_50HZ_SECAM_DAC_CONTROL;
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} else {
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v4l2_dbg(1, debug, sd, "Selecting 50 Hz video Standard\n");
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inittab = saa7127_init_config_50hz;
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state->reg_61 = SAA7127_50HZ_DAC_CONTROL;
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v4l2_dbg(1, debug, sd, "Selecting 50 Hz PAL video Standard\n");
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inittab = saa7127_init_config_50hz_pal;
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state->reg_61 = SAA7127_50HZ_PAL_DAC_CONTROL;
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}
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/* Write Table */
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