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sky2: document GPHY_CTRL bits

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Add documentation of GPHY_CTRL register bits even if driver
is not using them (yet).

Signed-off-by: Stephen Hemminger <shemminger@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Stephen Hemminger 2007-08-29 12:58:12 -07:00 committed by David S. Miller
parent 5b296bc9e1
commit efcf6e2feb
1 changed files with 22 additions and 0 deletions
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22
drivers/net/sky2.h
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@ -1850,6 +1850,28 @@ enum {
/* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */ /* GPHY_CTRL 32 bit GPHY Control Reg (YUKON only) */
enum { enum {
GPC_TX_PAUSE = 1<<30, /* Tx pause enabled (ro) */
GPC_RX_PAUSE = 1<<29, /* Rx pause enabled (ro) */
GPC_SPEED = 3<<27, /* PHY speed (ro) */
GPC_LINK = 1<<26, /* Link up (ro) */
GPC_DUPLEX = 1<<25, /* Duplex (ro) */
GPC_CLOCK = 1<<24, /* 125Mhz clock stable (ro) */
GPC_PDOWN = 1<<23, /* Internal regulator 2.5 power down */
GPC_TSTMODE = 1<<22, /* Test mode */
GPC_REG18 = 1<<21, /* Reg18 Power down */
GPC_REG12SEL = 3<<19, /* Reg12 power setting */
GPC_REG18SEL = 3<<17, /* Reg18 power setting */
GPC_SPILOCK = 1<<16, /* SPI lock (ASF) */
GPC_LEDMUX = 3<<14, /* LED Mux */
GPC_INTPOL = 1<<13, /* Interrupt polarity */
GPC_DETECT = 1<<12, /* Energy detect */
GPC_1000HD = 1<<11, /* Enable 1000Mbit HD */
GPC_SLAVE = 1<<10, /* Slave mode */
GPC_PAUSE = 1<<9, /* Pause enable */
GPC_LEDCTL = 3<<6, /* GPHY Leds */
GPC_RST_CLR = 1<<1, /* Clear GPHY Reset */ GPC_RST_CLR = 1<<1, /* Clear GPHY Reset */
GPC_RST_SET = 1<<0, /* Set GPHY Reset */ GPC_RST_SET = 1<<0, /* Set GPHY Reset */
}; };