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ARM: imx6q: register phy fixup only when CONFIG_PHYLIB is enabled
It fixes the following compile error with network disabled in imx_v6_v7_defconfig. arch/arm/mach-imx/built-in.o: In function `ksz9021rn_phy_fixup': imx53-dt.c:(.text+0x5f70): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f84): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5f98): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fac): undefined reference to `mdiobus_write' imx53-dt.c:(.text+0x5fc0): undefined reference to `mdiobus_write' arch/arm/mach-imx/built-in.o: In function `imx6q_init_machine': imx53-dt.c:(.init.text+0x387c): undefined reference to `phy_register_fixup_for_uid' make: *** [.tmp_vmlinux1] Error 1 Reported-by: Artem Bityutskiy <dedekind1@gmail.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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@ -63,21 +63,24 @@ soft:
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/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
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static int ksz9021rn_phy_fixup(struct phy_device *phydev)
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{
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/* min rx data delay */
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phy_write(phydev, 0x0b, 0x8105);
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phy_write(phydev, 0x0c, 0x0000);
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if (IS_ENABLED(CONFIG_PHYLIB)) {
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/* min rx data delay */
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phy_write(phydev, 0x0b, 0x8105);
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phy_write(phydev, 0x0c, 0x0000);
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/* max rx/tx clock delay, min rx/tx control delay */
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phy_write(phydev, 0x0b, 0x8104);
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phy_write(phydev, 0x0c, 0xf0f0);
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phy_write(phydev, 0x0b, 0x104);
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/* max rx/tx clock delay, min rx/tx control delay */
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phy_write(phydev, 0x0b, 0x8104);
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phy_write(phydev, 0x0c, 0xf0f0);
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phy_write(phydev, 0x0b, 0x104);
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}
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return 0;
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}
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static void __init imx6q_sabrelite_init(void)
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{
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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if (IS_ENABLED(CONFIG_PHYLIB))
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phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
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ksz9021rn_phy_fixup);
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}
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