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[ALSA] ASoC: Fix TLV320AIC3X PLL divider table for 64 kHz rate
Signed-off-by: Jarkko Nikula <jarkko.nikula@nokia.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
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@ -681,8 +681,8 @@ static const struct aic3x_rate_divs aic3x_divs[] = {
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{22579200, 48000, 48000, 0x0, 8, 7075},
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{33868800, 48000, 48000, 0x0, 5, 8049},
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/* 64k */
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{22579200, 96000, 96000, 0x1, 8, 7075},
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{33868800, 96000, 96000, 0x1, 5, 8049},
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{22579200, 64000, 96000, 0x1, 8, 7075},
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{33868800, 64000, 96000, 0x1, 5, 8049},
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/* 88.2k */
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{22579200, 88200, 88200, 0x0, 8, 0},
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{33868800, 88200, 88200, 0x0, 5, 3333},
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