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ALSA: dice: avoid superflous write at bus reset
When a bus reset happens, the enable register is automatically cleared, so we do not need to clear it manually when stopping the stream. Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
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@ -246,6 +246,9 @@ static void dice_enable_clear(struct dice *dice)
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{
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__be32 value;
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if (!dice->global_enabled)
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return;
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value = 0;
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snd_fw_transaction(dice->unit, TCODE_WRITE_QUADLET_REQUEST,
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global_address(dice, GLOBAL_ENABLE),
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@ -1009,6 +1012,8 @@ static void dice_bus_reset(struct fw_unit *unit)
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* manner.
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*/
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amdtp_out_stream_pcm_abort(&dice->stream);
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dice->global_enabled = false;
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dice_stream_stop_packets(dice);
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dice_owner_update(dice);
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