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PCI: microchip: Rename PLDA structures to be generic
Rename struct mc_msi to plda_msi and move most of struct mc_pcie to a new struct plda_pcie_rp so they can be shared by all PLDA-based drivers. The axi_base_addr field remains in struct mc_pcie since it's Microchip-specific data. The event interrupt code is still using struct mc_pcie because the event interrupt code can not be re-used. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20240328091835.14797-6-minda.chen@starfivetech.com Signed-off-by: Minda Chen <minda.chen@starfivetech.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
This commit is contained in:
Minda Chen
Bjorn Helgaas
parent
55ba2532b3
commit
e9b7007a94
@ -22,7 +22,7 @@
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#include "pcie-plda.h"
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/* Number of MSI IRQs */
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#define MC_MAX_NUM_MSI_IRQS 32
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#define PLDA_MAX_NUM_MSI_IRQS 32
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/* PCIe Bridge Phy and Controller Phy offsets */
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#define MC_PCIE1_BRIDGE_ADDR 0x00008000u
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@ -179,25 +179,29 @@ struct event_map {
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u32 event_bit;
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};
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struct mc_msi {
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struct plda_msi {
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struct mutex lock; /* Protect used bitmap */
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struct irq_domain *msi_domain;
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struct irq_domain *dev_domain;
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u32 num_vectors;
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u64 vector_phy;
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DECLARE_BITMAP(used, MC_MAX_NUM_MSI_IRQS);
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DECLARE_BITMAP(used, PLDA_MAX_NUM_MSI_IRQS);
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};
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struct mc_pcie {
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void __iomem *axi_base_addr;
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struct plda_pcie_rp {
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struct device *dev;
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struct irq_domain *intx_domain;
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struct irq_domain *event_domain;
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raw_spinlock_t lock;
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struct mc_msi msi;
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struct plda_msi msi;
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void __iomem *bridge_addr;
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};
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struct mc_pcie {
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struct plda_pcie_rp plda;
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void __iomem *axi_base_addr;
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};
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struct cause {
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const char *sym;
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const char *str;
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@ -313,7 +317,7 @@ static struct mc_pcie *port;
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static void mc_pcie_enable_msi(struct mc_pcie *port, void __iomem *ecam)
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{
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struct mc_msi *msi = &port->msi;
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struct plda_msi *msi = &port->plda.msi;
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u16 reg;
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u8 queue_size;
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@ -336,10 +340,10 @@ static void mc_pcie_enable_msi(struct mc_pcie *port, void __iomem *ecam)
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static void mc_handle_msi(struct irq_desc *desc)
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{
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struct mc_pcie *port = irq_desc_get_handler_data(desc);
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struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct device *dev = port->dev;
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struct mc_msi *msi = &port->msi;
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struct plda_msi *msi = &port->msi;
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void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long status;
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u32 bit;
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@ -364,7 +368,7 @@ static void mc_handle_msi(struct irq_desc *desc)
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static void mc_msi_bottom_irq_ack(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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void __iomem *bridge_base_addr = port->bridge_addr;
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u32 bitpos = data->hwirq;
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@ -373,7 +377,7 @@ static void mc_msi_bottom_irq_ack(struct irq_data *data)
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static void mc_compose_msi_msg(struct irq_data *data, struct msi_msg *msg)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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phys_addr_t addr = port->msi.vector_phy;
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msg->address_lo = lower_32_bits(addr);
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@ -400,8 +404,8 @@ static struct irq_chip mc_msi_bottom_irq_chip = {
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static int mc_irq_msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs, void *args)
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{
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struct mc_pcie *port = domain->host_data;
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struct mc_msi *msi = &port->msi;
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struct plda_pcie_rp *port = domain->host_data;
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struct plda_msi *msi = &port->msi;
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unsigned long bit;
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mutex_lock(&msi->lock);
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@ -425,8 +429,8 @@ static void mc_irq_msi_domain_free(struct irq_domain *domain, unsigned int virq,
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unsigned int nr_irqs)
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{
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struct irq_data *d = irq_domain_get_irq_data(domain, virq);
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struct mc_pcie *port = irq_data_get_irq_chip_data(d);
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struct mc_msi *msi = &port->msi;
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(d);
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struct plda_msi *msi = &port->msi;
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mutex_lock(&msi->lock);
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@ -456,11 +460,11 @@ static struct msi_domain_info mc_msi_domain_info = {
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.chip = &mc_msi_irq_chip,
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};
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static int mc_allocate_msi_domains(struct mc_pcie *port)
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static int mc_allocate_msi_domains(struct plda_pcie_rp *port)
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{
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struct device *dev = port->dev;
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struct fwnode_handle *fwnode = of_node_to_fwnode(dev->of_node);
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struct mc_msi *msi = &port->msi;
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struct plda_msi *msi = &port->msi;
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mutex_init(&port->msi.lock);
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@ -484,7 +488,7 @@ static int mc_allocate_msi_domains(struct mc_pcie *port)
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static void mc_handle_intx(struct irq_desc *desc)
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{
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struct mc_pcie *port = irq_desc_get_handler_data(desc);
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struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
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struct irq_chip *chip = irq_desc_get_chip(desc);
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struct device *dev = port->dev;
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void __iomem *bridge_base_addr = port->bridge_addr;
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@ -511,7 +515,7 @@ static void mc_handle_intx(struct irq_desc *desc)
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static void mc_ack_intx_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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void __iomem *bridge_base_addr = port->bridge_addr;
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u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
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@ -520,7 +524,7 @@ static void mc_ack_intx_irq(struct irq_data *data)
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static void mc_mask_intx_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long flags;
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u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
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@ -535,7 +539,7 @@ static void mc_mask_intx_irq(struct irq_data *data)
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static void mc_unmask_intx_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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void __iomem *bridge_base_addr = port->bridge_addr;
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unsigned long flags;
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u32 mask = BIT(data->hwirq + PM_MSI_INT_INTX_SHIFT);
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@ -625,21 +629,22 @@ static u32 local_events(struct mc_pcie *port)
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return val;
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}
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static u32 get_events(struct mc_pcie *port)
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static u32 get_events(struct plda_pcie_rp *port)
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{
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struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
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u32 events = 0;
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events |= pcie_events(port);
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events |= sec_errors(port);
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events |= ded_errors(port);
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events |= local_events(port);
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events |= pcie_events(mc_port);
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events |= sec_errors(mc_port);
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events |= ded_errors(mc_port);
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events |= local_events(mc_port);
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return events;
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}
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static irqreturn_t mc_event_handler(int irq, void *dev_id)
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{
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struct mc_pcie *port = dev_id;
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struct plda_pcie_rp *port = dev_id;
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struct device *dev = port->dev;
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struct irq_data *data;
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@ -655,7 +660,7 @@ static irqreturn_t mc_event_handler(int irq, void *dev_id)
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static void mc_handle_event(struct irq_desc *desc)
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{
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struct mc_pcie *port = irq_desc_get_handler_data(desc);
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struct plda_pcie_rp *port = irq_desc_get_handler_data(desc);
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unsigned long events;
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u32 bit;
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struct irq_chip *chip = irq_desc_get_chip(desc);
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@ -672,12 +677,13 @@ static void mc_handle_event(struct irq_desc *desc)
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static void mc_ack_event_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
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u32 event = data->hwirq;
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void __iomem *addr;
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u32 mask;
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addr = port->axi_base_addr + event_descs[event].base +
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addr = mc_port->axi_base_addr + event_descs[event].base +
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event_descs[event].offset;
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mask = event_descs[event].mask;
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mask |= event_descs[event].enb_mask;
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@ -687,13 +693,14 @@ static void mc_ack_event_irq(struct irq_data *data)
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static void mc_mask_event_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
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u32 event = data->hwirq;
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void __iomem *addr;
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u32 mask;
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u32 val;
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addr = port->axi_base_addr + event_descs[event].base +
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addr = mc_port->axi_base_addr + event_descs[event].base +
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event_descs[event].mask_offset;
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mask = event_descs[event].mask;
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if (event_descs[event].enb_mask) {
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@ -717,13 +724,14 @@ static void mc_mask_event_irq(struct irq_data *data)
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static void mc_unmask_event_irq(struct irq_data *data)
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{
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struct mc_pcie *port = irq_data_get_irq_chip_data(data);
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struct plda_pcie_rp *port = irq_data_get_irq_chip_data(data);
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struct mc_pcie *mc_port = container_of(port, struct mc_pcie, plda);
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u32 event = data->hwirq;
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void __iomem *addr;
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u32 mask;
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u32 val;
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addr = port->axi_base_addr + event_descs[event].base +
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addr = mc_port->axi_base_addr + event_descs[event].base +
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event_descs[event].mask_offset;
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mask = event_descs[event].mask;
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@ -811,7 +819,7 @@ static int mc_pcie_init_clks(struct device *dev)
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return 0;
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}
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static int mc_pcie_init_irq_domains(struct mc_pcie *port)
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static int mc_pcie_init_irq_domains(struct plda_pcie_rp *port)
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{
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struct device *dev = port->dev;
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struct device_node *node = dev->of_node;
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@ -889,7 +897,7 @@ static void mc_pcie_setup_window(void __iomem *bridge_base_addr, u32 index,
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}
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static int mc_pcie_setup_windows(struct platform_device *pdev,
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struct mc_pcie *port)
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struct plda_pcie_rp *port)
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{
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void __iomem *bridge_base_addr = port->bridge_addr;
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struct pci_host_bridge *bridge = platform_get_drvdata(pdev);
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@ -970,7 +978,7 @@ static void mc_disable_interrupts(struct mc_pcie *port)
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writel_relaxed(GENMASK(31, 0), bridge_base_addr + ISTATUS_HOST);
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}
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static int mc_init_interrupts(struct platform_device *pdev, struct mc_pcie *port)
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static int mc_init_interrupts(struct platform_device *pdev, struct plda_pcie_rp *port)
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{
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struct device *dev = &pdev->dev;
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int irq;
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@ -1043,12 +1051,12 @@ static int mc_platform_init(struct pci_config_window *cfg)
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mc_pcie_enable_msi(port, cfg->win);
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/* Configure non-config space outbound ranges */
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ret = mc_pcie_setup_windows(pdev, port);
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ret = mc_pcie_setup_windows(pdev, &port->plda);
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if (ret)
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return ret;
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/* Address translation is up; safe to enable interrupts */
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ret = mc_init_interrupts(pdev, port);
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ret = mc_init_interrupts(pdev, &port->plda);
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if (ret)
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return ret;
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@ -1059,6 +1067,7 @@ static int mc_host_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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void __iomem *bridge_base_addr;
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struct plda_pcie_rp *plda;
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int ret;
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u32 val;
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@ -1066,7 +1075,8 @@ static int mc_host_probe(struct platform_device *pdev)
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if (!port)
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return -ENOMEM;
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port->dev = dev;
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plda = &port->plda;
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plda->dev = dev;
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port->axi_base_addr = devm_platform_ioremap_resource(pdev, 1);
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if (IS_ERR(port->axi_base_addr))
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@ -1075,7 +1085,7 @@ static int mc_host_probe(struct platform_device *pdev)
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mc_disable_interrupts(port);
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bridge_base_addr = port->axi_base_addr + MC_PCIE_BRIDGE_ADDR;
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port->bridge_addr = bridge_base_addr;
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plda->bridge_addr = bridge_base_addr;
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/* Allow enabling MSI by disabling MSI-X */
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val = readl(bridge_base_addr + PCIE_PCI_IRQ_DW0);
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@ -1087,10 +1097,10 @@ static int mc_host_probe(struct platform_device *pdev)
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val &= NUM_MSI_MSGS_MASK;
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val >>= NUM_MSI_MSGS_SHIFT;
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port->msi.num_vectors = 1 << val;
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plda->msi.num_vectors = 1 << val;
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/* Pick vector address from design */
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port->msi.vector_phy = readl_relaxed(bridge_base_addr + IMSI_ADDR);
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plda->msi.vector_phy = readl_relaxed(bridge_base_addr + IMSI_ADDR);
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ret = mc_pcie_init_clks(dev);
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if (ret) {
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