[ALSA] oxygen: mute by default

Initialize the playback volume controls as being muted and having
minimal volume.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This commit is contained in:
Clemens Ladisch 2008-04-16 09:14:30 +02:00 committed by Takashi Iwai
parent 193e813814
commit e983532e44
4 changed files with 20 additions and 18 deletions

View File

@ -66,12 +66,12 @@ static void hifier_init(struct oxygen *chip)
{
struct hifier_data *data = chip->model_data;
data->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
ak4396_write(chip, AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
ak4396_write(chip, AK4396_CONTROL_2, data->ak4396_ctl2);
ak4396_write(chip, AK4396_CONTROL_3, AK4396_PCM);
ak4396_write(chip, AK4396_LCH_ATT, 0xff);
ak4396_write(chip, AK4396_RCH_ATT, 0xff);
ak4396_write(chip, AK4396_LCH_ATT, 0);
ak4396_write(chip, AK4396_RCH_ATT, 0);
snd_component_add(chip->card, "AK4396");
snd_component_add(chip->card, "CS5340");

View File

@ -112,7 +112,7 @@ static void ak4396_init(struct oxygen *chip)
struct generic_data *data = chip->model_data;
unsigned int i;
data->ak4396_ctl2 = AK4396_DEM_OFF | AK4396_DFS_NORMAL;
data->ak4396_ctl2 = AK4396_SMUTE | AK4396_DEM_OFF | AK4396_DFS_NORMAL;
for (i = 0; i < 4; ++i) {
ak4396_write(chip, i,
AK4396_CONTROL_1, AK4396_DIF_24_MSB | AK4396_RSTN);
@ -120,8 +120,8 @@ static void ak4396_init(struct oxygen *chip)
AK4396_CONTROL_2, data->ak4396_ctl2);
ak4396_write(chip, i,
AK4396_CONTROL_3, AK4396_PCM);
ak4396_write(chip, i, AK4396_LCH_ATT, 0xff);
ak4396_write(chip, i, AK4396_RCH_ATT, 0xff);
ak4396_write(chip, i, AK4396_LCH_ATT, 0);
ak4396_write(chip, i, AK4396_RCH_ATT, 0);
}
snd_component_add(chip->card, "AK4396");
}

View File

@ -221,7 +221,8 @@ static void oxygen_init(struct oxygen *chip)
chip->dac_routing = 1;
for (i = 0; i < 8; ++i)
chip->dac_volume[i] = chip->model->dac_volume_max;
chip->dac_volume[i] = chip->model->dac_volume_min;
chip->dac_mute = 1;
chip->spdif_playback_enable = 1;
chip->spdif_bits = OXYGEN_SPDIF_C | OXYGEN_SPDIF_ORIGINAL |
(IEC958_AES1_CON_PCM_CODER << OXYGEN_SPDIF_CATEGORY_SHIFT);

View File

@ -188,12 +188,13 @@ static void xonar_d2_init(struct oxygen *chip)
data->output_enable_bit = GPIO_D2_OUTPUT_ENABLE;
for (i = 0; i < 4; ++i) {
pcm1796_write(chip, i, 18, PCM1796_FMT_24_LJUST | PCM1796_ATLD);
pcm1796_write(chip, i, 18, PCM1796_MUTE | PCM1796_DMF_DISABLED |
PCM1796_FMT_24_LJUST | PCM1796_ATLD);
pcm1796_write(chip, i, 19, PCM1796_FLT_SHARP | PCM1796_ATS_1);
pcm1796_write(chip, i, 20, PCM1796_OS_64);
pcm1796_write(chip, i, 21, 0);
pcm1796_write(chip, i, 16, 0xff); /* set ATL/ATR after ATLD */
pcm1796_write(chip, i, 17, 0xff);
pcm1796_write(chip, i, 16, 0x0f); /* set ATL/ATR after ATLD */
pcm1796_write(chip, i, 17, 0x0f);
}
oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL, GPIO_D2_ALT);
@ -239,8 +240,8 @@ static void xonar_dx_init(struct oxygen *chip)
CS4398_DEM_NONE | CS4398_DIF_LJUST);
cs4398_write(chip, 3, CS4398_ATAPI_B_R | CS4398_ATAPI_A_L);
cs4398_write(chip, 4, CS4398_MUTEP_LOW | CS4398_PAMUTE);
cs4398_write(chip, 5, 0);
cs4398_write(chip, 6, 0);
cs4398_write(chip, 5, 0xfe);
cs4398_write(chip, 6, 0xfe);
cs4398_write(chip, 7, CS4398_RMP_DN | CS4398_RMP_UP |
CS4398_ZERO_CROSS | CS4398_SOFT_RAMP);
cs4362a_write(chip, 0x02, CS4362A_DIF_LJUST);
@ -250,16 +251,16 @@ static void xonar_dx_init(struct oxygen *chip)
cs4362a_write(chip, 0x05, 0);
cs4362a_write(chip, 0x06, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x07, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x08, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x09, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x0a, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0b, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0c, CS4362A_FM_SINGLE |
CS4362A_ATAPI_B_R | CS4362A_ATAPI_A_L);
cs4362a_write(chip, 0x07, 0);
cs4362a_write(chip, 0x08, 0);
cs4362a_write(chip, 0x0a, 0);
cs4362a_write(chip, 0x0b, 0);
cs4362a_write(chip, 0x0d, 0);
cs4362a_write(chip, 0x0e, 0);
cs4362a_write(chip, 0x0d, 0x7f | CS4362A_MUTE);
cs4362a_write(chip, 0x0e, 0x7f | CS4362A_MUTE);
/* clear power down */
cs4398_write(chip, 8, CS4398_CPEN);
cs4362a_write(chip, 0x01, CS4362A_CPEN);