irqchip/gic-v4.1: Fix programming of GICR_VPROPBASER_4_1_SIZE

The Size field of GICv4.1 VPROPBASER register indicates number of
pages minus one and together Page_Size and Size control the vPEID
width. Let's respect this requirement of the architecture.

Signed-off-by: Zenghui Yu <yuzenghui@huawei.com>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20200206075711.1275-2-yuzenghui@huawei.com
This commit is contained in:
Zenghui Yu 2020-02-06 15:57:06 +08:00 committed by Marc Zyngier
parent 107945227a
commit e88bd316e5

View File

@ -2531,7 +2531,7 @@ static int allocate_vpe_l1_table(void)
npg = 1;
}
val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg);
val |= FIELD_PREP(GICR_VPROPBASER_4_1_SIZE, npg - 1);
/* Right, that's the number of CPU pages we need for L1 */
np = DIV_ROUND_UP(npg * psz, PAGE_SIZE);