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PCI: Add arch_can_pci_mmap_io() on architectures which can mmap() I/O space
This is relatively esoteric, and knowing that we don't have it makes life easier in some cases rather than just an eventual -EINVAL from pci_mmap_page_range(). Signed-off-by: David Woodhouse <dwmw@amazon.co.uk> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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@ -119,7 +119,8 @@ useful return codes should be provided.
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Platforms which support write-combining maps of PCI resources must define
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arch_can_pci_mmap_wc() which shall evaluate to non-zero at runtime when
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write-combining is permitted.
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write-combining is permitted. Platforms which support maps of I/O resources
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define arch_can_pci_mmap_io() similarly.
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Legacy resources are protected by the HAVE_PCI_LEGACY define. Platforms
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wishing to support legacy functionality should define it and provide
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@ -48,7 +48,8 @@ extern int pci_proc_domain(struct pci_bus *bus);
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struct vm_area_struct;
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/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
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#define HAVE_PCI_MMAP 1
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#define HAVE_PCI_MMAP 1
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#define arch_can_pci_mmap_io() 1
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extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
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size_t count);
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@ -80,6 +80,7 @@ struct vm_area_struct;
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/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() and it does WC */
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#define HAVE_PCI_MMAP 1
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#define arch_can_pci_mmap_io() 1
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#define arch_can_pci_mmap_wc() 1
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extern int pci_legacy_read(struct pci_bus *bus, loff_t port, u32 *val,
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@ -42,6 +42,7 @@ static inline int pci_proc_domain(struct pci_bus *bus)
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/* Platform support for /proc/bus/pci/X/Y mmap()s. */
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#define HAVE_PCI_MMAP
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#define arch_can_pci_mmap_io() 1
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#define HAVE_ARCH_PCI_GET_UNMAPPED_AREA
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#define get_pci_unmapped_area get_fb_unmapped_area
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@ -47,7 +47,8 @@ struct pci_dev;
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#define PCI_DMA_BUS_IS_PHYS (1)
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/* Tell drivers/pci/proc.c that we have pci_mmap_page_range() */
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#define HAVE_PCI_MMAP 1
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#define HAVE_PCI_MMAP 1
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#define arch_can_pci_mmap_io() 1
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#endif /* __KERNEL__ */
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@ -1174,11 +1174,14 @@ static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
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} else {
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pdev->res_attr[num] = res_attr;
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sprintf(res_attr_name, "resource%d", num);
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res_attr->mmap = pci_mmap_resource_uc;
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}
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if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
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res_attr->read = pci_read_resource_io;
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res_attr->write = pci_write_resource_io;
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if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
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res_attr->read = pci_read_resource_io;
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res_attr->write = pci_write_resource_io;
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if (arch_can_pci_mmap_io())
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res_attr->mmap = pci_mmap_resource_uc;
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} else {
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res_attr->mmap = pci_mmap_resource_uc;
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}
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}
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res_attr->attr.name = res_attr_name;
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res_attr->attr.mode = S_IRUSR | S_IWUSR;
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@ -202,6 +202,8 @@ static long proc_bus_pci_ioctl(struct file *file, unsigned int cmd,
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#ifdef HAVE_PCI_MMAP
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case PCIIOC_MMAP_IS_IO:
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if (!arch_can_pci_mmap_io())
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return -EINVAL;
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fpriv->mmap_state = pci_mmap_io;
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break;
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@ -232,15 +234,16 @@ static int proc_bus_pci_mmap(struct file *file, struct vm_area_struct *vma)
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{
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struct pci_dev *dev = PDE_DATA(file_inode(file));
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struct pci_filp_private *fpriv = file->private_data;
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int i, ret, write_combine = 0, res_bit;
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int i, ret, write_combine = 0, res_bit = IORESOURCE_MEM;
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if (!capable(CAP_SYS_RAWIO))
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return -EPERM;
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if (fpriv->mmap_state == pci_mmap_io)
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if (fpriv->mmap_state == pci_mmap_io) {
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if (!arch_can_pci_mmap_io())
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return -EINVAL;
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res_bit = IORESOURCE_IO;
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else
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res_bit = IORESOURCE_MEM;
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}
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/* Make sure the caller is mapping a real resource for this device */
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for (i = 0; i < PCI_ROM_RESOURCE; i++) {
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@ -1636,6 +1636,9 @@ int pci_mmap_page_range(struct pci_dev *pdev, struct vm_area_struct *vma,
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#ifndef arch_can_pci_mmap_wc
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#define arch_can_pci_mmap_wc() 0
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#endif
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#ifndef arch_can_pci_mmap_io
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#define arch_can_pci_mmap_io() 0
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#endif
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#ifndef pci_root_bus_fwnode
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#define pci_root_bus_fwnode(bus) NULL
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