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net: sparx5: replace a few variables with new equivalent ones
Replace the old rx and tx variables: channel_id, FDMA_DCB_MAX, FDMA_RX_DCB_MAX_DBS, FDMA_TX_DCB_MAX_DBS, dcb_index and db_index with the equivalents from the FDMA rx and tx structs. These variables are not entangled in any buffer allocation and can therefore be replaced in advance. Signed-off-by: Daniel Machon <daniel.machon@microchip.com> Reviewed-by: Steen Hegelund <Steen.Hegelund@microchip.com> Reviewed-by: Jens Emil Schulz Østergaard <jensemil.schulzostergaard@microchip.com> Reviewed-by: Horatiu Vultur <horatiu.vultur@microchip.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
947a72f40f
commit
e8218f7a9f
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@ -36,10 +36,11 @@ static void sparx5_fdma_rx_add_dcb(struct sparx5_rx *rx,
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struct sparx5_rx_dcb_hw *dcb,
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u64 nextptr)
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{
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struct fdma *fdma = &rx->fdma;
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int idx = 0;
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/* Reset the status of the DB */
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for (idx = 0; idx < FDMA_RX_DCB_MAX_DBS; ++idx) {
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for (idx = 0; idx < fdma->n_dbs; ++idx) {
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struct sparx5_db_hw *db = &dcb->db[idx];
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db->status = FDMA_DCB_STATUS_INTR;
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@ -57,7 +58,7 @@ static void sparx5_fdma_tx_add_dcb(struct sparx5_tx *tx,
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int idx = 0;
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/* Reset the status of the DB */
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for (idx = 0; idx < FDMA_TX_DCB_MAX_DBS; ++idx) {
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for (idx = 0; idx < tx->fdma.n_dbs; ++idx) {
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struct sparx5_db_hw *db = &dcb->db[idx];
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db->status = FDMA_DCB_STATUS_DONE;
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@ -68,16 +69,18 @@ static void sparx5_fdma_tx_add_dcb(struct sparx5_tx *tx,
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static void sparx5_fdma_rx_activate(struct sparx5 *sparx5, struct sparx5_rx *rx)
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{
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struct fdma *fdma = &rx->fdma;
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/* Write the buffer address in the LLP and LLP1 regs */
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spx5_wr(((u64)rx->dma) & GENMASK(31, 0), sparx5,
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FDMA_DCB_LLP(rx->channel_id));
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spx5_wr(((u64)rx->dma) >> 32, sparx5, FDMA_DCB_LLP1(rx->channel_id));
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FDMA_DCB_LLP(fdma->channel_id));
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spx5_wr(((u64)rx->dma) >> 32, sparx5, FDMA_DCB_LLP1(fdma->channel_id));
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/* Set the number of RX DBs to be used, and DB end-of-frame interrupt */
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spx5_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(FDMA_RX_DCB_MAX_DBS) |
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spx5_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) |
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FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) |
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FDMA_CH_CFG_CH_INJ_PORT_SET(XTR_QUEUE),
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sparx5, FDMA_CH_CFG(rx->channel_id));
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sparx5, FDMA_CH_CFG(fdma->channel_id));
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/* Set the RX Watermark to max */
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spx5_rmw(FDMA_XTR_CFG_XTR_FIFO_WM_SET(31), FDMA_XTR_CFG_XTR_FIFO_WM,
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@ -89,22 +92,24 @@ static void sparx5_fdma_rx_activate(struct sparx5 *sparx5, struct sparx5_rx *rx)
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sparx5, FDMA_PORT_CTRL(0));
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/* Enable RX channel DB interrupt */
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spx5_rmw(BIT(rx->channel_id),
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BIT(rx->channel_id) & FDMA_INTR_DB_ENA_INTR_DB_ENA,
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spx5_rmw(BIT(fdma->channel_id),
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BIT(fdma->channel_id) & FDMA_INTR_DB_ENA_INTR_DB_ENA,
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sparx5, FDMA_INTR_DB_ENA);
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/* Activate the RX channel */
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spx5_wr(BIT(rx->channel_id), sparx5, FDMA_CH_ACTIVATE);
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spx5_wr(BIT(fdma->channel_id), sparx5, FDMA_CH_ACTIVATE);
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}
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static void sparx5_fdma_rx_deactivate(struct sparx5 *sparx5, struct sparx5_rx *rx)
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{
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struct fdma *fdma = &rx->fdma;
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/* Deactivate the RX channel */
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spx5_rmw(0, BIT(rx->channel_id) & FDMA_CH_ACTIVATE_CH_ACTIVATE,
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spx5_rmw(0, BIT(fdma->channel_id) & FDMA_CH_ACTIVATE_CH_ACTIVATE,
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sparx5, FDMA_CH_ACTIVATE);
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/* Disable RX channel DB interrupt */
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spx5_rmw(0, BIT(rx->channel_id) & FDMA_INTR_DB_ENA_INTR_DB_ENA,
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spx5_rmw(0, BIT(fdma->channel_id) & FDMA_INTR_DB_ENA_INTR_DB_ENA,
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sparx5, FDMA_INTR_DB_ENA);
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/* Stop RX fdma */
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@ -114,42 +119,44 @@ static void sparx5_fdma_rx_deactivate(struct sparx5 *sparx5, struct sparx5_rx *r
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static void sparx5_fdma_tx_activate(struct sparx5 *sparx5, struct sparx5_tx *tx)
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{
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struct fdma *fdma = &tx->fdma;
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/* Write the buffer address in the LLP and LLP1 regs */
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spx5_wr(((u64)tx->dma) & GENMASK(31, 0), sparx5,
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FDMA_DCB_LLP(tx->channel_id));
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spx5_wr(((u64)tx->dma) >> 32, sparx5, FDMA_DCB_LLP1(tx->channel_id));
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FDMA_DCB_LLP(fdma->channel_id));
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spx5_wr(((u64)tx->dma) >> 32, sparx5, FDMA_DCB_LLP1(fdma->channel_id));
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/* Set the number of TX DBs to be used, and DB end-of-frame interrupt */
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spx5_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(FDMA_TX_DCB_MAX_DBS) |
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spx5_wr(FDMA_CH_CFG_CH_DCB_DB_CNT_SET(fdma->n_dbs) |
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FDMA_CH_CFG_CH_INTR_DB_EOF_ONLY_SET(1) |
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FDMA_CH_CFG_CH_INJ_PORT_SET(INJ_QUEUE),
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sparx5, FDMA_CH_CFG(tx->channel_id));
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sparx5, FDMA_CH_CFG(fdma->channel_id));
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/* Start TX fdma */
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spx5_rmw(FDMA_PORT_CTRL_INJ_STOP_SET(0), FDMA_PORT_CTRL_INJ_STOP,
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sparx5, FDMA_PORT_CTRL(0));
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/* Activate the channel */
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spx5_wr(BIT(tx->channel_id), sparx5, FDMA_CH_ACTIVATE);
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spx5_wr(BIT(fdma->channel_id), sparx5, FDMA_CH_ACTIVATE);
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}
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static void sparx5_fdma_tx_deactivate(struct sparx5 *sparx5, struct sparx5_tx *tx)
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{
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/* Disable the channel */
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spx5_rmw(0, BIT(tx->channel_id) & FDMA_CH_ACTIVATE_CH_ACTIVATE,
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spx5_rmw(0, BIT(tx->fdma.channel_id) & FDMA_CH_ACTIVATE_CH_ACTIVATE,
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sparx5, FDMA_CH_ACTIVATE);
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}
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static void sparx5_fdma_rx_reload(struct sparx5 *sparx5, struct sparx5_rx *rx)
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{
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/* Reload the RX channel */
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spx5_wr(BIT(rx->channel_id), sparx5, FDMA_CH_RELOAD);
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spx5_wr(BIT(rx->fdma.channel_id), sparx5, FDMA_CH_RELOAD);
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}
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static void sparx5_fdma_tx_reload(struct sparx5 *sparx5, struct sparx5_tx *tx)
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{
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/* Reload the TX channel */
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spx5_wr(BIT(tx->channel_id), sparx5, FDMA_CH_RELOAD);
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spx5_wr(BIT(tx->fdma.channel_id), sparx5, FDMA_CH_RELOAD);
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}
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static struct sk_buff *sparx5_fdma_rx_alloc_skb(struct sparx5_rx *rx)
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@ -160,6 +167,7 @@ static struct sk_buff *sparx5_fdma_rx_alloc_skb(struct sparx5_rx *rx)
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static bool sparx5_fdma_rx_get_frame(struct sparx5 *sparx5, struct sparx5_rx *rx)
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{
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struct fdma *fdma = &rx->fdma;
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struct sparx5_db_hw *db_hw;
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unsigned int packet_size;
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struct sparx5_port *port;
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@ -169,17 +177,17 @@ static bool sparx5_fdma_rx_get_frame(struct sparx5 *sparx5, struct sparx5_rx *rx
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dma_addr_t dma_addr;
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/* Check if the DCB is done */
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db_hw = &rx->dcb_entries[rx->dcb_index].db[rx->db_index];
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db_hw = &rx->dcb_entries[fdma->dcb_index].db[fdma->db_index];
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if (unlikely(!(db_hw->status & FDMA_DCB_STATUS_DONE)))
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return false;
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skb = rx->skb[rx->dcb_index][rx->db_index];
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skb = rx->skb[fdma->dcb_index][fdma->db_index];
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/* Replace the DB entry with a new SKB */
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new_skb = sparx5_fdma_rx_alloc_skb(rx);
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if (unlikely(!new_skb))
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return false;
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/* Map the new skb data and set the new skb */
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dma_addr = virt_to_phys(new_skb->data);
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rx->skb[rx->dcb_index][rx->db_index] = new_skb;
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rx->skb[fdma->dcb_index][fdma->db_index] = new_skb;
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db_hw->dataptr = dma_addr;
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packet_size = FDMA_DCB_STATUS_BLOCKL(db_hw->status);
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skb_put(skb, packet_size);
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@ -215,23 +223,24 @@ static int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight)
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{
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struct sparx5_rx *rx = container_of(napi, struct sparx5_rx, napi);
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struct sparx5 *sparx5 = container_of(rx, struct sparx5, rx);
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struct fdma *fdma = &rx->fdma;
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int counter = 0;
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while (counter < weight && sparx5_fdma_rx_get_frame(sparx5, rx)) {
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struct sparx5_rx_dcb_hw *old_dcb;
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rx->db_index++;
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fdma->db_index++;
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counter++;
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/* Check if the DCB can be reused */
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if (rx->db_index != FDMA_RX_DCB_MAX_DBS)
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if (fdma->db_index != fdma->n_dbs)
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continue;
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/* As the DCB can be reused, just advance the dcb_index
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* pointer and set the nextptr in the DCB
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*/
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rx->db_index = 0;
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old_dcb = &rx->dcb_entries[rx->dcb_index];
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rx->dcb_index++;
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rx->dcb_index &= FDMA_DCB_MAX - 1;
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fdma->db_index = 0;
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old_dcb = &rx->dcb_entries[fdma->dcb_index];
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fdma->dcb_index++;
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fdma->dcb_index &= fdma->n_dcbs - 1;
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sparx5_fdma_rx_add_dcb(rx, old_dcb,
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rx->dma +
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((unsigned long)old_dcb -
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@ -239,8 +248,8 @@ static int sparx5_fdma_napi_callback(struct napi_struct *napi, int weight)
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}
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if (counter < weight) {
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napi_complete_done(&rx->napi, counter);
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spx5_rmw(BIT(rx->channel_id),
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BIT(rx->channel_id) & FDMA_INTR_DB_ENA_INTR_DB_ENA,
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spx5_rmw(BIT(fdma->channel_id),
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BIT(fdma->channel_id) & FDMA_INTR_DB_ENA_INTR_DB_ENA,
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sparx5, FDMA_INTR_DB_ENA);
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}
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if (counter)
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@ -252,12 +261,13 @@ static struct sparx5_tx_dcb_hw *sparx5_fdma_next_dcb(struct sparx5_tx *tx,
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struct sparx5_tx_dcb_hw *dcb)
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{
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struct sparx5_tx_dcb_hw *next_dcb;
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struct fdma *fdma = &tx->fdma;
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next_dcb = dcb;
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next_dcb++;
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/* Handle wrap-around */
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if ((unsigned long)next_dcb >=
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((unsigned long)tx->first_entry + FDMA_DCB_MAX * sizeof(*dcb)))
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((unsigned long)tx->first_entry + fdma->n_dcbs * sizeof(*dcb)))
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next_dcb = tx->first_entry;
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return next_dcb;
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}
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@ -300,28 +310,29 @@ int sparx5_fdma_xmit(struct sparx5 *sparx5, u32 *ifh, struct sk_buff *skb)
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static int sparx5_fdma_rx_alloc(struct sparx5 *sparx5)
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{
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struct sparx5_rx *rx = &sparx5->rx;
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struct fdma *fdma = &rx->fdma;
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struct sparx5_rx_dcb_hw *dcb;
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int idx, jdx;
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int size;
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size = sizeof(struct sparx5_rx_dcb_hw) * FDMA_DCB_MAX;
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size = sizeof(struct sparx5_rx_dcb_hw) * fdma->n_dcbs;
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size = ALIGN(size, PAGE_SIZE);
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rx->dcb_entries = devm_kzalloc(sparx5->dev, size, GFP_KERNEL);
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if (!rx->dcb_entries)
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return -ENOMEM;
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rx->dma = virt_to_phys(rx->dcb_entries);
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rx->last_entry = rx->dcb_entries;
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rx->db_index = 0;
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rx->dcb_index = 0;
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fdma->db_index = 0;
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fdma->dcb_index = 0;
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/* Now for each dcb allocate the db */
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for (idx = 0; idx < FDMA_DCB_MAX; ++idx) {
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for (idx = 0; idx < fdma->n_dcbs; ++idx) {
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dcb = &rx->dcb_entries[idx];
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dcb->info = 0;
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/* For each db allocate an skb and map skb data pointer to the DB
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* dataptr. In this way when the frame is received the skb->data
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* will contain the frame, so no memcpy is needed
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*/
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for (jdx = 0; jdx < FDMA_RX_DCB_MAX_DBS; ++jdx) {
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for (jdx = 0; jdx < fdma->n_dbs; ++jdx) {
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struct sparx5_db_hw *db_hw = &dcb->db[jdx];
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dma_addr_t dma_addr;
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struct sk_buff *skb;
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@ -348,10 +359,11 @@ static int sparx5_fdma_tx_alloc(struct sparx5 *sparx5)
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{
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struct sparx5_tx *tx = &sparx5->tx;
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struct sparx5_tx_dcb_hw *dcb;
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struct fdma *fdma = &tx->fdma;
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int idx, jdx;
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int size;
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size = sizeof(struct sparx5_tx_dcb_hw) * FDMA_DCB_MAX;
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size = sizeof(struct sparx5_tx_dcb_hw) * fdma->n_dcbs;
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size = ALIGN(size, PAGE_SIZE);
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tx->curr_entry = devm_kzalloc(sparx5->dev, size, GFP_KERNEL);
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if (!tx->curr_entry)
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@ -360,11 +372,11 @@ static int sparx5_fdma_tx_alloc(struct sparx5 *sparx5)
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tx->first_entry = tx->curr_entry;
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INIT_LIST_HEAD(&tx->db_list);
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/* Now for each dcb allocate the db */
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for (idx = 0; idx < FDMA_DCB_MAX; ++idx) {
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for (idx = 0; idx < fdma->n_dcbs; ++idx) {
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dcb = &tx->curr_entry[idx];
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dcb->info = 0;
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/* TX databuffers must be 16byte aligned */
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for (jdx = 0; jdx < FDMA_TX_DCB_MAX_DBS; ++jdx) {
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for (jdx = 0; jdx < fdma->n_dbs; ++jdx) {
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struct sparx5_db_hw *db_hw = &dcb->db[jdx];
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struct sparx5_db *db;
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dma_addr_t phys;
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@ -386,7 +398,7 @@ static int sparx5_fdma_tx_alloc(struct sparx5 *sparx5)
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}
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sparx5_fdma_tx_add_dcb(tx, dcb, tx->dma + sizeof(*dcb) * idx);
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/* Let the curr_entry to point to the last allocated entry */
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if (idx == FDMA_DCB_MAX - 1)
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if (idx == fdma->n_dcbs - 1)
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tx->curr_entry = dcb;
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}
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return 0;
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@ -395,9 +407,12 @@ static int sparx5_fdma_tx_alloc(struct sparx5 *sparx5)
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static void sparx5_fdma_rx_init(struct sparx5 *sparx5,
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struct sparx5_rx *rx, int channel)
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{
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struct fdma *fdma = &rx->fdma;
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int idx;
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rx->channel_id = channel;
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fdma->channel_id = channel;
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fdma->n_dcbs = FDMA_DCB_MAX;
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fdma->n_dbs = FDMA_RX_DCB_MAX_DBS;
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/* Fetch a netdev for SKB and NAPI use, any will do */
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for (idx = 0; idx < SPX5_PORTS; ++idx) {
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struct sparx5_port *port = sparx5->ports[idx];
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@ -412,7 +427,11 @@ static void sparx5_fdma_rx_init(struct sparx5 *sparx5,
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static void sparx5_fdma_tx_init(struct sparx5 *sparx5,
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struct sparx5_tx *tx, int channel)
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{
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tx->channel_id = channel;
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struct fdma *fdma = &tx->fdma;
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fdma->channel_id = channel;
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fdma->n_dcbs = FDMA_DCB_MAX;
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fdma->n_dbs = FDMA_TX_DCB_MAX_DBS;
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}
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irqreturn_t sparx5_fdma_handler(int irq, void *args)
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@ -126,14 +126,12 @@ struct sparx5_tx_dcb_hw {
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* When the db_index reached FDMA_RX_DCB_MAX_DBS the DB is reused.
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*/
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struct sparx5_rx {
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struct fdma fdma;
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struct sparx5_rx_dcb_hw *dcb_entries;
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struct sparx5_rx_dcb_hw *last_entry;
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struct sk_buff *skb[FDMA_DCB_MAX][FDMA_RX_DCB_MAX_DBS];
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int db_index;
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int dcb_index;
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dma_addr_t dma;
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struct napi_struct napi;
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u32 channel_id;
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struct net_device *ndev;
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u64 packets;
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};
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@ -142,11 +140,11 @@ struct sparx5_rx {
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* DCBs are chained using the DCBs nextptr field.
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*/
|
||||
struct sparx5_tx {
|
||||
struct fdma fdma;
|
||||
struct sparx5_tx_dcb_hw *curr_entry;
|
||||
struct sparx5_tx_dcb_hw *first_entry;
|
||||
struct list_head db_list;
|
||||
dma_addr_t dma;
|
||||
u32 channel_id;
|
||||
u64 packets;
|
||||
u64 dropped;
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue
Block a user