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ARM: imx: add cpu idle support for i.MX6SLL
i.MX6SLL supports cpu idle with ARM power gated, it can reuse i.MX6SX's cpu idle driver to support below 3 states of cpu idle: state0: WFI; state1: WAIT mode with ARM power on; state2: WAIT mode with ARM power off. L2_PGE in GPC_CNTR needs to be cleared to support state2 cpu idle. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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@ -25,8 +25,8 @@ obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
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ifeq ($(CONFIG_CPU_IDLE),y)
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obj-$(CONFIG_SOC_IMX5) += cpuidle-imx5.o
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obj-$(CONFIG_SOC_IMX6Q) += cpuidle-imx6q.o
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obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o
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obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sl.o
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obj-$(CONFIG_SOC_IMX6SL) += cpuidle-imx6sl.o cpuidle-imx6sx.o
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obj-$(CONFIG_SOC_IMX6SLL) += cpuidle-imx6sl.o cpuidle-imx6sx.o
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obj-$(CONFIG_SOC_IMX6SX) += cpuidle-imx6sx.o
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obj-$(CONFIG_SOC_IMX6UL) += cpuidle-imx6sx.o
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endif
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@ -103,6 +103,7 @@ int __init imx6sx_cpuidle_init(void)
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{
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imx6_set_int_mem_clk_lpm(true);
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imx6_enable_rbc(false);
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imx_gpc_set_l2_mem_power_in_lpm(false);
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/*
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* set ARM power up/down timing to the fastest,
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* sw2iso and sw can be set to one 32K cycle = 31us
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@ -42,7 +42,10 @@ static void __init imx6sl_init_late(void)
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if (IS_ENABLED(CONFIG_ARM_IMX6Q_CPUFREQ))
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platform_device_register_simple("imx6q-cpufreq", -1, NULL, 0);
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imx6sl_cpuidle_init();
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if (cpu_is_imx6sl())
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imx6sl_cpuidle_init();
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else
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imx6sx_cpuidle_init();
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}
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static void __init imx6sl_init_machine(void)
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