sh: sh7785lcr: fix prototype board on 32bit MMU mode.

Fix up PCA9564 resources on 32bit MMU mode using prototype board.

Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
Tested-by: Raul Porcel <armin76@gentoo.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Yoshihiro Shimoda 2009-08-27 13:57:26 +00:00 committed by Paul Mundt
parent f840dd5e74
commit e79d57479c
4 changed files with 28 additions and 0 deletions

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@ -171,6 +171,13 @@ config SH_SH7785LCR_29BIT_PHYSMAPS
DIP switch(S2-5). If you set the DIP switch for S2-5 = ON,
you can access all on-board device in 29bit address mode.
config SH_SH7785LCR_PT
bool "SH7785LCR prototype board on 32-bit MMU mode"
depends on SH_SH7785LCR && 32BIT
default n
help
If you use prototype board, this option is enabled.
config SH_URQUELL
bool "Urquell"
depends on CPU_SUBTYPE_SH7786

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@ -223,6 +223,19 @@ static struct platform_device sm501_device = {
.resource = sm501_resources,
};
static struct resource i2c_proto_resources[] = {
[0] = {
.start = PCA9564_PROTO_32BIT_ADDR,
.end = PCA9564_PROTO_32BIT_ADDR + PCA9564_SIZE - 1,
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
},
[1] = {
.start = 12,
.end = 12,
.flags = IORESOURCE_IRQ,
},
};
static struct resource i2c_resources[] = {
[0] = {
.start = PCA9564_ADDR,
@ -271,6 +284,11 @@ static int __init sh7785lcr_devices_setup(void)
i2c_register_board_info(0, sh7785lcr_i2c_devices,
ARRAY_SIZE(sh7785lcr_i2c_devices));
if (mach_is_sh7785lcr_pt()) {
i2c_device.resource = &i2c_proto_resources;
i2c_device.num_resources = ARRAY_SIZE(i2c_proto_resources);
}
return platform_add_devices(sh7785lcr_devices,
ARRAY_SIZE(sh7785lcr_devices));
}

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@ -35,6 +35,8 @@
#define PCA9564_ADDR 0x06000000 /* I2C */
#define PCA9564_SIZE 0x00000100
#define PCA9564_PROTO_32BIT_ADDR 0x14000000
#define SM107_MEM_ADDR 0x10000000
#define SM107_MEM_SIZE 0x00e00000
#define SM107_REG_ADDR 0x13e00000

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@ -53,6 +53,7 @@ RSK7203 SH_RSK7203
AP325RXA SH_AP325RXA
SH7763RDP SH_SH7763RDP
SH7785LCR SH_SH7785LCR
SH7785LCR_PT SH_SH7785LCR_PT
URQUELL SH_URQUELL
ESPT SH_ESPT
POLARIS SH_POLARIS