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docs: parisc: convert to ReST and add to documentation body
Manually convert the two PA-RISC documents to ReST, adding them to the Linux documentation body. Signed-off-by: Mauro Carvalho Chehab <mchehab+samsung@kernel.org> Signed-off-by: Jonathan Corbet <corbet@lwn.net>
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Mauro Carvalho Chehab
Jonathan Corbet
parent
6d6486a0c5
commit
e77e9187ae
@ -147,6 +147,7 @@ implementation.
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ia64/index
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m68k/index
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powerpc/index
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parisc/index
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riscv/index
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s390/index
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sh/index
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@ -1,8 +1,13 @@
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=================
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PA-RISC Debugging
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=================
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okay, here are some hints for debugging the lower-level parts of
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linux/parisc.
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1. Absolute addresses
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=====================
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A lot of the assembly code currently runs in real mode, which means
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absolute addresses are used instead of virtual addresses as in the
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@ -12,6 +17,7 @@ currently).
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2. HPMCs
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========
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When real-mode code tries to access non-existent memory, you'll get
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an HPMC instead of a kernel oops. To debug an HPMC, try to find
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@ -27,6 +33,7 @@ access it.
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3. Q bit fun
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============
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Certain, very critical code has to clear the Q bit in the PSW. What
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happens when the Q bit is cleared is the CPU does not update the
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18
Documentation/parisc/index.rst
Normal file
18
Documentation/parisc/index.rst
Normal file
@ -0,0 +1,18 @@
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.. SPDX-License-Identifier: GPL-2.0
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====================
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PA-RISC Architecture
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====================
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.. toctree::
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:maxdepth: 2
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debugging
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registers
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.. only:: subproject and html
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Indices
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=======
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* :ref:`genindex`
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@ -1,11 +1,16 @@
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================================
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Register Usage for Linux/PA-RISC
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================================
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[ an asterisk is used for planned usage which is currently unimplemented ]
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General Registers as specified by ABI
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General Registers as specified by ABI
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=====================================
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Control Registers
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Control Registers
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-----------------
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=============================== ===============================================
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CR 0 (Recovery Counter) used for ptrace
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CR 1-CR 7(undefined) unused
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CR 8 (Protection ID) per-process value*
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@ -29,26 +34,35 @@ CR28 (TR 4) not used
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CR29 (TR 5) not used
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CR30 (TR 6) current / 0
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CR31 (TR 7) Temporary register, used in various places
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=============================== ===============================================
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Space Registers (kernel mode)
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Space Registers (kernel mode)
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-----------------------------
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=============================== ===============================================
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SR0 temporary space register
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SR4-SR7 set to 0
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SR1 temporary space register
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SR2 kernel should not clobber this
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SR3 used for userspace accesses (current process)
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=============================== ===============================================
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Space Registers (user mode)
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Space Registers (user mode)
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---------------------------
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=============================== ===============================================
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SR0 temporary space register
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SR1 temporary space register
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SR2 holds space of linux gateway page
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SR3 holds user address space value while in kernel
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SR4-SR7 Defines short address space for user/kernel
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=============================== ===============================================
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Processor Status Word
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Processor Status Word
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---------------------
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=============================== ===============================================
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W (64-bit addresses) 0
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E (Little-endian) 0
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S (Secure Interval Timer) 0
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@ -69,15 +83,19 @@ Q (collect interruption state) 1 (0 in code directly preceding an rfi)
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P (Protection Identifiers) 1*
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D (Data address translation) 1, 0 while executing real-mode code
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I (external interrupt mask) used by cli()/sti() macros
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=============================== ===============================================
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"Invisible" Registers
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"Invisible" Registers
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---------------------
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=============================== ===============================================
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PSW default W value 0
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PSW default E value 0
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Shadow Registers used by interruption handler code
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TOC enable bit 1
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=============================== ===============================================
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=========================================================================
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-------------------------------------------------------------------------
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The PA-RISC architecture defines 7 registers as "shadow registers".
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Those are used in RETURN FROM INTERRUPTION AND RESTORE instruction to reduce
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@ -85,7 +103,8 @@ the state save and restore time by eliminating the need for general register
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(GR) saves and restores in interruption handlers.
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Shadow registers are the GRs 1, 8, 9, 16, 17, 24, and 25.
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=========================================================================
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-------------------------------------------------------------------------
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Register usage notes, originally from John Marvin, with some additional
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notes from Randolph Chung.
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@ -96,10 +115,12 @@ course, you need to save them if you care about them, before calling
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another procedure. Some of the above registers do have special meanings
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that you should be aware of:
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r1: The addil instruction is hardwired to place its result in r1,
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r1:
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The addil instruction is hardwired to place its result in r1,
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so if you use that instruction be aware of that.
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r2: This is the return pointer. In general you don't want to
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r2:
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This is the return pointer. In general you don't want to
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use this, since you need the pointer to get back to your
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caller. However, it is grouped with this set of registers
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since the caller can't rely on the value being the same
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@ -107,23 +128,27 @@ that you should be aware of:
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and return through that register after trashing r2, and
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that should not cause a problem for the calling routine.
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r19-r22: these are generally regarded as temporary registers.
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r19-r22:
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these are generally regarded as temporary registers.
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Note that in 64 bit they are arg7-arg4.
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r23-r26: these are arg3-arg0, i.e. you can use them if you
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r23-r26:
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these are arg3-arg0, i.e. you can use them if you
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don't care about the values that were passed in anymore.
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r28,r29: are ret0 and ret1. They are what you pass return values
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r28,r29:
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are ret0 and ret1. They are what you pass return values
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in. r28 is the primary return. When returning small structures
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r29 may also be used to pass data back to the caller.
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r30: stack pointer
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r30:
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stack pointer
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r31: the ble instruction puts the return pointer in here.
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r31:
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the ble instruction puts the return pointer in here.
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r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
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r3-r18,r27,r30 need to be saved and restored. r3-r18 are just
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general purpose registers. r27 is the data pointer, and is
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used to make references to global variables easier. r30 is
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the stack pointer.
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