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irqchip/aspeed-scu-ic: Correctly initialise status and enable registers
The status and enable registers are never initialised with sensible default values. Fix those. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> [maz: commit message] Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230130085430.635583-1-ryan_chen@aspeedtech.com
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@ -17,8 +17,9 @@
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#define ASPEED_SCU_IC_REG 0x018
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#define ASPEED_SCU_IC_SHIFT 0
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#define ASPEED_SCU_IC_ENABLE GENMASK(6, ASPEED_SCU_IC_SHIFT)
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#define ASPEED_SCU_IC_ENABLE GENMASK(15, ASPEED_SCU_IC_SHIFT)
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#define ASPEED_SCU_IC_NUM_IRQS 7
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#define ASPEED_SCU_IC_STATUS GENMASK(28, 16)
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#define ASPEED_SCU_IC_STATUS_SHIFT 16
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#define ASPEED_AST2600_SCU_IC0_REG 0x560
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@ -155,6 +156,8 @@ static int aspeed_scu_ic_of_init_common(struct aspeed_scu_ic *scu_ic,
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rc = PTR_ERR(scu_ic->scu);
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goto err;
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}
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regmap_write_bits(scu_ic->scu, scu_ic->reg, ASPEED_SCU_IC_STATUS, ASPEED_SCU_IC_STATUS);
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regmap_write_bits(scu_ic->scu, scu_ic->reg, ASPEED_SCU_IC_ENABLE, 0);
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irq = irq_of_parse_and_map(node, 0);
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if (!irq) {
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