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net: ethernet: ti: cpsw: move common hw init code in separate func
move common hw init code in separate function as preparation for adding new switchdev driver. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Grygorii Strashko
David S. Miller
parent
5dea398514
commit
e6a8462491
@ -14,7 +14,7 @@ obj-$(CONFIG_TI_DAVINCI_MDIO) += davinci_mdio.o
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obj-$(CONFIG_TI_CPSW_PHY_SEL) += cpsw-phy-sel.o
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obj-$(CONFIG_TI_CPTS_MOD) += cpts.o
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obj-$(CONFIG_TI_CPSW) += ti_cpsw.o
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ti_cpsw-y := cpsw.o davinci_cpdma.o cpsw_ale.o
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ti_cpsw-y := cpsw.o davinci_cpdma.o cpsw_ale.o cpsw_priv.o
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obj-$(CONFIG_TI_KEYSTONE_NETCP) += keystone_netcp.o
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keystone_netcp-y := netcp_core.o cpsw_ale.o
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@ -3020,16 +3020,12 @@ static int cpsw_probe(struct platform_device *pdev)
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struct cpsw_platform_data *data;
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struct net_device *ndev;
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struct cpsw_priv *priv;
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struct cpdma_params dma_params;
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struct cpsw_ale_params ale_params;
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void __iomem *ss_regs;
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void __iomem *cpts_regs;
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struct resource *res, *ss_res;
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struct gpio_descs *mode;
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u32 slave_offset, sliver_offset, slave_size;
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const struct soc_device_attribute *soc;
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struct cpsw_common *cpsw;
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int ret = 0, i, ch;
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int ret = 0, ch;
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int irq;
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cpsw = devm_kzalloc(dev, sizeof(struct cpsw_common), GFP_KERNEL);
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@ -3109,103 +3105,12 @@ static int cpsw_probe(struct platform_device *pdev)
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cpsw->rx_packet_max = max(rx_packet_max, CPSW_MAX_PACKET_SIZE);
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cpsw->rx_ch_num = 1;
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cpsw->tx_ch_num = 1;
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cpsw->version = readl(&cpsw->regs->id_ver);
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memset(&dma_params, 0, sizeof(dma_params));
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memset(&ale_params, 0, sizeof(ale_params));
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switch (cpsw->version) {
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case CPSW_VERSION_1:
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cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET;
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cpts_regs = ss_regs + CPSW1_CPTS_OFFSET;
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cpsw->hw_stats = ss_regs + CPSW1_HW_STATS;
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dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET;
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dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET;
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ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET;
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slave_offset = CPSW1_SLAVE_OFFSET;
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slave_size = CPSW1_SLAVE_SIZE;
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sliver_offset = CPSW1_SLIVER_OFFSET;
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dma_params.desc_mem_phys = 0;
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break;
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case CPSW_VERSION_2:
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case CPSW_VERSION_3:
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case CPSW_VERSION_4:
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cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET;
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cpts_regs = ss_regs + CPSW2_CPTS_OFFSET;
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cpsw->hw_stats = ss_regs + CPSW2_HW_STATS;
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dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET;
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dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET;
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ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET;
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slave_offset = CPSW2_SLAVE_OFFSET;
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slave_size = CPSW2_SLAVE_SIZE;
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sliver_offset = CPSW2_SLIVER_OFFSET;
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dma_params.desc_mem_phys =
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(u32 __force) ss_res->start + CPSW2_BD_OFFSET;
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break;
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default:
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dev_err(dev, "unknown version 0x%08x\n", cpsw->version);
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ret = -ENODEV;
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ret = cpsw_init_common(cpsw, ss_regs, ale_ageout,
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ss_res->start + CPSW2_BD_OFFSET,
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descs_pool_size);
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if (ret)
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goto clean_dt_ret;
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}
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for (i = 0; i < cpsw->data.slaves; i++) {
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struct cpsw_slave *slave = &cpsw->slaves[i];
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void __iomem *regs = cpsw->regs;
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slave->slave_num = i;
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slave->data = &cpsw->data.slave_data[i];
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slave->regs = regs + slave_offset;
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slave->sliver = regs + sliver_offset;
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slave->port_vlan = slave->data->dual_emac_res_vlan;
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slave_offset += slave_size;
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sliver_offset += SLIVER_SIZE;
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}
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ale_params.dev = dev;
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ale_params.ale_ageout = ale_ageout;
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ale_params.ale_entries = data->ale_entries;
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ale_params.ale_ports = CPSW_ALE_PORTS_NUM;
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cpsw->ale = cpsw_ale_create(&ale_params);
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if (!cpsw->ale) {
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dev_err(dev, "error initializing ale engine\n");
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ret = -ENODEV;
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goto clean_dt_ret;
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}
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dma_params.dev = dev;
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dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH;
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dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE;
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dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP;
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dma_params.txcp = dma_params.txhdp + CPDMA_TXCP;
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dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP;
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dma_params.num_chan = data->channels;
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dma_params.has_soft_reset = true;
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dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE;
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dma_params.desc_mem_size = data->bd_ram_size;
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dma_params.desc_align = 16;
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dma_params.has_ext_regs = true;
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dma_params.desc_hw_addr = dma_params.desc_mem_phys;
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dma_params.bus_freq_mhz = cpsw->bus_freq_mhz;
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dma_params.descs_pool_size = descs_pool_size;
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cpsw->dma = cpdma_ctlr_create(&dma_params);
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if (!cpsw->dma) {
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dev_err(dev, "error initializing dma\n");
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ret = -ENOMEM;
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goto clean_dt_ret;
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}
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cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node);
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if (IS_ERR(cpsw->cpts)) {
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ret = PTR_ERR(cpsw->cpts);
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goto clean_dma_ret;
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}
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ch = cpsw->quirk_irq ? 0 : 7;
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cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, ch, cpsw_tx_handler, 0);
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@ -3313,7 +3218,6 @@ clean_unregister_netdev_ret:
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unregister_netdev(ndev);
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clean_cpts:
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cpts_release(cpsw->cpts);
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clean_dma_ret:
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cpdma_ctlr_destroy(cpsw->dma);
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clean_dt_ret:
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cpsw_remove_dt(pdev);
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129
drivers/net/ethernet/ti/cpsw_priv.c
Normal file
129
drivers/net/ethernet/ti/cpsw_priv.c
Normal file
@ -0,0 +1,129 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Texas Instruments Ethernet Switch Driver
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*
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* Copyright (C) 2019 Texas Instruments
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*/
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#include <linux/if_ether.h>
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#include <linux/if_vlan.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#include <linux/phy.h>
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#include <linux/platform_device.h>
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#include <linux/skbuff.h>
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#include "cpts.h"
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#include "cpsw_ale.h"
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#include "cpsw_priv.h"
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#include "davinci_cpdma.h"
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int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs,
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int ale_ageout, phys_addr_t desc_mem_phys,
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int descs_pool_size)
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{
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u32 slave_offset, sliver_offset, slave_size;
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struct cpsw_ale_params ale_params;
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struct cpsw_platform_data *data;
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struct cpdma_params dma_params;
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struct device *dev = cpsw->dev;
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void __iomem *cpts_regs;
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int ret = 0, i;
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data = &cpsw->data;
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cpsw->rx_ch_num = 1;
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cpsw->tx_ch_num = 1;
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cpsw->version = readl(&cpsw->regs->id_ver);
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memset(&dma_params, 0, sizeof(dma_params));
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memset(&ale_params, 0, sizeof(ale_params));
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switch (cpsw->version) {
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case CPSW_VERSION_1:
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cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET;
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cpts_regs = ss_regs + CPSW1_CPTS_OFFSET;
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cpsw->hw_stats = ss_regs + CPSW1_HW_STATS;
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dma_params.dmaregs = ss_regs + CPSW1_CPDMA_OFFSET;
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dma_params.txhdp = ss_regs + CPSW1_STATERAM_OFFSET;
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ale_params.ale_regs = ss_regs + CPSW1_ALE_OFFSET;
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slave_offset = CPSW1_SLAVE_OFFSET;
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slave_size = CPSW1_SLAVE_SIZE;
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sliver_offset = CPSW1_SLIVER_OFFSET;
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dma_params.desc_mem_phys = 0;
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break;
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case CPSW_VERSION_2:
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case CPSW_VERSION_3:
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case CPSW_VERSION_4:
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cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET;
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cpts_regs = ss_regs + CPSW2_CPTS_OFFSET;
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cpsw->hw_stats = ss_regs + CPSW2_HW_STATS;
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dma_params.dmaregs = ss_regs + CPSW2_CPDMA_OFFSET;
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dma_params.txhdp = ss_regs + CPSW2_STATERAM_OFFSET;
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ale_params.ale_regs = ss_regs + CPSW2_ALE_OFFSET;
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slave_offset = CPSW2_SLAVE_OFFSET;
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slave_size = CPSW2_SLAVE_SIZE;
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sliver_offset = CPSW2_SLIVER_OFFSET;
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dma_params.desc_mem_phys = desc_mem_phys;
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break;
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default:
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dev_err(dev, "unknown version 0x%08x\n", cpsw->version);
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return -ENODEV;
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}
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for (i = 0; i < cpsw->data.slaves; i++) {
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struct cpsw_slave *slave = &cpsw->slaves[i];
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void __iomem *regs = cpsw->regs;
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slave->slave_num = i;
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slave->data = &cpsw->data.slave_data[i];
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slave->regs = regs + slave_offset;
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slave->sliver = regs + sliver_offset;
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slave->port_vlan = slave->data->dual_emac_res_vlan;
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slave_offset += slave_size;
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sliver_offset += SLIVER_SIZE;
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}
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ale_params.dev = dev;
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ale_params.ale_ageout = ale_ageout;
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ale_params.ale_entries = data->ale_entries;
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ale_params.ale_ports = CPSW_ALE_PORTS_NUM;
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cpsw->ale = cpsw_ale_create(&ale_params);
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if (!cpsw->ale) {
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dev_err(dev, "error initializing ale engine\n");
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return -ENODEV;
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}
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dma_params.dev = dev;
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dma_params.rxthresh = dma_params.dmaregs + CPDMA_RXTHRESH;
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dma_params.rxfree = dma_params.dmaregs + CPDMA_RXFREE;
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dma_params.rxhdp = dma_params.txhdp + CPDMA_RXHDP;
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dma_params.txcp = dma_params.txhdp + CPDMA_TXCP;
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dma_params.rxcp = dma_params.txhdp + CPDMA_RXCP;
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dma_params.num_chan = data->channels;
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dma_params.has_soft_reset = true;
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dma_params.min_packet_size = CPSW_MIN_PACKET_SIZE;
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dma_params.desc_mem_size = data->bd_ram_size;
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dma_params.desc_align = 16;
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dma_params.has_ext_regs = true;
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dma_params.desc_hw_addr = dma_params.desc_mem_phys;
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dma_params.bus_freq_mhz = cpsw->bus_freq_mhz;
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dma_params.descs_pool_size = descs_pool_size;
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cpsw->dma = cpdma_ctlr_create(&dma_params);
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if (!cpsw->dma) {
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dev_err(dev, "error initializing dma\n");
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return -ENOMEM;
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}
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cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node);
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if (IS_ERR(cpsw->cpts)) {
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ret = PTR_ERR(cpsw->cpts);
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cpdma_ctlr_destroy(cpsw->dma);
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}
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return ret;
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}
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@ -434,4 +434,8 @@ struct addr_sync_ctx {
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int flush; /* flush flag */
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};
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int cpsw_init_common(struct cpsw_common *cpsw, void __iomem *ss_regs,
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int ale_ageout, phys_addr_t desc_mem_phys,
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int descs_pool_size);
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#endif /* DRIVERS_NET_ETHERNET_TI_CPSW_PRIV_H_ */
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