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atomic: Provide atomic_{or,xor,and}
Implement atomic logic ops -- atomic_{or,xor,and}. These will replace the atomic_{set,clear}_mask functions that are available on some archs. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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@ -110,7 +110,6 @@ static __inline__ long atomic64_##op##_return(long i, atomic64_t * v) \
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define atomic_andnot atomic_andnot
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#define atomic64_andnot atomic64_andnot
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@ -144,7 +144,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add, +=, add)
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ATOMIC_OPS(sub, -=, sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define atomic_andnot atomic_andnot
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ATOMIC_OP(and, &=, and)
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@ -194,7 +194,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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ATOMIC_OPS(add, +=, add)
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ATOMIC_OPS(sub, -=, sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define atomic_andnot atomic_andnot
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ATOMIC_OP(and, &=, and)
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@ -85,7 +85,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add, add)
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ATOMIC_OPS(sub, sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define atomic_andnot atomic_andnot
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ATOMIC_OP(and, and)
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@ -51,8 +51,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
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(void)__atomic_##op##_return(i, v); \
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}
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, and)
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ATOMIC_OP(or, or)
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ATOMIC_OP(xor, eor)
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@ -28,8 +28,6 @@ asmlinkage int __raw_atomic_test_asm(const volatile int *ptr, int value);
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#define atomic_add_return(i, v) __raw_atomic_add_asm(&(v)->counter, i)
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#define atomic_sub_return(i, v) __raw_atomic_add_asm(&(v)->counter, -(i))
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define atomic_or(i, v) (void)__raw_atomic_or_asm(&(v)->counter, i)
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#define atomic_and(i, v) (void)__raw_atomic_and_asm(&(v)->counter, i)
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#define atomic_xor(i, v) (void)__raw_atomic_xor_asm(&(v)->counter, i)
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@ -192,8 +192,6 @@ static inline void atomic64_##op(long long i, atomic64_t *v) \
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(void)__atomic64_fetch_##op(i, &v->counter); \
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}
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(or)
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ATOMIC_OP(and)
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ATOMIC_OP(xor)
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@ -41,8 +41,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
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ATOMIC_OP_RETURN(add, +=)
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ATOMIC_OP_RETURN(sub, -=)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, &=)
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ATOMIC_OP(or, |=)
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ATOMIC_OP(xor, ^=)
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@ -132,8 +132,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -69,8 +69,6 @@ ATOMIC_OP(sub, -)
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: ia64_atomic_sub(__ia64_asr_i, v); \
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})
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, &)
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ATOMIC_OP(or, |)
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ATOMIC_OP(xor, ^)
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@ -94,8 +94,6 @@ static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -77,8 +77,6 @@ static inline int atomic_##op##_return(int i, atomic_t * v) \
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ATOMIC_OPS(add, +=, add)
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ATOMIC_OPS(sub, -=, sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, &=, and)
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ATOMIC_OP(or, |=, or)
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ATOMIC_OP(xor, ^=, eor)
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@ -74,8 +74,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -137,8 +137,6 @@ static __inline__ int atomic_##op##_return(int i, atomic_t * v) \
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ATOMIC_OPS(add, +=, addu)
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ATOMIC_OPS(sub, -=, subu)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, &=, and)
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ATOMIC_OP(or, |=, or)
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ATOMIC_OP(xor, ^=, xor)
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@ -89,8 +89,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -126,8 +126,6 @@ static __inline__ int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add, +=)
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ATOMIC_OPS(sub, -=)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, &=)
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ATOMIC_OP(or, |=)
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ATOMIC_OP(xor, ^=)
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@ -67,8 +67,6 @@ static __inline__ int atomic_##op##_return(int a, atomic_t *v) \
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ATOMIC_OPS(add, add)
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ATOMIC_OPS(sub, subf)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and, and)
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ATOMIC_OP(or, or)
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ATOMIC_OP(xor, xor)
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@ -282,8 +282,6 @@ static inline void atomic64_##op(long i, atomic64_t *v) \
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__ATOMIC64_LOOP(v, i, __ATOMIC64_##OP, __ATOMIC64_NO_BARRIER); \
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}
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC64_OP(and, AND)
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ATOMIC64_OP(or, OR)
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ATOMIC64_OP(xor, XOR)
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@ -48,8 +48,6 @@ static inline int atomic_##op##_return(int i, atomic_t *v) \
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -17,8 +17,6 @@
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#include <asm/barrier.h>
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#include <asm-generic/atomic64.h>
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#define ATOMIC_INIT(i) { (i) }
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int atomic_add_return(int, atomic_t *);
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@ -33,8 +33,6 @@ long atomic64_##op##_return(long, atomic64_t *);
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -41,8 +41,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
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_atomic_##op((unsigned long *)&v->counter, i); \
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}
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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@ -58,8 +58,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
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return oldval;
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}
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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static inline void atomic_and(int i, atomic_t *v)
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{
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__insn_fetchand4((void *)&v->counter, i);
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@ -191,8 +191,6 @@ static inline void atomic_##op(int i, atomic_t *v) \
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: "memory"); \
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}
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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ATOMIC_OPS(add)
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ATOMIC_OPS(sub)
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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ATOMIC_OP(and)
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ATOMIC_OP(or)
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ATOMIC_OP(xor)
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ATOMIC_OP(and, &)
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#endif
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#ifndef atomic_clear_mask
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#define atomic_clear_mask(i, v) atomic_and(~(i), (v))
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#endif
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#ifndef atomic_or
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#ifndef CONFIG_ARCH_HAS_ATOMIC_OR
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#define CONFIG_ARCH_HAS_ATOMIC_OR
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#endif
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ATOMIC_OP(or, |)
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#endif
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#ifndef atomic_set_mask
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#define atomic_set_mask(i, v) atomic_or((i), (v))
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#ifndef atomic_xor
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ATOMIC_OP(xor, ^)
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#endif
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#undef ATOMIC_OP_RETURN
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#undef ATOMIC_OP
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static inline __deprecated void atomic_clear_mask(unsigned int mask, atomic_t *v)
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{
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atomic_and(~mask, v);
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}
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static inline __deprecated void atomic_set_mask(unsigned int mask, atomic_t *v)
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{
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atomic_or(mask, v);
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}
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/*
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* Atomic operations that C can't guarantee us. Useful for
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* resource counting etc..
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@ -32,6 +32,10 @@ extern long long atomic64_##op##_return(long long a, atomic64_t *v);
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ATOMIC64_OPS(add)
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ATOMIC64_OPS(sub)
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ATOMIC64_OP(and)
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ATOMIC64_OP(or)
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ATOMIC64_OP(xor)
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#undef ATOMIC64_OPS
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#undef ATOMIC64_OP_RETURN
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#undef ATOMIC64_OP
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}
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#endif
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#ifndef CONFIG_ARCH_HAS_ATOMIC_OR
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static inline void atomic_or(int i, atomic_t *v)
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{
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int old;
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int new;
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do {
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old = atomic_read(v);
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new = old | i;
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} while (atomic_cmpxchg(v, old, new) != old);
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}
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#endif /* #ifndef CONFIG_ARCH_HAS_ATOMIC_OR */
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#include <asm-generic/atomic-long.h>
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#ifdef CONFIG_GENERIC_ATOMIC64
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#include <asm-generic/atomic64.h>
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@ -102,6 +102,9 @@ EXPORT_SYMBOL(atomic64_##op##_return);
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ATOMIC64_OPS(add, +=)
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ATOMIC64_OPS(sub, -=)
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ATOMIC64_OP(and, &=)
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ATOMIC64_OP(or, |=)
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ATOMIC64_OP(xor, ^=)
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#undef ATOMIC64_OPS
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#undef ATOMIC64_OP_RETURN
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