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dmaengine: xilinx: xdma: Ease dma_pool alignment requirements

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According to the XDMA datasheet (PG195), the address of any descriptor
must be 32 byte aligned. The datasheet also states that a contiguous
block of descriptors must not cross a 4k address boundary. Therefore,
it is possible to ease the pressure put on the dma_pool allocator
just by requiring sufficient alignment and boundary values. Add proper
macro definition and change the values passed into the
dma_pool_create().

Signed-off-by: Jan Kuliga <jankul@alatek.krakow.pl>
Link: https://lore.kernel.org/r/20231218113943.9099-4-jankul@alatek.krakow.pl
Signed-off-by: Vinod Koul <vkoul@kernel.org>
This commit is contained in:
Jan Kuliga 2023-12-18 12:39:38 +01:00 committed by Vinod Koul
parent 7a9c7f46bd
commit e5bc76b0e1
2 changed files with 6 additions and 6 deletions
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7
drivers/dma/xilinx/xdma-regs.h
View File

@ -64,9 +64,10 @@ struct xdma_hw_desc {
__le64 next_desc;
};
#define XDMA_DESC_SIZE sizeof(struct xdma_hw_desc)
#define XDMA_DESC_BLOCK_SIZE (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT)
#define XDMA_DESC_BLOCK_ALIGN 4096
#define XDMA_DESC_SIZE sizeof(struct xdma_hw_desc)
#define XDMA_DESC_BLOCK_SIZE (XDMA_DESC_SIZE * XDMA_DESC_ADJACENT)
#define XDMA_DESC_BLOCK_ALIGN 32
#define XDMA_DESC_BLOCK_BOUNDARY 4096
/*
* Channel registers

5
drivers/dma/xilinx/xdma.c
View File

@ -741,9 +741,8 @@ static int xdma_alloc_chan_resources(struct dma_chan *chan)
return -EINVAL;
}
xdma_chan->desc_pool = dma_pool_create(dma_chan_name(chan),
dev, XDMA_DESC_BLOCK_SIZE,
XDMA_DESC_BLOCK_ALIGN, 0);
xdma_chan->desc_pool = dma_pool_create(dma_chan_name(chan), dev, XDMA_DESC_BLOCK_SIZE,
XDMA_DESC_BLOCK_ALIGN, XDMA_DESC_BLOCK_BOUNDARY);
if (!xdma_chan->desc_pool) {
xdma_err(xdev, "unable to allocate descriptor pool");
return -ENOMEM;