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ASoC: Fixes for v6.8
Quite a lot of fixes that came in since the merge window, a large portion for for Qualcomm and ES8326. The 8 DAI support for Qualcomm is just raising a constant to allow for devies that otherwise only need DTs, and there's a few other device ID updates for sunxi (Allwinner) and AMD platforms. -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEEreZoqmdXGLWf4p/qJNaLcl1Uh9AFAmW7kKoACgkQJNaLcl1U h9CN9gf/fvsZZAB6jejgWCcO16dQfHS4dWMOxYzjUaivRvmHW/RcE7k0BTTGsRIS 4r/74Kzm2P6xsfyV2U43XXSZHcRc4A1pIsSdijNXcBb0vkS3H4cceDB5WEGHXGEB q5J7exT0HR9OvfdBORry6jgDKbgUUPrRcUbuNxx9bSuPP5CbziPUUOWzZE0oamt5 HIKvh/07IaBNvkEUsaFEIj1ClchjwAALZNR1EGgPxSsOytiqnQP0nBX4kMvP0jmh E7tckse0QrR+XzKtZL2CnOeo+Kk3CdJxXP1yDqVYhJXt3iHMssBkVO2dHXN2ostK p+UNOPWlPMNOpS2vV6cNtu905ECW+Q== =nuZY -----END PGP SIGNATURE----- Merge tag 'asoc-fix-v6.8-rc2' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus ASoC: Fixes for v6.8 Quite a lot of fixes that came in since the merge window, a large portion for for Qualcomm and ES8326. The 8 DAI support for Qualcomm is just raising a constant to allow for devies that otherwise only need DTs, and there's a few other device ID updates for sunxi (Allwinner) and AMD platforms.
This commit is contained in:
commit
e4af312177
@ -22,6 +22,7 @@ properties:
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- const: allwinner,sun6i-a31-spdif
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- const: allwinner,sun8i-h3-spdif
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- const: allwinner,sun50i-h6-spdif
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- const: allwinner,sun50i-h616-spdif
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- items:
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- const: allwinner,sun8i-a83t-spdif
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- const: allwinner,sun8i-h3-spdif
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@ -62,6 +63,8 @@ allOf:
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enum:
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- allwinner,sun6i-a31-spdif
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- allwinner,sun8i-h3-spdif
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- allwinner,sun50i-h6-spdif
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- allwinner,sun50i-h616-spdif
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then:
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required:
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@ -73,7 +76,7 @@ allOf:
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contains:
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enum:
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- allwinner,sun8i-h3-spdif
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- allwinner,sun50i-h6-spdif
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- allwinner,sun50i-h616-spdif
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then:
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properties:
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@ -505,6 +505,13 @@ static int acp_card_rt5682s_hw_params(struct snd_pcm_substream *substream,
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clk_set_rate(drvdata->wclk, srate);
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clk_set_rate(drvdata->bclk, srate * ch * format);
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if (!drvdata->soc_mclk) {
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ret = acp_clk_enable(drvdata, srate, ch * format);
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if (ret < 0) {
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dev_err(rtd->card->dev, "Failed to enable HS clk: %d\n", ret);
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return ret;
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}
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}
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return 0;
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}
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@ -1464,8 +1471,13 @@ int acp_sofdsp_dai_links_create(struct snd_soc_card *card)
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if (drv_data->amp_cpu_id == I2S_SP) {
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links[i].name = "acp-amp-codec";
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links[i].id = AMP_BE_ID;
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links[i].cpus = sof_sp_virtual;
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links[i].num_cpus = ARRAY_SIZE(sof_sp_virtual);
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if (drv_data->platform == RENOIR) {
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links[i].cpus = sof_sp;
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links[i].num_cpus = ARRAY_SIZE(sof_sp);
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} else {
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links[i].cpus = sof_sp_virtual;
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links[i].num_cpus = ARRAY_SIZE(sof_sp_virtual);
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}
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links[i].platforms = sof_component;
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links[i].num_platforms = ARRAY_SIZE(sof_component);
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links[i].dpcm_playback = 1;
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@ -48,6 +48,7 @@ static struct acp_card_drvdata sof_rt5682s_rt1019_data = {
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.hs_codec_id = RT5682S,
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.amp_codec_id = RT1019,
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.dmic_codec_id = DMIC,
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.platform = RENOIR,
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.tdm_mode = false,
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};
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@ -58,6 +59,7 @@ static struct acp_card_drvdata sof_rt5682s_max_data = {
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.hs_codec_id = RT5682S,
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.amp_codec_id = MAX98360A,
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.dmic_codec_id = DMIC,
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.platform = RENOIR,
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.tdm_mode = false,
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};
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@ -68,6 +70,7 @@ static struct acp_card_drvdata sof_nau8825_data = {
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.hs_codec_id = NAU8825,
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.amp_codec_id = MAX98360A,
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.dmic_codec_id = DMIC,
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.platform = REMBRANDT,
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.soc_mclk = true,
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.tdm_mode = false,
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};
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@ -79,6 +82,7 @@ static struct acp_card_drvdata sof_rt5682s_hs_rt1019_data = {
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.hs_codec_id = RT5682S,
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.amp_codec_id = RT1019,
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.dmic_codec_id = DMIC,
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.platform = REMBRANDT,
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.soc_mclk = true,
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.tdm_mode = false,
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};
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@ -354,6 +354,14 @@ static const struct dmi_system_id acp3x_es83xx_dmi_table[] = {
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},
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.driver_data = (void *)(ES83XX_ENABLE_DMIC|ES83XX_48_MHZ_MCLK),
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},
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{
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.matches = {
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DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"),
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DMI_EXACT_MATCH(DMI_PRODUCT_NAME, "HVY-WXX9"),
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DMI_EXACT_MATCH(DMI_PRODUCT_VERSION, "M1010"),
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},
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.driver_data = (void *)(ES83XX_ENABLE_DMIC),
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},
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{
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.matches = {
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DMI_EXACT_MATCH(DMI_BOARD_VENDOR, "HUAWEI"),
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@ -297,6 +297,13 @@ static const struct dmi_system_id yc_acp_quirk_table[] = {
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DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 B7ED"),
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}
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},
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{
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.driver_data = &acp6x_card,
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.matches = {
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DMI_MATCH(DMI_BOARD_VENDOR, "Micro-Star International Co., Ltd."),
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DMI_MATCH(DMI_PRODUCT_NAME, "Bravo 15 C7VF"),
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}
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},
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{
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.driver_data = &acp6x_card,
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.matches = {
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186
sound/soc/codecs/es8326.c
Executable file → Normal file
186
sound/soc/codecs/es8326.c
Executable file → Normal file
@ -45,6 +45,82 @@ struct es8326_priv {
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int jack_remove_retry;
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};
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static int es8326_crosstalk1_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h &= 0x20;
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crosstalk_l &= 0xf0;
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crosstalk = crosstalk_h >> 1 | crosstalk_l >> 4;
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ucontrol->value.integer.value[0] = crosstalk;
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return 0;
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}
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static int es8326_crosstalk1_set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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crosstalk = ucontrol->value.integer.value[0];
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h = (crosstalk & 0x10) << 1;
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crosstalk_l &= 0x0f;
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crosstalk_l |= (crosstalk & 0x0f) << 4;
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regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
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0x20, crosstalk_h);
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regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
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return 0;
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}
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static int es8326_crosstalk2_get(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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regmap_read(es8326->regmap, ES8326_DAC_RAMPRATE, &crosstalk_h);
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h &= 0x10;
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crosstalk_l &= 0x0f;
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crosstalk = crosstalk_h | crosstalk_l;
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ucontrol->value.integer.value[0] = crosstalk;
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return 0;
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}
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static int es8326_crosstalk2_set(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_component *component = snd_kcontrol_chip(kcontrol);
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struct es8326_priv *es8326 = snd_soc_component_get_drvdata(component);
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unsigned int crosstalk_h, crosstalk_l;
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unsigned int crosstalk;
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crosstalk = ucontrol->value.integer.value[0];
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regmap_read(es8326->regmap, ES8326_DAC_CROSSTALK, &crosstalk_l);
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crosstalk_h = crosstalk & 0x10;
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crosstalk_l &= 0xf0;
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crosstalk_l |= crosstalk & 0x0f;
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regmap_update_bits(es8326->regmap, ES8326_DAC_RAMPRATE,
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0x10, crosstalk_h);
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regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, crosstalk_l);
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return 0;
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}
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static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(dac_vol_tlv, -9550, 50, 0);
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static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_vol_tlv, -9550, 50, 0);
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static const SNDRV_CTL_TLVD_DECLARE_DB_SCALE(adc_analog_pga_tlv, 0, 300, 0);
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@ -102,6 +178,10 @@ static const struct snd_kcontrol_new es8326_snd_controls[] = {
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SOC_SINGLE_TLV("ALC Capture Target Level", ES8326_ALC_LEVEL,
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0, 0x0f, 0, drc_target_tlv),
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SOC_SINGLE_EXT("CROSSTALK1", SND_SOC_NOPM, 0, 31, 0,
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es8326_crosstalk1_get, es8326_crosstalk1_set),
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SOC_SINGLE_EXT("CROSSTALK2", SND_SOC_NOPM, 0, 31, 0,
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es8326_crosstalk2_get, es8326_crosstalk2_set),
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};
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static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
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@ -117,12 +197,6 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
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SND_SOC_DAPM_AIF_OUT("I2S OUT", "I2S1 Capture", 0, SND_SOC_NOPM, 0, 0),
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SND_SOC_DAPM_AIF_IN("I2S IN", "I2S1 Playback", 0, SND_SOC_NOPM, 0, 0),
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/* ADC Digital Mute */
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SND_SOC_DAPM_PGA("ADC L1", ES8326_ADC_MUTE, 0, 1, NULL, 0),
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SND_SOC_DAPM_PGA("ADC R1", ES8326_ADC_MUTE, 1, 1, NULL, 0),
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SND_SOC_DAPM_PGA("ADC L2", ES8326_ADC_MUTE, 2, 1, NULL, 0),
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SND_SOC_DAPM_PGA("ADC R2", ES8326_ADC_MUTE, 3, 1, NULL, 0),
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/* Analog Power Supply*/
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SND_SOC_DAPM_DAC("Right DAC", NULL, ES8326_ANA_PDN, 0, 1),
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SND_SOC_DAPM_DAC("Left DAC", NULL, ES8326_ANA_PDN, 1, 1),
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@ -142,15 +216,10 @@ static const struct snd_soc_dapm_widget es8326_dapm_widgets[] = {
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};
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static const struct snd_soc_dapm_route es8326_dapm_routes[] = {
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{"ADC L1", NULL, "MIC1"},
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{"ADC R1", NULL, "MIC2"},
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{"ADC L2", NULL, "MIC3"},
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{"ADC R2", NULL, "MIC4"},
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{"ADC L", NULL, "ADC L1"},
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{"ADC R", NULL, "ADC R1"},
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{"ADC L", NULL, "ADC L2"},
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{"ADC R", NULL, "ADC R2"},
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{"ADC L", NULL, "MIC1"},
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{"ADC R", NULL, "MIC2"},
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{"ADC L", NULL, "MIC3"},
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{"ADC R", NULL, "MIC4"},
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{"I2S OUT", NULL, "ADC L"},
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{"I2S OUT", NULL, "ADC R"},
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@ -440,10 +509,16 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
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unsigned int offset_l, offset_r;
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if (mute) {
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ES8326_MUTE);
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xf0);
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_OFF);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ES8326_MUTE);
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF,
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0x30, 0x00);
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} else {
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regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
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0x0F, 0x0F);
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}
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} else {
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if (!es8326->calibrated) {
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_FORCE_CAL);
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@ -456,11 +531,22 @@ static int es8326_mute(struct snd_soc_dai *dai, int mute, int direction)
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regmap_write(es8326->regmap, ES8326_HPR_OFFSET_INI, offset_r);
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es8326->calibrated = true;
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}
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
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regmap_write(es8326->regmap, ES8326_HP_VOL, 0x91);
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
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ES8326_MUTE_MASK, ~(ES8326_MUTE));
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if (direction == SNDRV_PCM_STREAM_PLAYBACK) {
|
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regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x01);
|
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usleep_range(1000, 5000);
|
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regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
|
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usleep_range(1000, 5000);
|
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x20);
|
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regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x30, 0x30);
|
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regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
|
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regmap_write(es8326->regmap, ES8326_HP_CAL, ES8326_HP_ON);
|
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regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE,
|
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ES8326_MUTE_MASK, ~(ES8326_MUTE));
|
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} else {
|
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msleep(300);
|
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regmap_update_bits(es8326->regmap, ES8326_ADC_MUTE,
|
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0x0F, 0x00);
|
||||
}
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
@ -477,23 +563,20 @@ static int es8326_set_bias_level(struct snd_soc_component *codec,
|
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if (ret)
|
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return ret;
|
||||
|
||||
regmap_update_bits(es8326->regmap, ES8326_DAC_DSM, 0x01, 0x00);
|
||||
regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x02);
|
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usleep_range(5000, 10000);
|
||||
regmap_write(es8326->regmap, ES8326_INTOUT_IO, es8326->interrupt_clk);
|
||||
regmap_write(es8326->regmap, ES8326_SDINOUT1_IO,
|
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(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
|
||||
regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
|
||||
regmap_write(es8326->regmap, ES8326_PGA_PDN, 0x40);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
|
||||
regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x20);
|
||||
|
||||
regmap_update_bits(es8326->regmap, ES8326_RESET,
|
||||
ES8326_CSM_ON, ES8326_CSM_ON);
|
||||
regmap_update_bits(es8326->regmap, ES8326_RESET, 0x02, 0x00);
|
||||
break;
|
||||
case SND_SOC_BIAS_PREPARE:
|
||||
break;
|
||||
case SND_SOC_BIAS_STANDBY:
|
||||
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
|
||||
regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x00);
|
||||
regmap_update_bits(es8326->regmap, ES8326_CLK_CTL, 0x20, 0x00);
|
||||
regmap_write(es8326->regmap, ES8326_SDINOUT1_IO, ES8326_IO_INPUT);
|
||||
break;
|
||||
@ -513,7 +596,7 @@ static const struct snd_soc_dai_ops es8326_ops = {
|
||||
.set_fmt = es8326_set_dai_fmt,
|
||||
.set_sysclk = es8326_set_dai_sysclk,
|
||||
.mute_stream = es8326_mute,
|
||||
.no_capture_mute = 1,
|
||||
.no_capture_mute = 0,
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_driver es8326_dai = {
|
||||
@ -672,6 +755,8 @@ static void es8326_jack_detect_handler(struct work_struct *work)
|
||||
es8326->hp = 0;
|
||||
}
|
||||
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
|
||||
regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x0a);
|
||||
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x03);
|
||||
/*
|
||||
* Inverted HPJACK_POL bit to trigger one IRQ to double check HP Removal event
|
||||
*/
|
||||
@ -695,8 +780,11 @@ static void es8326_jack_detect_handler(struct work_struct *work)
|
||||
* Don't report jack status.
|
||||
*/
|
||||
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x01);
|
||||
es8326_enable_micbias(es8326->component);
|
||||
usleep_range(50000, 70000);
|
||||
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
|
||||
regmap_write(es8326->regmap, ES8326_SYS_BIAS, 0x1f);
|
||||
regmap_update_bits(es8326->regmap, ES8326_HP_DRIVER_REF, 0x0f, 0x08);
|
||||
queue_delayed_work(system_wq, &es8326->jack_detect_work,
|
||||
msecs_to_jiffies(400));
|
||||
es8326->hp = 1;
|
||||
@ -736,13 +824,10 @@ exit:
|
||||
static irqreturn_t es8326_irq(int irq, void *dev_id)
|
||||
{
|
||||
struct es8326_priv *es8326 = dev_id;
|
||||
struct snd_soc_component *comp = es8326->component;
|
||||
|
||||
if (!es8326->jack)
|
||||
goto out;
|
||||
|
||||
es8326_enable_micbias(comp);
|
||||
|
||||
if (es8326->jack->status & SND_JACK_HEADSET)
|
||||
queue_delayed_work(system_wq, &es8326->jack_detect_work,
|
||||
msecs_to_jiffies(10));
|
||||
@ -766,14 +851,14 @@ static int es8326_calibrate(struct snd_soc_component *component)
|
||||
if ((es8326->version == ES8326_VERSION_B) && (es8326->calibrated == false)) {
|
||||
dev_dbg(component->dev, "ES8326_VERSION_B, calibrating\n");
|
||||
regmap_write(es8326->regmap, ES8326_CLK_INV, 0xc0);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x01);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_DIV1, 0x03);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_DLL, 0x30);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_MUX, 0xed);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_DAC_SEL, 0x08);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_TRI, 0xc1);
|
||||
regmap_write(es8326->regmap, ES8326_DAC_MUTE, 0x03);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_VSEL, 0x7f);
|
||||
regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x03);
|
||||
regmap_write(es8326->regmap, ES8326_VMIDLOW, 0x23);
|
||||
regmap_write(es8326->regmap, ES8326_DAC2HPMIX, 0x88);
|
||||
usleep_range(15000, 20000);
|
||||
regmap_write(es8326->regmap, ES8326_HP_OFFSET_CAL, 0x8c);
|
||||
@ -814,13 +899,13 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
/* reset internal clock state */
|
||||
regmap_write(es8326->regmap, ES8326_RESET, 0x1f);
|
||||
regmap_write(es8326->regmap, ES8326_VMIDSEL, 0x0E);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_LP, 0xf0);
|
||||
usleep_range(10000, 15000);
|
||||
regmap_write(es8326->regmap, ES8326_HPJACK_TIMER, 0xe9);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0x4b);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_MICBIAS, 0xcb);
|
||||
/* set headphone default type and detect pin */
|
||||
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x83);
|
||||
regmap_write(es8326->regmap, ES8326_CLK_RESAMPLE, 0x05);
|
||||
regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
|
||||
|
||||
/* set internal oscillator as clock source of headpone cp */
|
||||
regmap_write(es8326->regmap, ES8326_CLK_DIV_CPC, 0x89);
|
||||
@ -828,14 +913,15 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
/* clock manager reset release */
|
||||
regmap_write(es8326->regmap, ES8326_RESET, 0x17);
|
||||
/* set headphone detection as half scan mode */
|
||||
regmap_write(es8326->regmap, ES8326_HP_MISC, 0x30);
|
||||
regmap_write(es8326->regmap, ES8326_HP_MISC, 0x3d);
|
||||
regmap_write(es8326->regmap, ES8326_PULLUP_CTL, 0x00);
|
||||
|
||||
/* enable headphone driver */
|
||||
regmap_write(es8326->regmap, ES8326_HP_VOL, 0xc4);
|
||||
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa7);
|
||||
usleep_range(2000, 5000);
|
||||
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xa3);
|
||||
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0xb3);
|
||||
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x23);
|
||||
regmap_write(es8326->regmap, ES8326_HP_DRIVER_REF, 0x33);
|
||||
regmap_write(es8326->regmap, ES8326_HP_DRIVER, 0xa1);
|
||||
|
||||
regmap_write(es8326->regmap, ES8326_CLK_INV, 0x00);
|
||||
@ -844,6 +930,8 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
regmap_write(es8326->regmap, ES8326_CLK_CAL_TIME, 0x00);
|
||||
/* calibrate for B version */
|
||||
es8326_calibrate(component);
|
||||
regmap_write(es8326->regmap, ES8326_DAC_CROSSTALK, 0xaa);
|
||||
regmap_write(es8326->regmap, ES8326_DAC_RAMPRATE, 0x00);
|
||||
/* turn off headphone out */
|
||||
regmap_write(es8326->regmap, ES8326_HP_CAL, 0x00);
|
||||
/* set ADC and DAC in low power mode */
|
||||
@ -856,6 +944,14 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
regmap_write(es8326->regmap, ES8326_DAC_DSM, 0x08);
|
||||
regmap_write(es8326->regmap, ES8326_DAC_VPPSCALE, 0x15);
|
||||
|
||||
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
|
||||
((es8326->version == ES8326_VERSION_B) ?
|
||||
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
|
||||
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
|
||||
usleep_range(5000, 10000);
|
||||
es8326_enable_micbias(es8326->component);
|
||||
usleep_range(50000, 70000);
|
||||
regmap_update_bits(es8326->regmap, ES8326_HPDET_TYPE, 0x03, 0x00);
|
||||
regmap_write(es8326->regmap, ES8326_INT_SOURCE,
|
||||
(ES8326_INT_SRC_PIN9 | ES8326_INT_SRC_BUTTON));
|
||||
regmap_write(es8326->regmap, ES8326_INTOUT_IO,
|
||||
@ -864,7 +960,7 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
(ES8326_IO_DMIC_CLK << ES8326_SDINOUT1_SHIFT));
|
||||
regmap_write(es8326->regmap, ES8326_SDINOUT23_IO, ES8326_IO_INPUT);
|
||||
|
||||
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x3b);
|
||||
regmap_write(es8326->regmap, ES8326_ANA_PDN, 0x00);
|
||||
regmap_write(es8326->regmap, ES8326_RESET, ES8326_CSM_ON);
|
||||
regmap_update_bits(es8326->regmap, ES8326_PGAGAIN, ES8326_MIC_SEL_MASK,
|
||||
ES8326_MIC1_SEL);
|
||||
@ -872,11 +968,7 @@ static int es8326_resume(struct snd_soc_component *component)
|
||||
regmap_update_bits(es8326->regmap, ES8326_DAC_MUTE, ES8326_MUTE_MASK,
|
||||
ES8326_MUTE);
|
||||
|
||||
regmap_write(es8326->regmap, ES8326_HPDET_TYPE, 0x80 |
|
||||
((es8326->version == ES8326_VERSION_B) ?
|
||||
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol) :
|
||||
(ES8326_HP_DET_SRC_PIN9 | es8326->jack_pol | 0x04)));
|
||||
regmap_write(es8326->regmap, ES8326_HP_VOL, 0x11);
|
||||
regmap_write(es8326->regmap, ES8326_ADC_MUTE, 0x0f);
|
||||
|
||||
es8326->jack_remove_retry = 0;
|
||||
es8326->hp = 0;
|
||||
|
@ -72,6 +72,7 @@
|
||||
#define ES8326_DAC_VOL 0x50
|
||||
#define ES8326_DRC_RECOVERY 0x53
|
||||
#define ES8326_DRC_WINSIZE 0x54
|
||||
#define ES8326_DAC_CROSSTALK 0x55
|
||||
#define ES8326_HPJACK_TIMER 0x56
|
||||
#define ES8326_HPDET_TYPE 0x57
|
||||
#define ES8326_INT_SOURCE 0x58
|
||||
@ -100,7 +101,7 @@
|
||||
#define ES8326_MUTE (3 << 0)
|
||||
|
||||
/* ES8326_CLK_CTL */
|
||||
#define ES8326_CLK_ON (0x7f << 0)
|
||||
#define ES8326_CLK_ON (0x7e << 0)
|
||||
#define ES8326_CLK_OFF (0 << 0)
|
||||
|
||||
/* ES8326_CLK_INV */
|
||||
|
@ -1584,7 +1584,6 @@ static int wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
u16 gain_reg;
|
||||
u16 reg;
|
||||
int val;
|
||||
int offset_val = 0;
|
||||
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
|
||||
|
||||
if (w->shift == WSA_MACRO_COMP1) {
|
||||
@ -1623,10 +1622,8 @@ static int wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
CDC_WSA_RX1_RX_PATH_MIX_SEC0,
|
||||
CDC_WSA_RX_PGA_HALF_DB_MASK,
|
||||
CDC_WSA_RX_PGA_HALF_DB_ENABLE);
|
||||
offset_val = -2;
|
||||
}
|
||||
val = snd_soc_component_read(component, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(component, gain_reg, val);
|
||||
wsa_macro_config_ear_spkr_gain(component, wsa,
|
||||
event, gain_reg);
|
||||
@ -1654,10 +1651,6 @@ static int wsa_macro_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
CDC_WSA_RX1_RX_PATH_MIX_SEC0,
|
||||
CDC_WSA_RX_PGA_HALF_DB_MASK,
|
||||
CDC_WSA_RX_PGA_HALF_DB_DISABLE);
|
||||
offset_val = 2;
|
||||
val = snd_soc_component_read(component, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(component, gain_reg, val);
|
||||
}
|
||||
wsa_macro_config_ear_spkr_gain(component, wsa,
|
||||
event, gain_reg);
|
||||
|
@ -3033,7 +3033,6 @@ static int wcd9335_codec_enable_mix_path(struct snd_soc_dapm_widget *w,
|
||||
{
|
||||
struct snd_soc_component *comp = snd_soc_dapm_to_component(w->dapm);
|
||||
u16 gain_reg;
|
||||
int offset_val = 0;
|
||||
int val = 0;
|
||||
|
||||
switch (w->reg) {
|
||||
@ -3073,7 +3072,6 @@ static int wcd9335_codec_enable_mix_path(struct snd_soc_dapm_widget *w,
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
val = snd_soc_component_read(comp, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(comp, gain_reg, val);
|
||||
break;
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
@ -3294,7 +3292,6 @@ static int wcd9335_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
u16 gain_reg;
|
||||
u16 reg;
|
||||
int val;
|
||||
int offset_val = 0;
|
||||
|
||||
if (!(snd_soc_dapm_widget_name_cmp(w, "RX INT0 INTERP"))) {
|
||||
reg = WCD9335_CDC_RX0_RX_PATH_CTL;
|
||||
@ -3337,7 +3334,6 @@ static int wcd9335_codec_enable_interpolator(struct snd_soc_dapm_widget *w,
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
wcd9335_config_compander(comp, w->shift, event);
|
||||
val = snd_soc_component_read(comp, gain_reg);
|
||||
val += offset_val;
|
||||
snd_soc_component_write(comp, gain_reg, val);
|
||||
break;
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
|
@ -13,7 +13,6 @@
|
||||
#include <linux/of.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <linux/regulator/consumer.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/slimbus.h>
|
||||
#include <sound/pcm_params.h>
|
||||
|
@ -210,7 +210,7 @@ struct wcd938x_priv {
|
||||
};
|
||||
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(ear_pa_gain, 600, -1800);
|
||||
static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, -3000);
|
||||
static const DECLARE_TLV_DB_SCALE(line_gain, -3000, 150, 0);
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_MINMAX(analog_gain, 0, 3000);
|
||||
|
||||
struct wcd938x_mbhc_zdet_param {
|
||||
@ -3587,10 +3587,8 @@ static int wcd938x_probe(struct platform_device *pdev)
|
||||
mutex_init(&wcd938x->micb_lock);
|
||||
|
||||
ret = wcd938x_populate_dt_data(wcd938x, dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "%s: Fail to obtain platform data\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
ret = wcd938x_add_slave_components(wcd938x, dev, &match);
|
||||
if (ret)
|
||||
|
@ -1098,7 +1098,11 @@ static int wsa_dev_mode_put(struct snd_kcontrol *kcontrol,
|
||||
return 1;
|
||||
}
|
||||
|
||||
static const DECLARE_TLV_DB_SCALE(pa_gain, -300, 150, -300);
|
||||
static const SNDRV_CTL_TLVD_DECLARE_DB_RANGE(pa_gain,
|
||||
0, 14, TLV_DB_SCALE_ITEM(-300, 0, 0),
|
||||
15, 29, TLV_DB_SCALE_ITEM(-300, 150, 0),
|
||||
30, 31, TLV_DB_SCALE_ITEM(1800, 0, 0),
|
||||
);
|
||||
|
||||
static int wsa883x_get_swr_port(struct snd_kcontrol *kcontrol,
|
||||
struct snd_ctl_elem_value *ucontrol)
|
||||
|
@ -32,12 +32,14 @@ static int sc8280xp_snd_init(struct snd_soc_pcm_runtime *rtd)
|
||||
case WSA_CODEC_DMA_RX_0:
|
||||
case WSA_CODEC_DMA_RX_1:
|
||||
/*
|
||||
* set limit of 0dB on Digital Volume for Speakers,
|
||||
* this can prevent damage of speakers to some extent without
|
||||
* active speaker protection
|
||||
* Set limit of -3 dB on Digital Volume and 0 dB on PA Volume
|
||||
* to reduce the risk of speaker damage until we have active
|
||||
* speaker protection in place.
|
||||
*/
|
||||
snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 84);
|
||||
snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 84);
|
||||
snd_soc_limit_volume(card, "WSA_RX0 Digital Volume", 81);
|
||||
snd_soc_limit_volume(card, "WSA_RX1 Digital Volume", 81);
|
||||
snd_soc_limit_volume(card, "SpkrLeft PA Volume", 17);
|
||||
snd_soc_limit_volume(card, "SpkrRight PA Volume", 17);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
|
@ -1037,7 +1037,7 @@ component_dai_empty:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
#define MAX_DEFAULT_CH_MAP_SIZE 7
|
||||
#define MAX_DEFAULT_CH_MAP_SIZE 8
|
||||
static struct snd_soc_dai_link_ch_map default_ch_map_sync[MAX_DEFAULT_CH_MAP_SIZE] = {
|
||||
{ .cpu = 0, .codec = 0 },
|
||||
{ .cpu = 1, .codec = 1 },
|
||||
@ -1046,6 +1046,7 @@ static struct snd_soc_dai_link_ch_map default_ch_map_sync[MAX_DEFAULT_CH_MAP_SIZ
|
||||
{ .cpu = 4, .codec = 4 },
|
||||
{ .cpu = 5, .codec = 5 },
|
||||
{ .cpu = 6, .codec = 6 },
|
||||
{ .cpu = 7, .codec = 7 },
|
||||
};
|
||||
static struct snd_soc_dai_link_ch_map default_ch_map_1cpu[MAX_DEFAULT_CH_MAP_SIZE] = {
|
||||
{ .cpu = 0, .codec = 0 },
|
||||
@ -1055,6 +1056,7 @@ static struct snd_soc_dai_link_ch_map default_ch_map_1cpu[MAX_DEFAULT_CH_MAP_SIZ
|
||||
{ .cpu = 0, .codec = 4 },
|
||||
{ .cpu = 0, .codec = 5 },
|
||||
{ .cpu = 0, .codec = 6 },
|
||||
{ .cpu = 0, .codec = 7 },
|
||||
};
|
||||
static struct snd_soc_dai_link_ch_map default_ch_map_1codec[MAX_DEFAULT_CH_MAP_SIZE] = {
|
||||
{ .cpu = 0, .codec = 0 },
|
||||
@ -1064,6 +1066,7 @@ static struct snd_soc_dai_link_ch_map default_ch_map_1codec[MAX_DEFAULT_CH_MAP_S
|
||||
{ .cpu = 4, .codec = 0 },
|
||||
{ .cpu = 5, .codec = 0 },
|
||||
{ .cpu = 6, .codec = 0 },
|
||||
{ .cpu = 7, .codec = 0 },
|
||||
};
|
||||
static int snd_soc_compensate_channel_connection_map(struct snd_soc_card *card,
|
||||
struct snd_soc_dai_link *dai_link)
|
||||
|
@ -577,6 +577,11 @@ static const struct of_device_id sun4i_spdif_of_match[] = {
|
||||
.compatible = "allwinner,sun50i-h6-spdif",
|
||||
.data = &sun50i_h6_spdif_quirks,
|
||||
},
|
||||
{
|
||||
.compatible = "allwinner,sun50i-h616-spdif",
|
||||
/* Essentially the same as the H6, but without RX */
|
||||
.data = &sun50i_h6_spdif_quirks,
|
||||
},
|
||||
{ /* sentinel */ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, sun4i_spdif_of_match);
|
||||
|
Loading…
Reference in New Issue
Block a user